US7190711B2 - Linear search system and method for determining Psuedo-Noise (PN) composite phase - Google Patents
Linear search system and method for determining Psuedo-Noise (PN) composite phase Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7073—Synchronisation aspects
- H04B1/7075—Synchronisation aspects with code phase acquisition
- H04B1/70751—Synchronisation aspects with code phase acquisition using partial detection
- H04B1/70752—Partial correlation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2201/00—Indexing scheme relating to details of transmission systems not covered by a single group of H04B3/00 - H04B13/00
- H04B2201/69—Orthogonal indexing scheme relating to spread spectrum techniques in general
- H04B2201/707—Orthogonal indexing scheme relating to spread spectrum techniques in general relating to direct sequence modulation
- H04B2201/70715—Orthogonal indexing scheme relating to spread spectrum techniques in general relating to direct sequence modulation with application-specific features
Definitions
- the present invention relates to spread spectrum communication systems using PN coding techniques and, more particularly, to linear PN code searching to determine PN composite code phase.
- SS systems which may be CDMA systems
- SS systems can employ a transmission technique in which a pseudo-noise (PN) PN-code is used as a modulating waveform to spread the signal energy over a bandwidth much greater than the signal information bandwidth.
- PN pseudo-noise
- the signal is de-spread using a synchronized replica of the PN-code.
- SS direct sequence spread spectrum systems
- FHSS frequency hop spread spectrum systems
- the DSSS systems spread the signal over a bandwidth f RF ⁇ R c , where f RF represents the carrier frequency and R c represents the PN-code chip rate, which in turn may be an integer multiple of the symbol rate R s .
- Multiple access systems employ DSSS techniques when transmitting multiple channels over the same frequency bandwidth to multiple receivers, each receiver sharing a common PN code or having its own designated PN-code. Although each receiver receives the entire frequency bandwidth, only the signal with the receiver's matching PN-code will appear intelligible; the rest appears as noise that is easily filtered. These systems are well known in the art and will not be discussed further.
- FHSS systems employ a PN-code sequence generated at the modulator that is used in conjunction with an m-ary frequency shift keying (FSK) modulation to shift the carrier frequency f RF at a hopping rate R h .
- a FHSS system divides the available bandwidth into N channels and hops between these channels according to the PN-code sequence.
- a PN generator feeds a frequency synthesizer a sequence of n chips that dictates one of 2n frequency positions.
- the receiver follows the same frequency hop pattern.
- FHSS systems are also well known in the art and need not be discussed further.
- the DSSS system PN-code sequence spreads the data signal over the available bandwidth such that the signal appears to be noise-like and random; but the signal is deterministic to a receiver applying the same PN-code to de-spread the signal. However, the receiver must also apply the same PN-code at the appropriate phase in order to de-spread the incoming signal, which explicitly implies synchronization between the receiver and transmitter.
- group communication environments such as a fleet battle-group where the battle-group composition changes regularly (daily or even hourly); or where the participants are engaged in a common training exercise, but geographically dispersed around the globe, typical synchronization techniques, such as resetting the start of the PN code for all the participants, is not practical.
- a time seam occurs when a fleet of platforms begins its PN code from the beginning of a time event, such as the Global Positioning System (GPS) day in which the fleet assembles.
- GPS Global Positioning System
- the convention used by the fleet is to ignore subsequent GPS day boundaries once communication among the fleet has begun, meaning that the PN code shared among the fleet is not reset at subsequent GPS day boundaries.
- PN encoded communications can persist for two or three days.
- a platform that attempts to join the fleet and participate in fleet communications, subsequent to the beginning of the time event is confronted with a time and PN code phase ambiguity and will be unable to join fleet communications unless the ambiguities are resolved.
- Some PN systems may be able to partially correlate the incoming composite PN-encoded signal with just one of the PN component codes, but at a reduced power level. Phase alignment with the other PN component codes may then be determined through information provided by the transmitting system.
- this approach has the disadvantage of bounding data rates by epochs of the partially phase aligned PN code.
- Some systems may use three-component PN codes where acquisition is often achieved by searching (slipping or advancing) each PN component code for phase alignment with the composite PN-encoded signal one chip at a time; otherwise known as brute force searching. It will be appreciated that a disadvantage in brute force searching is that composite code phase is not preserved.
- phase information derived from the partially phase aligned composite PN-encoded signal is lost and must be regained.
- ⁇ PN is preserved by composite code slipping, and ⁇ PN status ( ⁇ and TSI) may be recovered from the transmitted data stream since data may be recovered when there is partial phase alignment and bit synchronization (i.e., data edges are coincident with X-epochs).
- a receiver system for acquiring pseudo-noise (PN) spread signals includes a receiver adapted to receive PN encoded signals and at least three receiver pseudo-noise (PN) component code generators: PN x , PN y , and PN z .
- PN receiver pseudo-noise
- Each PN component code generator is adapted to generate relatively prime PN component codes when compared with each of the other PN component code generators.
- a method for correlating receiver Psuedo-Noise (PN) composite phase with a received PN composite encoded signal includes providing at least three PN component codes, wherein the at least three PN component code lengths are relatively prime.
- the method also includes correlating a received PN composite encoded signal with one of the PN component codes and searching for phase alignment of the received PN composite encoded signal with a second one of the PN component codes.
- the method determines correlation of the received PN composite encoded signal with the receiver PN composite phase.
- a method for correlating a received Pseudo-Noise (PN) encoded signal encoded by a first composite PN code generated by a first composite PN code generator includes providing a second composite PN code, which includes providing first, second and third PN component code generators for generating first, second, and third PN component codes, respectively.
- the method also includes partially correlating the received PN encoded signal with the first PN component code and partially correlating the received PN encoded signal with the second PN component code.
- Partially correlating the second PN component code includes withholding a clock signal from the second PN component code generator while clocking the first and third PN component code generators.
- the method substantially aligns the second composite PN code with the first composite PN code according to the partially phase aligned first and second PN component codes.
- the invention is also directed towards an integrated circuit (IC).
- the IC includes at least three receiver pseudo-noise (PN) component code generators PN x , PN y , and PN z .
- PN receiver pseudo-noise
- Each PN component code generator is adapted to generate relatively prime PN component codes when compared with each of the other PN component code generators.
- the IC also includes a Normalized Autonomous Phase Number (NAPN) generator for generating NAPNs associated with each relatively prime PN component code.
- NAPN Normalized Autonomous Phase Number
- the invention is also directed towards a program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine to perform method steps for correlating receiver Psuedo-Noise (PN) composite phase with a PN encoded received signal phase.
- the method includes providing at least three PN component codes, wherein the at least three PN component code lengths are relatively prime.
- the method also includes partially correlating a received PN composite encoded signal with one of the PN component codes and searching for phase alignment of the received PN composite encoded signal with a second one of the PN component codes. Data from the partial phase alignments are then used to correlate the received PN composite encoded signal with the receiver PN composite phase.
- FIG. 1 is a pictorial diagram of a communication system having a transmitter and a receiver incorporating features of the present invention
- FIG. 2 is a block diagram of spread spectrum correlator shown in FIG. 1 ,
- FIG. 3 is a block diagram of the composite PN code generator shown in FIG. 1 incorporating features of the present invention.
- FIG. 4 is a method flow chart implementing features of the present invention shown in FIGS. 1 , 2 , and 3 .
- the present invention describes a novel method and system for PN code phase coordination and alignment of direct sequence spread spectrum signals.
- FIG. 1 there is shown a pictorial diagram of a telecommunications system incorporating features of the present invention.
- the present invention will be described with reference to the embodiments shown in the drawings, it should be understood that the present invention might be embodied in many alternate forms of embodiments, e.g., point-to-point simplex links, point-to-multipoint links, and either simplex or full-duplex links.
- the teachings herein may apply to any group or assembly of spread spectrum (SS) receivers, including those that are fixed in place; vehicle mounted; and/or hand carried.
- SS spread spectrum
- the system 10 employs direct sequence spread spectrum based techniques over an air link to provide data transfer between Terminal # 1 12 and Terminal # 2 14 .
- the forward link (FL) from Terminal # 1 12 to Terminal # 2 14 contains a spread spectrum waveform that is constructed in the manner described herein, with the PN code being composed of even-length and maximal length codes.
- the return link (RL) from Terminal # 2 14 to Terminal # 1 12 contains a spread spectrum waveform that is similar or identical to that of the FL. It will be appreciated that an advantage of the present invention allows the data rates of the FL and RL to be changed synchronously and seamlessly at the transmit or receive (modulator and demodulator) ends of the link without the need for bit synchronizers.
- Terminal # 1 12 includes a Spread Spectrum Modulator (SSM) 12 b ; the SSM 12 b generates a desired spread spectrum waveform at a desired RF frequency.
- the SSM 12 b also provides a Tx clock 12 d that is used to clock the Tx Data 12 e into the SSM 12 b .
- the SSM 12 b then combines the Tx data 12 e with a spread spectrum PN code to produce the desired spread spectrum waveform.
- Terminal # 1 12 also includes an antenna 12 a , which may transmit at any suitable RF frequency.
- Receiver 14 c includes a spread spectrum correlator 14 c 1 , PN generator 14 c 2 , clock generator 14 c 3 , and spread spectrum demodulator (SSD) 14 c 4 .
- the received signal is then demodulated by SSD 14 c 4 .
- the Rx Clock 14 g and Rx Data 14 f are output to the intended user.
- the data clocks 14 g and 12 d are synchronous and may be commanded to change frequency on the PN epochs; thus advantageously providing means to vary the data rate without interruption; and without the need for bit synchronizers to acquire and track at the new clock frequency with their associated loss of clock coherence between the transmitter and receiver.
- Terminal # 2 14 generates a Tx Clock 14 d and Tx Data 14 e using the Spread Spectrum Modulator 14 b in a similar fashion described earlier for Terminal # 1 .
- Terminal # 1 12 may receive the RL signal via antenna 12 a , and demodulate and track the signal as described earlier with receiver 12 c to provide Rx Data 12 f and Rx Clock 12 g to the intended user.
- each terminal 12 , 14 shown in FIG. 1 contains a correlator controller 14 c 1 , and a PN code generator 14 c 2 .
- Correlator controller 14 c 1 includes, as shown in FIG. 2 , a receiving system 1 A 6 , a correlator 1 B 1 , a link control processor (LCP) 1 B 21 , and modulator/demodulator controller (MDC) 1 B 22 .
- PN code generator 14 c 2 includes PN subcomponent generators, 1 B 3 - 1 B 6 , PN composite code logic combiner 1 B 7 , and a decision switch 1 B 8 .
- PN composite code logic combiner 1 B 7 also contains phasor 58 C for generating phase adjustment steps in accordance with teaching of the present invention. In alternate embodiment any suitable number of PN subcomponent generators may be used.
- MDC 1 B 22 tests for X-code acquisition. When it has found X-code phase, its bus data controller (not shown) alerts LCP 1 B 21 . In accordance with features of the present invention, LCP 1 B 21 uses remote and local PN code phase data to calculate slip commands to MDC 1 B 22 in order to achieve full correlation, and therefore full power.
- the receiving platform aligns its Y and Z codes with the received PN sequence by slipping or advancing its Y and Z component codes to the composite code phase of the received PN sequence.
- a composite PN code PNc contains PN component codes, each component code being relatively prime with respect to the other component codes.
- each of the component codes does not share any prime multiplicands with either of its companion component codes.
- L x 5 chips
- L y 7 chips
- L z 9 chips. It can be seen that the numbers 5 and 7 are prime numbers, and the number 9 is derived from the prime number 3, meaning that the numbers 9, 5 or 7 do not share any prime multiplicands.
- the epoch of a component code occurs once per the length of the component code, and the epoch is customarily recognized as the all-ones state of the PN component code generator.
- a major epoch occurs once and only once per L xyz if, and only if, composite PN codes are relatively prime as in a preferred embodiment of the present invention.
- a PN Composite Code advances one chip through its unique PN code sequence for every cycle of the master clock 31 driving the PN component code generators 32 – 34 .
- it is necessary to know the PN composite code phase at all times i.e., the phase position within the PN composite code sequence). Determining phase position is complicated when PN code manipulations are performed.
- PN code manipulation may include: slips by a known number of chips, advances by a known number of chips, composite code searches by a known number of chips, and/or linear searches of individual component codes.
- the example composite code begins with its composite PN code phase ( ⁇ xyz ) of zero.
- each component code rotates through its phase modulo its code length.
- the X code of 5 chips rotates through phases 1 2 3 4 0 1 2 3 4 0 et cetera, which is the composite code phase modulo 5.
- the PN code has advanced 211 chips.
- Equation 1 shows that the composite PN code phase of a PN sequence is equal to the number of clock cycles counted plus the delta composite PN code phase.
- the master clock may run at many times the chipping rate, meaning that a chip may be 2, 4, or more clock cycles long.
- a linear search refers to a chip-by-chip search for zero phase of a component code. Considering now what occurs when one of three component codes advances one phase position relative to its companion component codes; a clock cycle is withheld from all companion component codes while one component code is advanced one phase position by the clock cycle. Thus, enabling one component code to be advanced by one clock cycle, while withholding clock cycles to companion components codes is equivalent to advancing through the PN composite code by the unique number of chips that results in a phase advance of one to the enabled PN code generator, and results in a phase advance of zero to all companion component code generators.
- the companion component codes are moved an (equivalent number of chips equal to an) integer number of their epochs that results in a component code phase of one to the enabled component code.
- Eq 2 a 3-component code case, shows that an integer, b x , times an integer YZ epoch number of chips L yz , results in an X-code phase of 1.
- b x equals 2
- b x equals 2
- a YZ epoch number of chips is 63
- 2 YZ epoch number of chips, 126 the X code has a phase of 1.
- the composite PN code phase does not advance exactly by 126 chips; it advances by 125, which takes into account the apparent slip of one composite chip.
- the apparent slip of one composite chip is advantageously accounted for when counting every single clock cycle as part of a phase maintenance program.
- the composite PN code phase advances 125 chips. If the X component code is advanced n number of phase positions relative to its companion component codes, the composite PN code phase advances n ⁇ 125 chips.
- the composite code phase advance due to any number of one-component-code-only advances can be determined. This number is autonomous because it does not affect (and is independent of) the phase positions of companion component codes.
- NAPNs Normalized, Autonomous Phase Numbers
- the NAPNs may be determined by any suitable method. It will be appreciated that in some embodiments not all the NAPNs need to be determined. NAPNs are unique for a given set of fixed-length component codes. In alternate embodiments the modulo identity shown in Eq. 4 can be used to keep intermediate products as small as possible, given the possibility that PN component code lengths can be very long, resulting in very large products.
- NAPNs can be as large as the length of the respective component code, which potentially makes the product of b times its companion codes very large.
- the last equation in the set of Eq. 5 is written in terms of b 1 and L 2n , which indicates that the teachings of the present invention applies to PN codes comprised of any number of component codes.
- b 1 indicates the code of interest, of length L 1 , whose b is being sought.
- the product of lengths of all companion component codes is L 2n , which indicates the length of code 2 ⁇ L 3 ⁇ . . . ⁇ L n .
- Y-generator clock cycles can be withheld and X and Z generators can be clocked in order to linearly search the Y code.
- the NAPNs of the X and Z codes are used.
- the first-measured PN composite code phase is 660 ⁇ 10 6 chips; 9000 XZ clock cycles are withheld in an effort to find zero phase of the Y code; due to the probability of detect it may require more than one search through the Y-code.
- the intermediate product of 9000 ⁇ 68,627,236,860 is 617,645,131,740,000, which is a 50-bit number.
- the movement of a single component code phase relative to its companion component codes advantageously, in accordance with the teachings of the present invention, results in a deterministic phase advance.
- This advance is equal to a NAP Number of companion epochs, expressed in chips, less 1 for each withheld clock cycle.
- withholding clock cycles from a component code results in a relative advance of the companion component codes.
- a partial or X-code acquisition begins with receiving a data signal spread by the PN even length code, step 45 .
- the PN spread data signal is tested for phase alignment with the local X-component code, step 44 . If phase alignment is not achieved, the PNc is slipped, step 50 until the X-code partially correlates with the XYZ coded signal.
- Step 50 slips the PN composite code (PNc) in either whole chip or by 1 ⁇ 2 chip increments.
- the X-component code is used for partial phase alignment. However, in alternate embodiments any suitable PN component code could be used.
- Step 51 maintains the slipped delta phase history ⁇ xyz .
- step 44 determines phase alignment with the local X-component code
- the receiving platform's X code is in phase alignment with the received PN code sequence.
- X-code-only alignment is a partial phase alignment; Y and Z codes have not been phase aligned, and the correlated portion of the signal is substantially 1 ⁇ 4 of the transmitted signal power or 6 dB down.
- Step 46 initializes clock counter CC and step 47 tests the received PN signal with the Y-component of the PNc composite code.
- a failure to correlate in step 47 results in step 49 incrementing the CC counter and in step 48 withholding a clock signal from the Y-component generator ( FIG. 3 , item 53 ).
- step 52 determines ⁇ XYZ R in accordance with features of the present invention. At this point, the receiver is in partial XY phase alignment with the received signal.
- Step 53 decodes transmitter time-since-initialization (TSI) T and transmitter delta phase ⁇ PN T .
- Step 54 determines the phase of the receiver composite PNc code using the receiver's (TSI) R and delta phase ⁇ PN R .
- Step 54 also determines the difference phase ⁇ R between ⁇ PN T and ⁇ PN R .
- Step 56 adds a modulo number of chips to ⁇ R to account for the already partially aligned XY code.
- Step 55 slips or advances local PNc by ⁇ R plus the length of the XY code times an uncertainty factor ⁇ .
- Step 57 tests the received PN spread signal with the slipped (or advanced) local PNc. If the received PNc spread signal correlates with the receiver PNc signal step 62 continues with receiver operations.
- step 58 tests for an expired timer. It will be appreciated that the timer may be set to any suitable timer period. Step 59 then determines if (2* ⁇ ) slips have been performed. If yes then the PNc code is advanced by a factor and the delta phase ⁇ XYZ R is adjusted by the same factor. In a preferred embodiment the factor is twice the uncertainty times the length of the XY components of the PNc code. In alternate embodiments the factor may be any suitable factor. Step 57 again tests for phase alignment. Returning to step 58 , if the timer has expired then step 53 again decodes the transmitter TSI and transmitter delta phase. This continues until step 57 determines full correlation of the receiver PNc composite code with the received signal encoded by the transmitter PNc composite code.
- the ability of aligning two of the component code phases before full PN code correlation allows for an increased selection of data rates. For example, if data rates are constrained to be X-epoch synchronous then the symbol rate constraint is that a symbol must be an integer number of chips in duration, divisible by an X-epoch multiplicand. Thus, for a PNX component code of 1024, only powers of 2 (up to 10) may be used to divide the symbol rate.
- One advantage of the present invention is to partially correlate on at least two of the PN component codes.
- any suitable method for combining component codes and generating NAPNs ( FIG. 3 , item 58 A) may be used; MAND combined codes, which exclusively-OR combine one of the PN component codes with a logical AND result of two other of the PN component codes, may be used to generate a composite PN code.
- MAJ combined codes which exclusively-ORs all logical AND combinations of unique pairs of the PN component codes, may be used in place of MAND combined codes.
- any suitable number of component codes may be used. Referring to FIG. 3 there is shown one such possible alternative embodiment. It will be appreciated that items 31 – 34 , 58 A, 58 B, and 1 B 7 , can be individual components or an integrated circuit (IC), item 35 . Still referring to FIG. 3 it can be seen that the NAPNs may be generated by NAPN generator 58 A. NAPN generator 58 A may be any suitable device for generating NAPNs. For example, in alternate embodiments NAPN generator 58 A may be a look-up-table stored in a memory or a programmable device programmed to determine NAPNs for a set of relatively prime PN codes.
- the IC may be a field programmable gate array (FPGA), an application specific IC (ASIC), or a function of MDC firmware.
- FPGA field programmable gate array
- ASIC application specific IC
- MDC firmware a function of MDC firmware.
- the operation the ICs or firmware may be defined by a suitable programming language such as a Very High Speed Integrated Circuit (VHSIC) Hardware Description (VHDL) Language file. Accordingly, the present invention is intended to embrace all such alternatives, modifications and variances that fall within the scope of the appended claims.
Abstract
Description
TABLE 1 | ||
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TABLE 2 |
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Slipping occurs as part of the 200 clock cycles. For the X component code, 2 of the 200 clock cycles are withheld from the X-code generator, 1 from the Y-code generator, and 2 from the Z-code generator. The result is a delta composite code phase (Δθxyz) of 92 chips. This example demonstrates a composite PN code phase equation:
θPN=#CLKs→Chips+ΔθXYZ (Eq. 1)
TABLE 3 |
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The advance occurs as part of the 50 clock cycles. For the X component code, 4 of the 50 clock cycles are withheld from the X-code generator, 6 from the Y-code generator, and 5 from the Z-code generator. The result is a composite code phase (θxyz) of 314 chips.
b PN
b PN
b PN
2×(7×9)=2×63=126 and 126 MOD 5=1 (Eq. 3)
Thus, a YZ epoch number of chips is 63, and in 2 YZ epoch number of chips, 126, the X code has a phase of 1.
TABLE 4 |
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(A×B×C)MOD E={[(A×B)MOD(E)]×C}MOD(E) (Eq. 4)
Using Eq. 4, the set of equations shown in Eq. 2 can be rewritten as follows:
b x×(L yzMOD L x)MOD L x=1
b y×(L xzMOD L y)MOD L y=1
b z×(L xyMOD L z)MOD L z=1 (Eq. 5)
b 1×(L 2nMOD L 1)MOD L 1=1
TABLE 5 |
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TABLE 6 |
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TABLE 7 | |||
Lx = 211 − 1 = 2047 = 23 × 89 | bx = 1365 | ||
Ly = 212 − 1 = 4095 = 32 × 5 × 7 × 13 | by = 4093 | ||
Lz = 213 − 1 = 8191 = 8191 | bz = 2733 |
Lxyz = 2047 × 4095 × 8191 = 68,660,770,815 | ||
TABLE 8 |
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XYZ1Z2: MAJ=(X•Y)⊕(X•Z1)⊕(X•Z2)⊕(Y•Z1)⊕(Y•Z2)⊕(z1•Z2)
Claims (29)
b(sub PNx)*[L(sub PNy*PNz)*MOD L(sub PNx)]=1
b(sub PNy)*[L(sub PNx*PNz)*MOD L(sub PNy)]=1
b(sub PNz)*[L(sub PNx*PNy)*MOD L(sub PNz)]=1
{b(sub x)*L(sub yz)]+[(b(sub z)*L(sub xy)]}−1(chips).
(X⊕(Y•(Z1⊕Z1)).
(X•Y)(X•Z1)⊕(X•Z2)⊕(Y•Z1)⊕(Y•Z2)⊕(Z1•Z2).
b(sub PNx)*[L(sub PNy*PNz)*MOD L(sub PNx)]=1
b(sub PNy)*[L(sub PNx*PNz)*MOD L(sub PNy)]=1
b(sub PNz)*[L(sub PNx*PNy)*MOD L(sub PNz)]=1
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US20070076787A1 (en) * | 2005-09-30 | 2007-04-05 | Freescale Semiconductor, Inc. | Pseudorandom noise lock detector |
US7519099B2 (en) * | 2005-09-30 | 2009-04-14 | Freescale Semiconductor, Inc. | Pseudorandom noise lock detector |
US8102897B1 (en) | 2009-01-28 | 2012-01-24 | L-3 Communications, Corp. | Direct sequence spread spectrum system and method with plural chipping rates |
US8446931B1 (en) | 2011-04-19 | 2013-05-21 | L-3 Communications Corp | Chip timing synchronization for link that transitions between clear and spread modes |
US20200136672A1 (en) * | 2018-09-26 | 2020-04-30 | Novatel Inc. | System and method for demodulating code shift keying data from a satellite signal utilizing a binary search |
US10715207B2 (en) * | 2018-09-26 | 2020-07-14 | Novatel Inc. | System and method for demodulating code shift keying data utilizing correlations with combinational PRN codes generated for different bit positions |
US10742257B1 (en) * | 2018-09-26 | 2020-08-11 | Novatel Inc. | System and method for demodulating code shift keying data from a satellite signal utilizing a binary search |
US10742258B1 (en) * | 2018-09-26 | 2020-08-11 | Novatel Inc. | System and method for demodulating code shift keying data utilizing correlations with combinational PRN codes generated for different bit positions |
US10784922B2 (en) * | 2018-09-26 | 2020-09-22 | Novatel Inc. | System and method for demodulating code shift keying data from a satellite signal utilizing a binary search |
US11012110B2 (en) | 2018-09-26 | 2021-05-18 | Novatel Inc. | System and method for demodulating code shift keying data from a satellite signal utilizing a binary search |
US11211971B2 (en) | 2018-09-26 | 2021-12-28 | Novatel Inc. | System and method for demodulating code shift keying data from a satellite signal utilizing a binary search |
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