US7514755B2 - Integrated circuit modification using well implants - Google Patents
Integrated circuit modification using well implants Download PDFInfo
- Publication number
- US7514755B2 US7514755B2 US10/735,841 US73584103A US7514755B2 US 7514755 B2 US7514755 B2 US 7514755B2 US 73584103 A US73584103 A US 73584103A US 7514755 B2 US7514755 B2 US 7514755B2
- Authority
- US
- United States
- Prior art keywords
- well
- substrate
- type
- conductivity type
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823892—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation [BILLI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
Abstract
Description
-
- (1) U.S. Pat. Nos. 5,866,933 and 6,294,816 teach how transistors in a CMOS circuit are connected by implanted (and therefore hidden and buried) lines between the transistors by modifying the p+ and n+ source/drain masks. These implanted interconnections are used to make 3-input AND or OR circuits look substantially identical to the reverse engineer. Also, buried interconnects force the reverse engineer to examine the IC in greater depth to try to figure out the connectivity between transistors and hence their function.
- (2) U.S. Pat. Nos. 5,783,846; 5,930,663 and 6,064,110 teach a further modification in the source/drain implant masks so that the implanted connecting lines between transistors have a gap inserted, with approximately the length of the minimum feature size of the CMOS technology being used. If this gap is “filled” with one kind of implant, the line conducts; but if it is “filled” with another kind of implant, the line does not conduct. The intentional gaps are called “channel blocks.” The reverse engineer is forced to determine connectivity based on resolving the implant type at the minimum feature size of the CMOS process being used.
- (3) U.S. Pat. No. 6,117,762 teaches method and apparatus for protecting semiconductor integrated circuits from reverse engineering. Semiconductor active areas are formed on a substrate and a silicide layer is formed both over at least one active area of the semiconductor active areas and over a selected substrate area for interconnecting the at least one active area with another area through the silicide area formed on the selected substrate area.
- (4) U.S. Pat. No. 4,583,011 discloses a method and circuit arrangement for foiling an attempt to copy a MOS integrated circuit by implementing in the circuit an additional pseudo MOS device, which from its location in the circuit would appear to a would-be copier to be an enhancement mode device. However, the pseudo MOS device is implemented with a depletion implant.
- (5) U.S. Pat. No. 5,973,375 discloses connections between implanted regions of adjacent transistors in a semiconductor substrate are made by buried conductive implants under field oxide layers. Buried conductive implants also referred to as buried contacts have doping concentrations similar to the doping concentrations of source/drain implants. Typical buried contacts have a doping concentration on the order of 1018 atoms/CM3.
- (6) U.S. patent application Ser. No. 09/758,792 discloses a double poly process technique that allows transistors to be ON or OFF depending upon implant details.
- (7) U.S. patent application Ser. No. 09/882,892, filed on Jun. 15, 2001 and a related PCT application PCT/US02/19075 filed on Jun. 13, 2002, discloses a buried contact implant used under the gate region. The buried contact structure used in the patent application has approximately the same doping concentrations and depth of source/drain implants.
Claims (7)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/735,841 US7514755B2 (en) | 2002-12-13 | 2003-12-12 | Integrated circuit modification using well implants |
US12/399,628 US8524553B2 (en) | 2002-12-13 | 2009-03-06 | Integrated circuit modification using well implants |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US43331402P | 2002-12-13 | 2002-12-13 | |
US10/735,841 US7514755B2 (en) | 2002-12-13 | 2003-12-12 | Integrated circuit modification using well implants |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/399,628 Division US8524553B2 (en) | 2002-12-13 | 2009-03-06 | Integrated circuit modification using well implants |
Publications (2)
Publication Number | Publication Date |
---|---|
US20040144998A1 US20040144998A1 (en) | 2004-07-29 |
US7514755B2 true US7514755B2 (en) | 2009-04-07 |
Family
ID=32595156
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/735,841 Expired - Fee Related US7514755B2 (en) | 2002-12-13 | 2003-12-12 | Integrated circuit modification using well implants |
US12/399,628 Expired - Fee Related US8524553B2 (en) | 2002-12-13 | 2009-03-06 | Integrated circuit modification using well implants |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/399,628 Expired - Fee Related US8524553B2 (en) | 2002-12-13 | 2009-03-06 | Integrated circuit modification using well implants |
Country Status (6)
Country | Link |
---|---|
US (2) | US7514755B2 (en) |
JP (1) | JP4846239B2 (en) |
AU (1) | AU2003293540A1 (en) |
GB (1) | GB2412240B (en) |
TW (1) | TWI336507B (en) |
WO (1) | WO2004055868A2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8564073B1 (en) | 2006-09-28 | 2013-10-22 | Hrl Laboratories, Llc | Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer |
US9479176B1 (en) | 2013-12-09 | 2016-10-25 | Rambus Inc. | Methods and circuits for protecting integrated circuits from reverse engineering |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7217977B2 (en) * | 2004-04-19 | 2007-05-15 | Hrl Laboratories, Llc | Covert transformation of transistor properties as a circuit protection method |
US7049667B2 (en) | 2002-09-27 | 2006-05-23 | Hrl Laboratories, Llc | Conductive channel pseudo block process and circuit to inhibit reverse engineering |
US6979606B2 (en) | 2002-11-22 | 2005-12-27 | Hrl Laboratories, Llc | Use of silicon block process step to camouflage a false transistor |
WO2004055868A2 (en) * | 2002-12-13 | 2004-07-01 | Hrl Laboratories, Llc | Integrated circuit modification using well implants |
US7242063B1 (en) | 2004-06-29 | 2007-07-10 | Hrl Laboratories, Llc | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable |
DE102005028905A1 (en) * | 2005-06-22 | 2006-12-28 | Infineon Technologies Ag | Transistor component for complementary MOS logic circuit, has substrate connecting contact arranged in substrate connecting region for conductively connecting substrate connecting region to supply voltage lead |
US9735781B2 (en) | 2009-02-24 | 2017-08-15 | Syphermedia International, Inc. | Physically unclonable camouflage structure and methods for fabricating same |
US8510700B2 (en) | 2009-02-24 | 2013-08-13 | Syphermedia International, Inc. | Method and apparatus for camouflaging a standard cell based integrated circuit with micro circuits and post processing |
US8151235B2 (en) * | 2009-02-24 | 2012-04-03 | Syphermedia International, Inc. | Camouflaging a standard cell based integrated circuit |
US10691860B2 (en) | 2009-02-24 | 2020-06-23 | Rambus Inc. | Secure logic locking and configuration with camouflaged programmable micro netlists |
US8418091B2 (en) | 2009-02-24 | 2013-04-09 | Syphermedia International, Inc. | Method and apparatus for camouflaging a standard cell based integrated circuit |
US8111089B2 (en) * | 2009-05-28 | 2012-02-07 | Syphermedia International, Inc. | Building block for a secure CMOS logic cell library |
US9401361B2 (en) * | 2014-02-12 | 2016-07-26 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor arrangement having first semiconductor device over first shallow well having first conductivity type and second semiconductor device over second shallow well having second conductivity type and formation thereof |
US10090260B2 (en) * | 2016-04-13 | 2018-10-02 | Ememory Technology Inc. | Semiconductor apparatus with fake functionality |
DE102016124590B4 (en) | 2016-12-16 | 2023-12-28 | Infineon Technologies Ag | SEMICONDUCTOR CHIP |
US11695011B2 (en) | 2018-05-02 | 2023-07-04 | Nanyang Technological University | Integrated circuit layout cell, integrated circuit layout arrangement, and methods of forming the same |
US10923596B2 (en) | 2019-03-08 | 2021-02-16 | Rambus Inc. | Camouflaged FinFET and method for producing same |
Citations (115)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3673471A (en) | 1970-10-08 | 1972-06-27 | Fairchild Camera Instr Co | Doped semiconductor electrodes for mos type devices |
US3946426A (en) | 1973-03-14 | 1976-03-23 | Harris Corporation | Interconnect system for integrated circuits |
US3983620A (en) * | 1975-05-08 | 1976-10-05 | National Semiconductor Corporation | Self-aligned CMOS process for bulk silicon and insulating substrate device |
US4017888A (en) | 1975-12-31 | 1977-04-12 | International Business Machines Corporation | Non-volatile metal nitride oxide semiconductor device |
US4101344A (en) | 1976-10-25 | 1978-07-18 | U.S. Philips Corporation | Method of manufacturing a semiconductor device |
US4139864A (en) | 1976-01-14 | 1979-02-13 | Schulman Lawrence S | Security system for a solid state device |
US4145701A (en) * | 1974-09-11 | 1979-03-20 | Hitachi, Ltd. | Semiconductor device |
US4164461A (en) | 1977-01-03 | 1979-08-14 | Raytheon Company | Semiconductor integrated circuit structures and manufacturing methods |
US4196443A (en) | 1978-08-25 | 1980-04-01 | Rca Corporation | Buried contact configuration for CMOS/SOS integrated circuits |
US4267578A (en) | 1974-08-26 | 1981-05-12 | Texas Instruments Incorporated | Calculator system with anti-theft feature |
US4291391A (en) | 1979-09-14 | 1981-09-22 | Texas Instruments Incorporated | Taper isolated random access memory array and method of operating |
US4295897A (en) | 1979-10-03 | 1981-10-20 | Texas Instruments Incorporated | Method of making CMOS integrated circuit device |
US4314268A (en) | 1978-05-31 | 1982-02-02 | Nippon Electric Co., Ltd. | Integrated circuit with shielded lead patterns |
US4317273A (en) | 1979-11-13 | 1982-03-02 | Texas Instruments Incorporated | Method of making high coupling ratio DMOS electrically programmable ROM |
US4322736A (en) | 1978-07-28 | 1982-03-30 | Nippon Electric Co., Ltd. | Short-resistant connection of polysilicon to diffusion |
US4374454A (en) | 1980-06-23 | 1983-02-22 | U.S. Philips Corporation | Method of manufacturing a semiconductor device |
US4393575A (en) | 1979-03-09 | 1983-07-19 | National Semiconductor Corporation | Process for manufacturing a JFET with an ion implanted stabilization layer |
US4409434A (en) | 1979-11-30 | 1983-10-11 | Electronique Marcel Dassault | Transistor integrated device, particularly usable for coding purposes |
US4435895A (en) | 1982-04-05 | 1984-03-13 | Bell Telephone Laboratories, Incorporated | Process for forming complementary integrated circuit devices |
US4471376A (en) | 1981-01-14 | 1984-09-11 | Harris Corporation | Amorphous devices and interconnect system and method of fabrication |
US4493740A (en) * | 1981-06-01 | 1985-01-15 | Matsushita Electric Industrial Company, Limited | Method for formation of isolation oxide regions in semiconductor substrates |
US4530150A (en) | 1982-09-20 | 1985-07-23 | Fujitsu Limited | Method of forming conductive channel extensions to active device regions in CMOS device |
US4581628A (en) | 1981-09-30 | 1986-04-08 | Hitachi, Ltd. | Circuit programming by use of an electrically conductive light shield |
US4583011A (en) | 1983-11-01 | 1986-04-15 | Standard Microsystems Corp. | Circuit to prevent pirating of an MOS circuit |
US4603381A (en) | 1982-06-30 | 1986-07-29 | Texas Instruments Incorporated | Use of implant process for programming ROM type processor for encryption |
US4623255A (en) | 1983-10-13 | 1986-11-18 | The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration | Method of examining microcircuit patterns |
US4636822A (en) * | 1984-08-27 | 1987-01-13 | International Business Machines Corporation | GaAs short channel lightly doped drain MESFET structure and fabrication |
US4727493A (en) | 1984-05-04 | 1988-02-23 | Integrated Logic Systems, Inc. | Integrated circuit architecture and fabrication method therefor |
US4727038A (en) | 1984-08-22 | 1988-02-23 | Mitsubishi Denki Kabushiki Kaisha | Method of fabricating semiconductor device |
US4729001A (en) * | 1981-07-27 | 1988-03-01 | Xerox Corporation | Short-channel field effect transistor |
US4753897A (en) | 1986-03-14 | 1988-06-28 | Motorola Inc. | Method for providing contact separation in silicided devices using false gate |
US4766516A (en) | 1987-09-24 | 1988-08-23 | Hughes Aircraft Company | Method and apparatus for securing integrated circuits from unauthorized copying and use |
US4771012A (en) * | 1986-06-13 | 1988-09-13 | Matsushita Electric Industrial Co., Ltd. | Method of making symmetrically controlled implanted regions using rotational angle of the substrate |
US4799096A (en) | 1986-06-06 | 1989-01-17 | Siemens Aktiengesellschaft | Monolithic integrated circuit comprising circuit branches parallel to one another |
US4821085A (en) | 1985-05-01 | 1989-04-11 | Texas Instruments Incorporated | VLSI local interconnect structure |
US4829356A (en) | 1986-05-30 | 1989-05-09 | Telefunken Electronic Gmbh | Lateral transistor with buried semiconductor zone |
US4830974A (en) | 1988-01-11 | 1989-05-16 | Atmel Corporation | EPROM fabrication process |
US4860084A (en) * | 1984-09-03 | 1989-08-22 | Kabushiki Kaisha Toshiba | Semiconductor device MOSFET with V-shaped drain contact |
US4912053A (en) * | 1988-02-01 | 1990-03-27 | Harris Corporation | Ion implanted JFET with self-aligned source and drain |
US4939567A (en) | 1987-12-21 | 1990-07-03 | Ibm Corporation | Trench interconnect for CMOS diffusion regions |
US4962484A (en) | 1988-01-25 | 1990-10-09 | Hitachi, Ltd. | Non-volatile memory device |
US4975756A (en) | 1985-05-01 | 1990-12-04 | Texas Instruments Incorporated | SRAM with local interconnect |
US4998151A (en) | 1989-04-13 | 1991-03-05 | General Electric Company | Power field effect devices having small cell size and low contact resistance |
US5015596A (en) | 1984-04-18 | 1991-05-14 | Kabushiki Kaisha Toshiba | Method of making a GaAs JFET with self-aligned p-type gate by outdiffusion of dopont from the metallic gate |
US5030796A (en) | 1989-08-11 | 1991-07-09 | Rockwell International Corporation | Reverse-engineering resistant encapsulant for microelectric device |
US5050123A (en) | 1990-11-13 | 1991-09-17 | Intel Corporation | Radiation shield for EPROM cells |
US5061978A (en) | 1986-02-28 | 1991-10-29 | Canon Kabushiki Kaisha | Semiconductor photosensing device with light shield |
US5065208A (en) | 1987-01-30 | 1991-11-12 | Texas Instruments Incorporated | Integrated bipolar and CMOS transistor with titanium nitride interconnections |
US5068697A (en) | 1989-07-18 | 1991-11-26 | Sony Corporation | Semiconductor memory which is protected from erasure by light shields |
US5070378A (en) | 1988-09-22 | 1991-12-03 | Nec Corporation | Eprom erasable by uv radiation having redundant circuit |
US5073812A (en) | 1989-05-11 | 1991-12-17 | Mitubishi Denki Kabushiki Kaisha | Heterojunction bipolar transistor |
US5101121A (en) | 1990-01-09 | 1992-03-31 | Sgs Thomson Microelectronics S.A. | Security locks for integrated circuit |
US5117276A (en) | 1989-08-14 | 1992-05-26 | Fairchild Camera And Instrument Corp. | High performance interconnect system for an integrated circuit |
US5120669A (en) | 1991-02-06 | 1992-06-09 | Harris Corporation | Method of forming self-aligned top gate channel barrier region in ion-implanted JFET |
US5121186A (en) | 1984-06-15 | 1992-06-09 | Hewlett-Packard Company | Integrated circuit device having improved junction connections |
US5121089A (en) | 1990-11-01 | 1992-06-09 | Hughes Aircraft Company | Micro-machined switch and method of fabrication |
US5132571A (en) | 1990-08-01 | 1992-07-21 | Actel Corporation | Programmable interconnect architecture having interconnects disposed above function modules |
US5138197A (en) | 1990-05-23 | 1992-08-11 | Kabushiki Kaisha Toshiba | Address decoder array composed of CMOS |
US5146117A (en) | 1991-04-01 | 1992-09-08 | Hughes Aircraft Company | Convertible multi-function microelectronic logic gate structure and method of fabricating the same |
US5168340A (en) | 1988-08-17 | 1992-12-01 | Texas Instruments Incorporated | Semiconductor integrated circuit device with guardring regions to prevent the formation of an MOS diode |
US5177589A (en) | 1990-01-29 | 1993-01-05 | Hitachi, Ltd. | Refractory metal thin film having a particular step coverage factor and ratio of surface roughness |
US5202591A (en) | 1991-08-09 | 1993-04-13 | Hughes Aircraft Company | Dynamic circuit disguise for microelectronic integrated digital logic circuits |
US5210437A (en) * | 1990-04-20 | 1993-05-11 | Kabushiki Kaisha Toshiba | MOS device having a well layer for controlling threshold voltage |
US5225699A (en) | 1991-02-08 | 1993-07-06 | Mitsubishi Denki Kabushiki Kaisha | Dram having a large dielectric breakdown voltage between an adjacent conductive layer and a capacitor electrode and method of manufacture thereof |
US5227649A (en) | 1989-02-27 | 1993-07-13 | Texas Instruments Incorporated | Circuit layout and method for VLSI circuits having local interconnects |
US5231299A (en) | 1992-03-24 | 1993-07-27 | International Business Machines Corporation | Structure and fabrication method for EEPROM memory cell with selective channel implants |
US5309015A (en) | 1991-11-14 | 1994-05-03 | Hitachi, Ltd. | Clock wiring and semiconductor integrated circuit device having the same |
US5308682A (en) | 1991-10-01 | 1994-05-03 | Nec Corporation | Alignment check pattern for multi-level interconnection |
US5317197A (en) | 1992-10-20 | 1994-05-31 | Micron Semiconductor, Inc. | Semiconductor device |
US5341013A (en) | 1991-06-28 | 1994-08-23 | Kabushiki Kaisha Toshiba | Semiconductor device provided with sense circuits |
US5345105A (en) | 1992-02-03 | 1994-09-06 | Motorola, Inc. | Structure for shielding conductors |
US5354704A (en) * | 1993-07-28 | 1994-10-11 | United Microelectronics Corporation | Symmetric SRAM cell with buried N+ local interconnection line |
US5369299A (en) | 1993-07-22 | 1994-11-29 | National Semiconductor Corporation | Tamper resistant integrated circuit structure |
US5371390A (en) | 1990-10-15 | 1994-12-06 | Aptix Corporation | Interconnect substrate with circuits for field-programmability and testing of multichip modules and hybrid circuits |
US5376577A (en) | 1994-06-30 | 1994-12-27 | Micron Semiconductor, Inc. | Method of forming a low resistive current path between a buried contact and a diffusion region |
US5378641A (en) * | 1993-02-22 | 1995-01-03 | Micron Semiconductor, Inc. | Electrically conductive substrate interconnect continuity region and method of forming same with an angled implant |
US5384472A (en) | 1992-06-10 | 1995-01-24 | Aspec Technology, Inc. | Symmetrical multi-layer metal logic array with continuous substrate taps and extension portions for increased gate density |
US5384475A (en) | 1991-10-09 | 1995-01-24 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
US5399441A (en) | 1994-04-12 | 1995-03-21 | Dow Corning Corporation | Method of applying opaque coatings |
US5404040A (en) | 1990-12-21 | 1995-04-04 | Siliconix Incorporated | Structure and fabrication of power MOSFETs, including termination structures |
US5412237A (en) | 1992-03-12 | 1995-05-02 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device with improved element isolation and operation rate |
US5441902A (en) | 1991-07-31 | 1995-08-15 | Texas Instruments Incorporated | Method for making channel stop structure for CMOS devices |
US5468990A (en) | 1993-07-22 | 1995-11-21 | National Semiconductor Corp. | Structures for preventing reverse engineering of integrated circuits |
US5475251A (en) | 1994-05-31 | 1995-12-12 | National Semiconductor Corporation | Secure non-volatile memory cell |
US5506806A (en) | 1993-09-20 | 1996-04-09 | Nec Corporation | Memory protection circuit for EPROM |
US5531018A (en) | 1993-12-20 | 1996-07-02 | General Electric Company | Method of micromachining electromagnetically actuated current switches with polyimide reinforcement seals, and switches produced thereby |
US5539224A (en) | 1991-03-18 | 1996-07-23 | Fujitsu Limited | Semiconductor device having unit circuit-blocks in a common chip as a first layer with electrical interconnections therebetween provided exclusively in a second, upper, interconnection layer formed on the first layer |
US5541614A (en) | 1995-04-04 | 1996-07-30 | Hughes Aircraft Company | Smart antenna system using microelectromechanically tunable dipole antennas and photonic bandgap materials |
US5571735A (en) | 1994-06-21 | 1996-11-05 | Nec Corporation | Method of manufacturing a semiconducter device capable of easily forming metal silicide films on source and drain regions |
US5576988A (en) | 1995-04-27 | 1996-11-19 | National Semiconductor Corporation | Secure non-volatile memory array |
US5611940A (en) | 1994-04-28 | 1997-03-18 | Siemens Aktiengesellschaft | Microsystem with integrated circuit and micromechanical component, and production process |
US5638946A (en) | 1996-01-11 | 1997-06-17 | Northeastern University | Micromechanical switch with insulated switch contact |
US5677557A (en) | 1995-06-28 | 1997-10-14 | Taiwan Semiconductor Manufacturing Company, Ltd | Method for forming buried plug contacts on semiconductor integrated circuits |
US5679595A (en) | 1994-10-11 | 1997-10-21 | Mosel Vitelic, Inc. | Self-registered capacitor bottom plate-local interconnect scheme for DRAM |
US5719430A (en) | 1993-05-01 | 1998-02-17 | Nec Corporation | Buried-channel MOS transistor and process of producing same |
US5719422A (en) | 1994-08-18 | 1998-02-17 | Sun Microsystems, Inc. | Low threshold voltage, high performance junction transistor |
US5721150A (en) | 1993-10-25 | 1998-02-24 | Lsi Logic Corporation | Use of silicon for integrated circuit device interconnection by direct writing of patterns therein |
US5783846A (en) | 1995-09-22 | 1998-07-21 | Hughes Electronics Corporation | Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
US5783375A (en) | 1995-09-02 | 1998-07-21 | Eastman Kodak Company | Method of processing a color photographic silver halide material |
US5811340A (en) * | 1996-10-25 | 1998-09-22 | Lg Semicon Co., Ltd. | Metal oxide semiconductor field effect transistor and method of manufacturing the same |
US5821590A (en) | 1995-07-24 | 1998-10-13 | Samsung Electronics Co., Ltd. | Semiconductor interconnection device with both n- and p-doped regions |
US5821147A (en) | 1995-12-11 | 1998-10-13 | Lucent Technologies, Inc. | Integrated circuit fabrication |
US5834356A (en) | 1997-06-27 | 1998-11-10 | Vlsi Technology, Inc. | Method of making high resistive structures in salicided process semiconductor devices |
US5838047A (en) | 1995-06-16 | 1998-11-17 | Mitsubishi Denki Kabushiki Kaisha | CMOS substrate biasing for threshold voltage control |
US5854510A (en) | 1996-12-27 | 1998-12-29 | Vlsi Technology, Inc. | Low power programmable fuse structures |
US5858843A (en) | 1996-09-27 | 1999-01-12 | Intel Corporation | Low temperature method of forming gate electrode and gate dielectric |
US5866933A (en) | 1992-07-31 | 1999-02-02 | Hughes Electronics Corporation | Integrated circuit security system and method with implanted interconnections |
US5880503A (en) | 1996-08-07 | 1999-03-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor integrated circuit device having static memory cell with CMOS structure |
US5888887A (en) | 1997-12-15 | 1999-03-30 | Chartered Semiconductor Manufacturing, Ltd. | Trenchless buried contact process technology |
US5973375A (en) * | 1997-06-06 | 1999-10-26 | Hughes Electronics Corporation | Camouflaged circuit structure with step implants |
US6373106B2 (en) * | 1996-09-10 | 2002-04-16 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and method for fabricating the same |
US6566204B1 (en) * | 2000-03-31 | 2003-05-20 | National Semiconductor Corporation | Use of mask shadowing and angled implantation in fabricating asymmetrical field-effect transistors |
US6740942B2 (en) * | 2001-06-15 | 2004-05-25 | Hrl Laboratories, Llc. | Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact |
US6815816B1 (en) * | 2000-10-25 | 2004-11-09 | Hrl Laboratories, Llc | Implanted hidden interconnections in a semiconductor device for preventing reverse engineering |
US6825530B1 (en) * | 2003-06-11 | 2004-11-30 | International Business Machines Corporation | Zero Threshold Voltage pFET and method of making same |
Family Cites Families (116)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US758792A (en) * | 1901-12-20 | 1904-05-03 | David Albert Stewart | Straw-cutter. |
US3898105A (en) * | 1973-10-25 | 1975-08-05 | Mostek Corp | Method for making FET circuits |
US4143854A (en) * | 1975-05-06 | 1979-03-13 | Manfred Vetter | Jacking device |
FR2486717A1 (en) | 1980-07-08 | 1982-01-15 | Dassault Electronique | Transistor circuit providing coding on credit card - uses mock components with properties determined by doping to prevent decoding by examination under microscope |
JPS5816565A (en) * | 1981-07-22 | 1983-01-31 | Hitachi Ltd | Insulating gate type field effect transistor |
JPS61150369A (en) | 1984-12-25 | 1986-07-09 | Toshiba Corp | Read-only semiconductor memory device and manufacture thereof |
US4931411A (en) * | 1985-05-01 | 1990-06-05 | Texas Instruments Incorporated | Integrated circuit process with TiN-gate transistor |
US4814854A (en) * | 1985-05-01 | 1989-03-21 | Texas Instruments Incorporated | Integrated circuit device and process with tin-gate transistor |
US5016077A (en) * | 1985-08-26 | 1991-05-14 | Kabushiki Kaisha Toshiba | Insulated gate type semiconductor device and method of manufacturing the same |
JP2755613B2 (en) | 1988-09-26 | 1998-05-20 | 株式会社東芝 | Semiconductor device |
US4933898A (en) | 1989-01-12 | 1990-06-12 | General Instrument Corporation | Secure integrated circuit chip with conductive shield |
JPH02188944A (en) * | 1989-01-17 | 1990-07-25 | Sharp Corp | Semiconductor integrated circuit device |
US4927777A (en) * | 1989-01-24 | 1990-05-22 | Harris Corporation | Method of making a MOS transistor |
JPH02237038A (en) * | 1989-03-09 | 1990-09-19 | Ricoh Co Ltd | Semiconductor device |
JPH0316123A (en) * | 1989-03-29 | 1991-01-24 | Mitsubishi Electric Corp | Ion implantation and semiconductor device thereby manufactured |
EP0463373A3 (en) | 1990-06-29 | 1992-03-25 | Texas Instruments Incorporated | Local interconnect using a material comprising tungsten |
KR940023321A (en) * | 1993-03-25 | 1994-10-22 | 한민호 | High power factor constant power electronic ballast |
US5386641A (en) * | 1993-10-28 | 1995-02-07 | At&T Corp. | Taping alignment tool for printed circuit boards |
JPH07312423A (en) * | 1994-05-17 | 1995-11-28 | Hitachi Ltd | Mis type semiconductor device |
US5650340A (en) * | 1994-08-18 | 1997-07-22 | Sun Microsystems, Inc. | Method of making asymmetric low power MOS devices |
US5472894A (en) * | 1994-08-23 | 1995-12-05 | United Microelectronics Corp. | Method of fabricating lightly doped drain transistor device |
US6031272A (en) * | 1994-11-16 | 2000-02-29 | Matsushita Electric Industrial Co., Ltd. | MOS type semiconductor device having an impurity diffusion layer with a nonuniform impurity concentration profile in a channel region |
US5675167A (en) * | 1994-11-24 | 1997-10-07 | Nippondenso Co., Ltd. | Enhancement-type semiconductor having reduced leakage current |
JP3611901B2 (en) * | 1994-12-09 | 2005-01-19 | セイコーインスツル株式会社 | Manufacturing method of semiconductor device |
US5580804A (en) * | 1994-12-15 | 1996-12-03 | Advanced Micro Devices, Inc. | Method for fabricating true LDD devices in a MOS technology |
US5510279A (en) * | 1995-01-06 | 1996-04-23 | United Microelectronics Corp. | Method of fabricating an asymmetric lightly doped drain transistor device |
US5478763A (en) * | 1995-01-19 | 1995-12-26 | United Microelectronics Corporation | High performance field effect transistor and method of manufacture thereof |
JP2710221B2 (en) * | 1995-01-25 | 1998-02-10 | 日本電気株式会社 | Semiconductor device and manufacturing method thereof |
US5744372A (en) * | 1995-04-12 | 1998-04-28 | National Semiconductor Corporation | Fabrication of complementary field-effect transistors each having multi-part channel |
US6153484A (en) | 1995-06-19 | 2000-11-28 | Imec Vzw | Etching process of CoSi2 layers |
JP3521097B2 (en) * | 1995-07-03 | 2004-04-19 | シャープ株式会社 | Method of manufacturing surface channel type CMOS transistor |
KR100202633B1 (en) * | 1995-07-26 | 1999-06-15 | 구본준 | Method for manufacturing semiconductor device |
US6127700A (en) * | 1995-09-12 | 2000-10-03 | National Semiconductor Corporation | Field-effect transistor having local threshold-adjust doping |
US5763916A (en) * | 1996-04-19 | 1998-06-09 | Micron Technology, Inc. | Structure and method for improved storage node isolation |
CN1196832A (en) * | 1996-06-28 | 1998-10-21 | 精工爱普生株式会社 | Thin film transistor, method of its manufacture and circuit and liquid crystal display using thin film transistor |
US6037627A (en) * | 1996-08-02 | 2000-03-14 | Seiko Instruments Inc. | MOS semiconductor device |
US5877050A (en) * | 1996-09-03 | 1999-03-02 | Advanced Micro Devices, Inc. | Method of making N-channel and P-channel devices using two tube anneals and two rapid thermal anneals |
US5759897A (en) * | 1996-09-03 | 1998-06-02 | Advanced Micro Devices, Inc. | Method of making an asymmetrical transistor with lightly and heavily doped drain regions and ultra-heavily doped source region |
US5648286A (en) * | 1996-09-03 | 1997-07-15 | Advanced Micro Devices, Inc. | Method of making asymmetrical transistor with lightly doped drain region, heavily doped source and drain regions, and ultra-heavily doped source region |
US5909622A (en) * | 1996-10-01 | 1999-06-01 | Advanced Micro Devices, Inc. | Asymmetrical p-channel transistor formed by nitrided oxide and large tilt angle LDD implant |
US5789298A (en) * | 1996-11-04 | 1998-08-04 | Advanced Micro Devices, Inc. | High performance mosfet structure having asymmetrical spacer formation and method of making the same |
US5998272A (en) * | 1996-11-12 | 1999-12-07 | Advanced Micro Devices, Inc. | Silicidation and deep source-drain formation prior to source-drain extension formation |
JP2924832B2 (en) | 1996-11-28 | 1999-07-26 | 日本電気株式会社 | Method for manufacturing semiconductor device |
US6010929A (en) * | 1996-12-11 | 2000-01-04 | Texas Instruments Incorporated | Method for forming high voltage and low voltage transistors on the same substrate |
US5702972A (en) * | 1997-01-27 | 1997-12-30 | Taiwan Semiconductor Manufacturing Company Ltd. | Method of fabricating MOSFET devices |
US5998257A (en) | 1997-03-13 | 1999-12-07 | Micron Technology, Inc. | Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry |
US5920097A (en) * | 1997-03-26 | 1999-07-06 | Advanced Micro Devices, Inc. | Compact, dual-transistor integrated circuit |
US5895241A (en) * | 1997-03-28 | 1999-04-20 | Lu; Tao Cheng | Method for fabricating a cell structure for mask ROM |
US5874328A (en) * | 1997-06-30 | 1999-02-23 | Advanced Micro Devices, Inc. | Reverse CMOS method for dual isolation semiconductor device |
US6080614A (en) * | 1997-06-30 | 2000-06-27 | Intersil Corp | Method of making a MOS-gated semiconductor device with a single diffusion |
JP3445472B2 (en) * | 1997-08-04 | 2003-09-08 | 日本電信電話株式会社 | Semiconductor device |
US5960291A (en) * | 1997-08-08 | 1999-09-28 | Advanced Micro Devices, Inc. | Asymmetric channel transistor and method for making same |
US5891782A (en) * | 1997-08-21 | 1999-04-06 | Sharp Microelectronics Technology, Inc. | Method for fabricating an asymmetric channel doped MOS structure |
TW437099B (en) * | 1997-09-26 | 2001-05-28 | Matsushita Electronics Corp | Non-volatile semiconductor memory device and the manufacturing method thereof |
US5925914A (en) * | 1997-10-06 | 1999-07-20 | Advanced Micro Devices | Asymmetric S/D structure to improve transistor performance by reducing Miller capacitance |
US6137318A (en) | 1997-12-09 | 2000-10-24 | Oki Electric Industry Co., Ltd. | Logic circuit having dummy MOS transistor |
US6054659A (en) * | 1998-03-09 | 2000-04-25 | General Motors Corporation | Integrated electrostatically-actuated micromachined all-metal micro-relays |
US6229177B1 (en) * | 1998-03-30 | 2001-05-08 | Advanced Micro Devices, Inc. | Semiconductor with laterally non-uniform channel doping profile |
KR100268882B1 (en) | 1998-04-02 | 2000-10-16 | 김영환 | Securing circuit for semiconductor memory device |
US6172899B1 (en) * | 1998-05-08 | 2001-01-09 | Micron Technology. Inc. | Static-random-access-memory cell |
US6046659A (en) * | 1998-05-15 | 2000-04-04 | Hughes Electronics Corporation | Design and fabrication of broadband surface-micromachined micro-electro-mechanical switches for microwave and millimeter-wave applications |
JP2000012687A (en) * | 1998-06-23 | 2000-01-14 | Mitsubishi Electric Corp | Semiconductor device and manufacture thereof |
JP2000040809A (en) * | 1998-07-23 | 2000-02-08 | Seiko Epson Corp | Semiconductor device |
US6355508B1 (en) | 1998-09-02 | 2002-03-12 | Micron Technology, Inc. | Method for forming electrostatic discharge protection device having a graded junction |
US6215158B1 (en) * | 1998-09-10 | 2001-04-10 | Lucent Technologies Inc. | Device and method for forming semiconductor interconnections in an integrated circuit substrate |
US6146952A (en) * | 1998-10-01 | 2000-11-14 | Advanced Micro Devices | Semiconductor device having self-aligned asymmetric source/drain regions and method of fabrication thereof |
US6093609A (en) * | 1998-11-18 | 2000-07-25 | United Microelectronics Corp. | Method for forming semiconductor device with common gate, source and well |
US6291325B1 (en) * | 1998-11-18 | 2001-09-18 | Sharp Laboratories Of America, Inc. | Asymmetric MOS channel structure with drain extension and method for same |
US6242329B1 (en) * | 1999-02-03 | 2001-06-05 | Advanced Micro Devices, Inc. | Method for manufacturing asymmetric channel transistor |
US6103563A (en) * | 1999-03-17 | 2000-08-15 | Advanced Micro Devices, Inc. | Nitride disposable spacer to reduce mask count in CMOS transistor formation |
US6326675B1 (en) * | 1999-03-18 | 2001-12-04 | Philips Semiconductor, Inc. | Semiconductor device with transparent link area for silicide applications and fabrication thereof |
US6117762A (en) * | 1999-04-23 | 2000-09-12 | Hrl Laboratories, Llc | Method and apparatus using silicide layer for protecting integrated circuits from reverse engineering |
US6384457B2 (en) * | 1999-05-03 | 2002-05-07 | Intel Corporation | Asymmetric MOSFET devices |
US6255174B1 (en) * | 1999-06-15 | 2001-07-03 | Advanced Micro Devices, Inc. | Mos transistor with dual pocket implant |
US6365453B1 (en) * | 1999-06-16 | 2002-04-02 | Micron Technology, Inc. | Method and structure for reducing contact aspect ratios |
US6057520A (en) * | 1999-06-30 | 2000-05-02 | Mcnc | Arc resistant high voltage micromachined electrostatic switch |
US6261912B1 (en) * | 1999-08-10 | 2001-07-17 | United Microelectronics Corp. | Method of fabricating a transistor |
US6479350B1 (en) * | 1999-08-18 | 2002-11-12 | Advanced Micro Devices, Inc. | Reduced masking step CMOS transistor formation using removable amorphous silicon sidewall spacers |
US6465315B1 (en) * | 2000-01-03 | 2002-10-15 | Advanced Micro Devices, Inc. | MOS transistor with local channel compensation implant |
TW439299B (en) * | 2000-01-11 | 2001-06-07 | United Microelectronics Corp | Manufacturing method of metal oxide semiconductor having selective silicon epitaxial growth |
US6399452B1 (en) * | 2000-07-08 | 2002-06-04 | Advanced Micro Devices, Inc. | Method of fabricating transistors with low thermal budget |
US7217977B2 (en) * | 2004-04-19 | 2007-05-15 | Hrl Laboratories, Llc | Covert transformation of transistor properties as a circuit protection method |
JP2002170886A (en) * | 2000-09-19 | 2002-06-14 | Seiko Instruments Inc | Semiconductor device for reference voltage and manufacturing method thereof |
EP1193758A1 (en) | 2000-10-02 | 2002-04-03 | STMicroelectronics S.r.l. | Anti-deciphering contacts |
EP1202353A1 (en) | 2000-10-27 | 2002-05-02 | STMicroelectronics S.r.l. | Mask programmed ROM and method of fabrication |
TW471044B (en) * | 2000-11-14 | 2002-01-01 | Vanguard Int Semiconduct Corp | Method for producing dummy gate of ESD protective device |
DE10058078C1 (en) * | 2000-11-23 | 2002-04-11 | Infineon Technologies Ag | Integrated circuit with analyzer protection has gaps left by first group of conducting tracks in wiring plane and filled by second group of conducting tracks provided for protection of IC |
TWI288472B (en) * | 2001-01-18 | 2007-10-11 | Toshiba Corp | Semiconductor device and method of fabricating the same |
US7294935B2 (en) * | 2001-01-24 | 2007-11-13 | Hrl Laboratories, Llc | Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide |
JP2002252289A (en) * | 2001-02-27 | 2002-09-06 | Fuji Electric Co Ltd | Semiconductor integrated circuit device and its fabrication method |
DE10120520A1 (en) * | 2001-04-26 | 2002-11-14 | Infineon Technologies Ag | Semiconductor device and manufacturing process |
US6466489B1 (en) * | 2001-05-18 | 2002-10-15 | International Business Machines Corporation | Use of source/drain asymmetry MOSFET devices in dynamic and analog circuits |
TWI222747B (en) * | 2001-05-29 | 2004-10-21 | Macronix Int Co Ltd | Method of manufacturing metal-oxide semiconductor transistor |
US6911694B2 (en) * | 2001-06-27 | 2005-06-28 | Ricoh Company, Ltd. | Semiconductor device and method for fabricating such device |
US6476449B1 (en) * | 2001-09-05 | 2002-11-05 | Winbond Electronics Corp. | Silicide block for ESD protection devices |
JP2003086807A (en) * | 2001-09-10 | 2003-03-20 | Oki Electric Ind Co Ltd | Method of manufacturing field effect transistor |
JP2003100899A (en) * | 2001-09-27 | 2003-04-04 | Mitsubishi Electric Corp | Semiconductor device and its manufacturing method |
US6921690B2 (en) * | 2001-12-20 | 2005-07-26 | Intersil Americas Inc. | Method of fabricating enhanced EPROM structures with accentuated hot electron generation regions |
KR100502407B1 (en) * | 2002-04-11 | 2005-07-19 | 삼성전자주식회사 | Gate Structure Having High-k Dielectric And Highly Conductive Electrode And Method Of Forming The Same |
JP3868324B2 (en) | 2002-04-15 | 2007-01-17 | 三菱電機株式会社 | Silicon nitride film forming method, film forming apparatus, and semiconductor device manufacturing method |
JP3746246B2 (en) * | 2002-04-16 | 2006-02-15 | 株式会社東芝 | Manufacturing method of semiconductor device |
JP2003324159A (en) * | 2002-04-26 | 2003-11-14 | Ricoh Co Ltd | Semiconductor device |
KR100958421B1 (en) * | 2002-09-14 | 2010-05-18 | 페어차일드코리아반도체 주식회사 | Power device and method for manufacturing the same |
US7049667B2 (en) * | 2002-09-27 | 2006-05-23 | Hrl Laboratories, Llc | Conductive channel pseudo block process and circuit to inhibit reverse engineering |
JP2004134589A (en) * | 2002-10-10 | 2004-04-30 | Sanyo Electric Co Ltd | Semiconductor device |
US6833307B1 (en) * | 2002-10-30 | 2004-12-21 | Advanced Micro Devices, Inc. | Method for manufacturing a semiconductor component having an early halo implant |
US7208383B1 (en) * | 2002-10-30 | 2007-04-24 | Advanced Micro Devices, Inc. | Method of manufacturing a semiconductor component |
US6979606B2 (en) * | 2002-11-22 | 2005-12-27 | Hrl Laboratories, Llc | Use of silicon block process step to camouflage a false transistor |
WO2004055868A2 (en) * | 2002-12-13 | 2004-07-01 | Hrl Laboratories, Llc | Integrated circuit modification using well implants |
US6746924B1 (en) * | 2003-02-27 | 2004-06-08 | International Business Machines Corporation | Method of forming asymmetric extension mosfet using a drain side spacer |
US7012273B2 (en) * | 2003-08-14 | 2006-03-14 | Silicon Storage Technology, Inc. | Phase change memory device employing thermal-electrical contacts with narrowing electrical current paths |
US7179712B2 (en) * | 2003-08-14 | 2007-02-20 | Freescale Semiconductor, Inc. | Multibit ROM cell and method therefor |
US7214575B2 (en) * | 2004-01-06 | 2007-05-08 | Micron Technology, Inc. | Method and apparatus providing CMOS imager device pixel with transistor having lower threshold voltage than other imager device transistors |
US7242063B1 (en) * | 2004-06-29 | 2007-07-10 | Hrl Laboratories, Llc | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable |
JP2006073939A (en) * | 2004-09-06 | 2006-03-16 | Toshiba Corp | Nonvolatile semiconductor memory and manufacturing method thereof |
JP4540438B2 (en) * | 2004-09-27 | 2010-09-08 | 富士通セミコンダクター株式会社 | Semiconductor device and manufacturing method thereof |
-
2003
- 2003-12-10 WO PCT/US2003/039594 patent/WO2004055868A2/en active Application Filing
- 2003-12-10 AU AU2003293540A patent/AU2003293540A1/en not_active Abandoned
- 2003-12-10 JP JP2004560826A patent/JP4846239B2/en not_active Expired - Fee Related
- 2003-12-12 US US10/735,841 patent/US7514755B2/en not_active Expired - Fee Related
- 2003-12-12 TW TW092135214A patent/TWI336507B/en not_active IP Right Cessation
-
2005
- 2005-06-15 GB GB0512203A patent/GB2412240B/en not_active Expired - Fee Related
-
2009
- 2009-03-06 US US12/399,628 patent/US8524553B2/en not_active Expired - Fee Related
Patent Citations (118)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3673471A (en) | 1970-10-08 | 1972-06-27 | Fairchild Camera Instr Co | Doped semiconductor electrodes for mos type devices |
US3946426A (en) | 1973-03-14 | 1976-03-23 | Harris Corporation | Interconnect system for integrated circuits |
US4267578A (en) | 1974-08-26 | 1981-05-12 | Texas Instruments Incorporated | Calculator system with anti-theft feature |
US4145701A (en) * | 1974-09-11 | 1979-03-20 | Hitachi, Ltd. | Semiconductor device |
US3983620A (en) * | 1975-05-08 | 1976-10-05 | National Semiconductor Corporation | Self-aligned CMOS process for bulk silicon and insulating substrate device |
US4017888A (en) | 1975-12-31 | 1977-04-12 | International Business Machines Corporation | Non-volatile metal nitride oxide semiconductor device |
US4139864A (en) | 1976-01-14 | 1979-02-13 | Schulman Lawrence S | Security system for a solid state device |
US4101344A (en) | 1976-10-25 | 1978-07-18 | U.S. Philips Corporation | Method of manufacturing a semiconductor device |
US4164461A (en) | 1977-01-03 | 1979-08-14 | Raytheon Company | Semiconductor integrated circuit structures and manufacturing methods |
US4314268A (en) | 1978-05-31 | 1982-02-02 | Nippon Electric Co., Ltd. | Integrated circuit with shielded lead patterns |
US4322736A (en) | 1978-07-28 | 1982-03-30 | Nippon Electric Co., Ltd. | Short-resistant connection of polysilicon to diffusion |
US4196443A (en) | 1978-08-25 | 1980-04-01 | Rca Corporation | Buried contact configuration for CMOS/SOS integrated circuits |
US4393575A (en) | 1979-03-09 | 1983-07-19 | National Semiconductor Corporation | Process for manufacturing a JFET with an ion implanted stabilization layer |
US4291391A (en) | 1979-09-14 | 1981-09-22 | Texas Instruments Incorporated | Taper isolated random access memory array and method of operating |
US4295897A (en) | 1979-10-03 | 1981-10-20 | Texas Instruments Incorporated | Method of making CMOS integrated circuit device |
US4295897B1 (en) | 1979-10-03 | 1997-09-09 | Texas Instruments Inc | Method of making cmos integrated circuit device |
US4317273A (en) | 1979-11-13 | 1982-03-02 | Texas Instruments Incorporated | Method of making high coupling ratio DMOS electrically programmable ROM |
US4409434A (en) | 1979-11-30 | 1983-10-11 | Electronique Marcel Dassault | Transistor integrated device, particularly usable for coding purposes |
US4374454A (en) | 1980-06-23 | 1983-02-22 | U.S. Philips Corporation | Method of manufacturing a semiconductor device |
US4471376A (en) | 1981-01-14 | 1984-09-11 | Harris Corporation | Amorphous devices and interconnect system and method of fabrication |
US4493740A (en) * | 1981-06-01 | 1985-01-15 | Matsushita Electric Industrial Company, Limited | Method for formation of isolation oxide regions in semiconductor substrates |
US4729001A (en) * | 1981-07-27 | 1988-03-01 | Xerox Corporation | Short-channel field effect transistor |
US4581628A (en) | 1981-09-30 | 1986-04-08 | Hitachi, Ltd. | Circuit programming by use of an electrically conductive light shield |
US4435895A (en) | 1982-04-05 | 1984-03-13 | Bell Telephone Laboratories, Incorporated | Process for forming complementary integrated circuit devices |
US4603381A (en) | 1982-06-30 | 1986-07-29 | Texas Instruments Incorporated | Use of implant process for programming ROM type processor for encryption |
US4530150A (en) | 1982-09-20 | 1985-07-23 | Fujitsu Limited | Method of forming conductive channel extensions to active device regions in CMOS device |
US4623255A (en) | 1983-10-13 | 1986-11-18 | The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration | Method of examining microcircuit patterns |
US4583011A (en) | 1983-11-01 | 1986-04-15 | Standard Microsystems Corp. | Circuit to prevent pirating of an MOS circuit |
US5015596A (en) | 1984-04-18 | 1991-05-14 | Kabushiki Kaisha Toshiba | Method of making a GaAs JFET with self-aligned p-type gate by outdiffusion of dopont from the metallic gate |
US4727493A (en) | 1984-05-04 | 1988-02-23 | Integrated Logic Systems, Inc. | Integrated circuit architecture and fabrication method therefor |
US5121186A (en) | 1984-06-15 | 1992-06-09 | Hewlett-Packard Company | Integrated circuit device having improved junction connections |
US4727038A (en) | 1984-08-22 | 1988-02-23 | Mitsubishi Denki Kabushiki Kaisha | Method of fabricating semiconductor device |
US4636822A (en) * | 1984-08-27 | 1987-01-13 | International Business Machines Corporation | GaAs short channel lightly doped drain MESFET structure and fabrication |
US4860084A (en) * | 1984-09-03 | 1989-08-22 | Kabushiki Kaisha Toshiba | Semiconductor device MOSFET with V-shaped drain contact |
US4821085A (en) | 1985-05-01 | 1989-04-11 | Texas Instruments Incorporated | VLSI local interconnect structure |
US5302539A (en) | 1985-05-01 | 1994-04-12 | Texas Instruments Incorporated | VLSI interconnect method and structure |
US4975756A (en) | 1985-05-01 | 1990-12-04 | Texas Instruments Incorporated | SRAM with local interconnect |
US5061978A (en) | 1986-02-28 | 1991-10-29 | Canon Kabushiki Kaisha | Semiconductor photosensing device with light shield |
US4753897A (en) | 1986-03-14 | 1988-06-28 | Motorola Inc. | Method for providing contact separation in silicided devices using false gate |
US4829356A (en) | 1986-05-30 | 1989-05-09 | Telefunken Electronic Gmbh | Lateral transistor with buried semiconductor zone |
US4799096A (en) | 1986-06-06 | 1989-01-17 | Siemens Aktiengesellschaft | Monolithic integrated circuit comprising circuit branches parallel to one another |
US4771012A (en) * | 1986-06-13 | 1988-09-13 | Matsushita Electric Industrial Co., Ltd. | Method of making symmetrically controlled implanted regions using rotational angle of the substrate |
US5065208A (en) | 1987-01-30 | 1991-11-12 | Texas Instruments Incorporated | Integrated bipolar and CMOS transistor with titanium nitride interconnections |
US4766516A (en) | 1987-09-24 | 1988-08-23 | Hughes Aircraft Company | Method and apparatus for securing integrated circuits from unauthorized copying and use |
US4939567A (en) | 1987-12-21 | 1990-07-03 | Ibm Corporation | Trench interconnect for CMOS diffusion regions |
US4830974A (en) | 1988-01-11 | 1989-05-16 | Atmel Corporation | EPROM fabrication process |
US4962484A (en) | 1988-01-25 | 1990-10-09 | Hitachi, Ltd. | Non-volatile memory device |
US4912053A (en) * | 1988-02-01 | 1990-03-27 | Harris Corporation | Ion implanted JFET with self-aligned source and drain |
US5168340A (en) | 1988-08-17 | 1992-12-01 | Texas Instruments Incorporated | Semiconductor integrated circuit device with guardring regions to prevent the formation of an MOS diode |
US5070378A (en) | 1988-09-22 | 1991-12-03 | Nec Corporation | Eprom erasable by uv radiation having redundant circuit |
US5227649A (en) | 1989-02-27 | 1993-07-13 | Texas Instruments Incorporated | Circuit layout and method for VLSI circuits having local interconnects |
US4998151A (en) | 1989-04-13 | 1991-03-05 | General Electric Company | Power field effect devices having small cell size and low contact resistance |
US5073812A (en) | 1989-05-11 | 1991-12-17 | Mitubishi Denki Kabushiki Kaisha | Heterojunction bipolar transistor |
US5068697A (en) | 1989-07-18 | 1991-11-26 | Sony Corporation | Semiconductor memory which is protected from erasure by light shields |
US5030796A (en) | 1989-08-11 | 1991-07-09 | Rockwell International Corporation | Reverse-engineering resistant encapsulant for microelectric device |
US5117276A (en) | 1989-08-14 | 1992-05-26 | Fairchild Camera And Instrument Corp. | High performance interconnect system for an integrated circuit |
US5101121A (en) | 1990-01-09 | 1992-03-31 | Sgs Thomson Microelectronics S.A. | Security locks for integrated circuit |
US5177589A (en) | 1990-01-29 | 1993-01-05 | Hitachi, Ltd. | Refractory metal thin film having a particular step coverage factor and ratio of surface roughness |
US5210437A (en) * | 1990-04-20 | 1993-05-11 | Kabushiki Kaisha Toshiba | MOS device having a well layer for controlling threshold voltage |
US5138197A (en) | 1990-05-23 | 1992-08-11 | Kabushiki Kaisha Toshiba | Address decoder array composed of CMOS |
US5132571A (en) | 1990-08-01 | 1992-07-21 | Actel Corporation | Programmable interconnect architecture having interconnects disposed above function modules |
US5371390A (en) | 1990-10-15 | 1994-12-06 | Aptix Corporation | Interconnect substrate with circuits for field-programmability and testing of multichip modules and hybrid circuits |
US5121089A (en) | 1990-11-01 | 1992-06-09 | Hughes Aircraft Company | Micro-machined switch and method of fabrication |
US5050123A (en) | 1990-11-13 | 1991-09-17 | Intel Corporation | Radiation shield for EPROM cells |
US5404040A (en) | 1990-12-21 | 1995-04-04 | Siliconix Incorporated | Structure and fabrication of power MOSFETs, including termination structures |
US5120669A (en) | 1991-02-06 | 1992-06-09 | Harris Corporation | Method of forming self-aligned top gate channel barrier region in ion-implanted JFET |
US5225699A (en) | 1991-02-08 | 1993-07-06 | Mitsubishi Denki Kabushiki Kaisha | Dram having a large dielectric breakdown voltage between an adjacent conductive layer and a capacitor electrode and method of manufacture thereof |
US5539224A (en) | 1991-03-18 | 1996-07-23 | Fujitsu Limited | Semiconductor device having unit circuit-blocks in a common chip as a first layer with electrical interconnections therebetween provided exclusively in a second, upper, interconnection layer formed on the first layer |
US5146117A (en) | 1991-04-01 | 1992-09-08 | Hughes Aircraft Company | Convertible multi-function microelectronic logic gate structure and method of fabricating the same |
US5341013A (en) | 1991-06-28 | 1994-08-23 | Kabushiki Kaisha Toshiba | Semiconductor device provided with sense circuits |
US5441902A (en) | 1991-07-31 | 1995-08-15 | Texas Instruments Incorporated | Method for making channel stop structure for CMOS devices |
US5336624A (en) | 1991-08-09 | 1994-08-09 | Hughes Aircraft Company | Method for disguising a microelectronic integrated digital logic |
US5202591A (en) | 1991-08-09 | 1993-04-13 | Hughes Aircraft Company | Dynamic circuit disguise for microelectronic integrated digital logic circuits |
US5308682A (en) | 1991-10-01 | 1994-05-03 | Nec Corporation | Alignment check pattern for multi-level interconnection |
US5384475A (en) | 1991-10-09 | 1995-01-24 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
US5309015A (en) | 1991-11-14 | 1994-05-03 | Hitachi, Ltd. | Clock wiring and semiconductor integrated circuit device having the same |
US5345105A (en) | 1992-02-03 | 1994-09-06 | Motorola, Inc. | Structure for shielding conductors |
US5412237A (en) | 1992-03-12 | 1995-05-02 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device with improved element isolation and operation rate |
US5231299A (en) | 1992-03-24 | 1993-07-27 | International Business Machines Corporation | Structure and fabrication method for EEPROM memory cell with selective channel implants |
US5384472A (en) | 1992-06-10 | 1995-01-24 | Aspec Technology, Inc. | Symmetrical multi-layer metal logic array with continuous substrate taps and extension portions for increased gate density |
US5866933A (en) | 1992-07-31 | 1999-02-02 | Hughes Electronics Corporation | Integrated circuit security system and method with implanted interconnections |
US5317197A (en) | 1992-10-20 | 1994-05-31 | Micron Semiconductor, Inc. | Semiconductor device |
US5378641A (en) * | 1993-02-22 | 1995-01-03 | Micron Semiconductor, Inc. | Electrically conductive substrate interconnect continuity region and method of forming same with an angled implant |
US5719430A (en) | 1993-05-01 | 1998-02-17 | Nec Corporation | Buried-channel MOS transistor and process of producing same |
US5468990A (en) | 1993-07-22 | 1995-11-21 | National Semiconductor Corp. | Structures for preventing reverse engineering of integrated circuits |
US5369299A (en) | 1993-07-22 | 1994-11-29 | National Semiconductor Corporation | Tamper resistant integrated circuit structure |
US5354704A (en) * | 1993-07-28 | 1994-10-11 | United Microelectronics Corporation | Symmetric SRAM cell with buried N+ local interconnection line |
US5506806A (en) | 1993-09-20 | 1996-04-09 | Nec Corporation | Memory protection circuit for EPROM |
US5721150A (en) | 1993-10-25 | 1998-02-24 | Lsi Logic Corporation | Use of silicon for integrated circuit device interconnection by direct writing of patterns therein |
US5531018A (en) | 1993-12-20 | 1996-07-02 | General Electric Company | Method of micromachining electromagnetically actuated current switches with polyimide reinforcement seals, and switches produced thereby |
US5399441A (en) | 1994-04-12 | 1995-03-21 | Dow Corning Corporation | Method of applying opaque coatings |
US5611940A (en) | 1994-04-28 | 1997-03-18 | Siemens Aktiengesellschaft | Microsystem with integrated circuit and micromechanical component, and production process |
US5475251A (en) | 1994-05-31 | 1995-12-12 | National Semiconductor Corporation | Secure non-volatile memory cell |
US5571735A (en) | 1994-06-21 | 1996-11-05 | Nec Corporation | Method of manufacturing a semiconducter device capable of easily forming metal silicide films on source and drain regions |
US5376577A (en) | 1994-06-30 | 1994-12-27 | Micron Semiconductor, Inc. | Method of forming a low resistive current path between a buried contact and a diffusion region |
US5719422A (en) | 1994-08-18 | 1998-02-17 | Sun Microsystems, Inc. | Low threshold voltage, high performance junction transistor |
US5679595A (en) | 1994-10-11 | 1997-10-21 | Mosel Vitelic, Inc. | Self-registered capacitor bottom plate-local interconnect scheme for DRAM |
US5541614A (en) | 1995-04-04 | 1996-07-30 | Hughes Aircraft Company | Smart antenna system using microelectromechanically tunable dipole antennas and photonic bandgap materials |
US5576988A (en) | 1995-04-27 | 1996-11-19 | National Semiconductor Corporation | Secure non-volatile memory array |
US5838047A (en) | 1995-06-16 | 1998-11-17 | Mitsubishi Denki Kabushiki Kaisha | CMOS substrate biasing for threshold voltage control |
US5677557A (en) | 1995-06-28 | 1997-10-14 | Taiwan Semiconductor Manufacturing Company, Ltd | Method for forming buried plug contacts on semiconductor integrated circuits |
US5821590A (en) | 1995-07-24 | 1998-10-13 | Samsung Electronics Co., Ltd. | Semiconductor interconnection device with both n- and p-doped regions |
US5783375A (en) | 1995-09-02 | 1998-07-21 | Eastman Kodak Company | Method of processing a color photographic silver halide material |
US5783846A (en) | 1995-09-22 | 1998-07-21 | Hughes Electronics Corporation | Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
US5821147A (en) | 1995-12-11 | 1998-10-13 | Lucent Technologies, Inc. | Integrated circuit fabrication |
US5638946A (en) | 1996-01-11 | 1997-06-17 | Northeastern University | Micromechanical switch with insulated switch contact |
US5880503A (en) | 1996-08-07 | 1999-03-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor integrated circuit device having static memory cell with CMOS structure |
US6373106B2 (en) * | 1996-09-10 | 2002-04-16 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and method for fabricating the same |
US5858843A (en) | 1996-09-27 | 1999-01-12 | Intel Corporation | Low temperature method of forming gate electrode and gate dielectric |
US5811340A (en) * | 1996-10-25 | 1998-09-22 | Lg Semicon Co., Ltd. | Metal oxide semiconductor field effect transistor and method of manufacturing the same |
US5854510A (en) | 1996-12-27 | 1998-12-29 | Vlsi Technology, Inc. | Low power programmable fuse structures |
US5973375A (en) * | 1997-06-06 | 1999-10-26 | Hughes Electronics Corporation | Camouflaged circuit structure with step implants |
US5834356A (en) | 1997-06-27 | 1998-11-10 | Vlsi Technology, Inc. | Method of making high resistive structures in salicided process semiconductor devices |
US5888887A (en) | 1997-12-15 | 1999-03-30 | Chartered Semiconductor Manufacturing, Ltd. | Trenchless buried contact process technology |
US6566204B1 (en) * | 2000-03-31 | 2003-05-20 | National Semiconductor Corporation | Use of mask shadowing and angled implantation in fabricating asymmetrical field-effect transistors |
US6815816B1 (en) * | 2000-10-25 | 2004-11-09 | Hrl Laboratories, Llc | Implanted hidden interconnections in a semiconductor device for preventing reverse engineering |
US6740942B2 (en) * | 2001-06-15 | 2004-05-25 | Hrl Laboratories, Llc. | Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact |
US6825530B1 (en) * | 2003-06-11 | 2004-11-30 | International Business Machines Corporation | Zero Threshold Voltage pFET and method of making same |
Non-Patent Citations (23)
Title |
---|
Blythe, et al., "Layout Reconstruction of Complex Silicon Chips," IEEE Journal of Solid-State Circuits, vol. 28, No. 2, pp. 138-145 (Feb. 1993). |
British Office Action for British Patent Application No. 0512203.1 (Jun. 7, 2006). |
British Office Action for British Patent Application No. 0512203.1 (Mar. 6, 2007). |
British Office action for British Patent Application No. 0512203.1 (Nov. 10, 2006). |
British Office action for British Patent Application No. 0512203.1 (Nov. 2, 2005). |
British Office Action for British Patent Application No. 0512203.1 (Oct. 21, 2005). |
Frederiksen, Thomas M., "Standard Circuits in the New CMOS Era," Intuitive CMOS Electronics, Revised Edition, pp. 134-146 (Jan. 1989). |
Hodges and Jackson, Analysis and Design of Digital Integrated Circuits, 2nd edition, McGraw-Hill, p. 353 (1988). |
IBM-TDB, "Double Polysilicon Dynamic Memory Cell with Polysilicon Bit Line," vol. 21, Issue No. 9, pp. 3828-3831 (Feb. 1979). |
IBM-TDB, "Static Ram Double Polysilicon Process," vol. 23, Issue No. 8 pp. 3683-3686 (Jan. 1981). |
Larson, L.E., et al., "Microactuators for GaAs-based Microwave Integrated Circuits," IEEE, pp. 743-746 (1991). |
Lee, "Engineering a Device for Electron-Beam Probing," IEEE Design and Test of Computers, pp. 36-49 (Jun. 1989). |
Ng, K.K., Complete Guide to Semiconductor Devices, McGraw-Hill, Inc., pp. 164-165 (1995). |
Response to British Office Action for British Patent Application No. 0512203.1 (Apr. 26, 2006). |
Response to British Office Action for British Patent Application No. 0512203.1 (Oct. 9, 2006). |
Sze, S.M., ed., "Silicides for Gates and Interconnections," VLSI Technology, McGraw-Hill, pp. 372-380 (1983). |
Sze, S.M., VLSI Technology, McGraw-Hill, pp. 99, 447, 461-465 (1983). |
U.S. Appl. No. 09/696,826, filed Oct. 25, 2000, Baukus et al. |
U.S. Appl. No. 09/758,792. |
U.S. Appl. No. 10/637,848, filed Aug. 7, 2003, Chow et al. |
U.S. Appl. No. 10/789,261, filed Feb. 26, 2004, Baukus et al. |
U.S. Appl. No. 10/828,022, filed Apr. 19, 2004, Chow et al. |
U.S. Appl. No. 10/881,286, filed Jun. 29, 2004, Chow et al. |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8564073B1 (en) | 2006-09-28 | 2013-10-22 | Hrl Laboratories, Llc | Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer |
US9479176B1 (en) | 2013-12-09 | 2016-10-25 | Rambus Inc. | Methods and circuits for protecting integrated circuits from reverse engineering |
Also Published As
Publication number | Publication date |
---|---|
US20040144998A1 (en) | 2004-07-29 |
AU2003293540A1 (en) | 2004-07-09 |
TWI336507B (en) | 2011-01-21 |
GB2412240A (en) | 2005-09-21 |
US8524553B2 (en) | 2013-09-03 |
US20090170255A1 (en) | 2009-07-02 |
TW200425410A (en) | 2004-11-16 |
GB2412240B (en) | 2007-05-09 |
WO2004055868A3 (en) | 2004-10-07 |
AU2003293540A8 (en) | 2004-07-09 |
JP4846239B2 (en) | 2011-12-28 |
GB0512203D0 (en) | 2005-07-27 |
WO2004055868A2 (en) | 2004-07-01 |
JP2006510225A (en) | 2006-03-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8524553B2 (en) | Integrated circuit modification using well implants | |
US7935603B1 (en) | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable | |
US7541266B2 (en) | Covert transformation of transistor properties as a circuit protection method | |
US6117762A (en) | Method and apparatus using silicide layer for protecting integrated circuits from reverse engineering | |
US7888213B2 (en) | Conductive channel pseudo block process and circuit to inhibit reverse engineering | |
US5973375A (en) | Camouflaged circuit structure with step implants | |
US6613661B1 (en) | Process for fabricating secure integrated circuit | |
US7008873B2 (en) | Integrated circuit with reverse engineering protection | |
US7344932B2 (en) | Use of silicon block process step to camouflage a false transistor | |
US8564073B1 (en) | Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer | |
KR100472160B1 (en) | Semiconductor memory device and method of manufacturing the same | |
JP3845238B2 (en) | Manufacturing method of semiconductor device | |
JP3216110B2 (en) | Method of manufacturing complementary semiconductor device | |
WO2003098692A1 (en) | Integrated circuit with reverse engineering protection |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: HRL LABORATORIES, LLC, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CHOW, LAP-WAI;CLARK JR., WILLIAM M.;BAUKUS, JAMES P.;AND OTHERS;REEL/FRAME:015192/0388;SIGNING DATES FROM 20031209 TO 20031210 |
|
AS | Assignment |
Owner name: RAYTHEON COMPANY, MASSACHUSETTS Free format text: ASSIGNMENT OF AN UNDIVIDED 50% INTEREST TO RAYTHEON COMPANY;ASSIGNOR:HRL LABORATORIES, LLC;REEL/FRAME:015574/0030 Effective date: 20040616 |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
REMI | Maintenance fee reminder mailed | ||
LAPS | Lapse for failure to pay maintenance fees | ||
STCH | Information on status: patent discontinuation |
Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
|
FP | Lapsed due to failure to pay maintenance fee |
Effective date: 20170407 |
|
FEPP | Fee payment procedure |
Free format text: PETITION RELATED TO MAINTENANCE FEES FILED (ORIGINAL EVENT CODE: PMFP); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Free format text: SURCHARGE, PETITION TO ACCEPT PYMT AFTER EXP, UNINTENTIONAL (ORIGINAL EVENT CODE: M1558); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 8 |
|
PRDP | Patent reinstated due to the acceptance of a late maintenance fee |
Effective date: 20191108 |
|
FEPP | Fee payment procedure |
Free format text: PETITION RELATED TO MAINTENANCE FEES GRANTED (ORIGINAL EVENT CODE: PMFG); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
FEPP | Fee payment procedure |
Free format text: MAINTENANCE FEE REMINDER MAILED (ORIGINAL EVENT CODE: REM.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
LAPS | Lapse for failure to pay maintenance fees |
Free format text: PATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIGINAL EVENT CODE: EXP.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
STCH | Information on status: patent discontinuation |
Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
|
FP | Lapsed due to failure to pay maintenance fee |
Effective date: 20210407 |