USRE40995E1 - Multi-element resistive memory - Google Patents
Multi-element resistive memory Download PDFInfo
- Publication number
- USRE40995E1 USRE40995E1 US11/905,752 US90575207A USRE40995E US RE40995 E1 USRE40995 E1 US RE40995E1 US 90575207 A US90575207 A US 90575207A US RE40995 E USRE40995 E US RE40995E
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- memory
- read
- write
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
- G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
- H10B61/20—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
- H10B61/22—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Hall/Mr Elements (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
Claims (41)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/905,752 USRE40995E1 (en) | 2004-04-13 | 2007-10-03 | Multi-element resistive memory |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/822,785 US7145795B2 (en) | 2004-04-13 | 2004-04-13 | Multi-cell resistive memory array architecture with select transistor |
US11/905,752 USRE40995E1 (en) | 2004-04-13 | 2007-10-03 | Multi-element resistive memory |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/822,785 Reissue US7145795B2 (en) | 2004-04-13 | 2004-04-13 | Multi-cell resistive memory array architecture with select transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
USRE40995E1 true USRE40995E1 (en) | 2009-11-24 |
Family
ID=35060353
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/822,785 Ceased US7145795B2 (en) | 2004-04-13 | 2004-04-13 | Multi-cell resistive memory array architecture with select transistor |
US11/905,752 Active 2024-10-12 USRE40995E1 (en) | 2004-04-13 | 2007-10-03 | Multi-element resistive memory |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/822,785 Ceased US7145795B2 (en) | 2004-04-13 | 2004-04-13 | Multi-cell resistive memory array architecture with select transistor |
Country Status (1)
Country | Link |
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US (2) | US7145795B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080013358A1 (en) * | 2004-07-14 | 2008-01-17 | Renesas Technology Corp. | Non-volatile semiconductor memory device |
US20120134200A1 (en) * | 2010-11-29 | 2012-05-31 | Seagate Technology Llc | Magnetic Memory Cell With Multi-Level Cell (MLC) Data Storage Capability |
US20170069835A1 (en) * | 2015-09-09 | 2017-03-09 | Kabushiki Kaisha Toshiba | Method of manufacturing magnetoresistive memory device |
US11164610B1 (en) | 2020-06-05 | 2021-11-02 | Qualcomm Incorporated | Memory device with built-in flexible double redundancy |
US11177010B1 (en) * | 2020-07-13 | 2021-11-16 | Qualcomm Incorporated | Bitcell for data redundancy |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002230965A (en) * | 2001-01-24 | 2002-08-16 | Internatl Business Mach Corp <Ibm> | Non-volatile memory device |
US6961277B2 (en) * | 2003-07-08 | 2005-11-01 | Micron Technology, Inc. | Method of refreshing a PCRAM memory device |
JP2007115956A (en) * | 2005-10-21 | 2007-05-10 | Toshiba Corp | Semiconductor memory |
US7679952B2 (en) * | 2005-12-07 | 2010-03-16 | Nxp B.V. | Electronic circuit with a memory matrix |
JP2008091703A (en) * | 2006-10-03 | 2008-04-17 | Toshiba Corp | Semiconductor storage device |
KR100885184B1 (en) * | 2007-01-30 | 2009-02-23 | 삼성전자주식회사 | Memory Devices Having Resistance Property Capable Of Being Independently Controlled By Electric And Magnetic Fields And Methods Of Operating The Same |
TWI415124B (en) * | 2007-08-09 | 2013-11-11 | Ind Tech Res Inst | Magetic random access memory |
US8223525B2 (en) * | 2009-12-15 | 2012-07-17 | Sandisk 3D Llc | Page register outside array and sense amplifier interface |
US8681529B2 (en) | 2011-11-10 | 2014-03-25 | Micron Technology, Inc. | Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines |
JP5754366B2 (en) * | 2011-12-14 | 2015-07-29 | 富士通株式会社 | Magnetic memory device and reading method thereof |
US9257152B2 (en) * | 2012-11-09 | 2016-02-09 | Globalfoundries Inc. | Memory architectures having wiring structures that enable different access patterns in multiple dimensions |
US9383411B2 (en) | 2013-06-26 | 2016-07-05 | International Business Machines Corporation | Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layers |
US9389876B2 (en) | 2013-10-24 | 2016-07-12 | International Business Machines Corporation | Three-dimensional processing system having independent calibration and statistical collection layer |
US9601194B2 (en) * | 2014-02-28 | 2017-03-21 | Crossbar, Inc. | NAND array comprising parallel transistor and two-terminal switching device |
JP5985728B1 (en) | 2015-09-15 | 2016-09-06 | 株式会社東芝 | Magnetic memory |
Citations (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020036918A1 (en) * | 2000-09-25 | 2002-03-28 | Mitsubishi Denki Kabushiki Kaisha | Thin film magnetic memory device capable of reducing number of wires and reading data at high speed |
US20020123170A1 (en) | 2001-03-02 | 2002-09-05 | Moore John T. | PCRAM cell manufacturing |
US20020123248A1 (en) | 2001-03-01 | 2002-09-05 | Moore John T. | Methods of metal doping a chalcogenide material |
US20030032254A1 (en) | 2000-12-08 | 2003-02-13 | Gilton Terry L. | Resistance variable device, analog memory device, and programmable memory cell |
US20030045049A1 (en) | 2001-08-29 | 2003-03-06 | Campbell Kristy A. | Method of forming chalcogenide comprising devices |
US20040037152A1 (en) * | 2002-08-22 | 2004-02-26 | Mitsubishi Denki Kabushiki Kaisha | Non-volatile memory device conducting comparison operation |
US20040108561A1 (en) * | 2002-12-10 | 2004-06-10 | Won-Cheol Jeong | Magnetic random access memory (MRAM) devices having nonparallel main and reference magnetic resistors |
US6791859B2 (en) | 2001-11-20 | 2004-09-14 | Micron Technology, Inc. | Complementary bit PCRAM sense amplifier and method of operation |
US6850433B2 (en) | 2002-07-15 | 2005-02-01 | Hewlett-Packard Development Company, Lp. | Magnetic memory device and method |
US6903396B2 (en) | 2002-04-12 | 2005-06-07 | Micron Technology, Inc. | Control of MTJ tunnel area |
US6924520B2 (en) * | 2003-01-18 | 2005-08-02 | Samsung Electronics Co., Ltd. | MRAM including unit cell formed of one transistor and two magnetic tunnel junctions (MTJS) and method for fabricating the same |
US6940748B2 (en) | 2002-05-16 | 2005-09-06 | Micron Technology, Inc. | Stacked 1T-nMTJ MRAM structure |
US20050216244A1 (en) | 2004-03-23 | 2005-09-29 | Nahas Joseph J | Magnetoresistive random access memory simulation |
US20060002186A1 (en) * | 2004-06-30 | 2006-01-05 | Stmicroelectronics, Inc. | Magnetic random access memory element |
US7149100B2 (en) * | 2003-11-04 | 2006-12-12 | Micron Technology, Inc. | Serial transistor-cell array architecture |
US20070041242A1 (en) * | 2005-08-19 | 2007-02-22 | Sony Corporation | Nonvolatile memory cell, storage device and nonvolatile logic circuit |
US7264985B2 (en) * | 2005-08-31 | 2007-09-04 | Freescale Semiconductor, Inc. | Passive elements in MRAM embedded integrated circuits |
-
2004
- 2004-04-13 US US10/822,785 patent/US7145795B2/en not_active Ceased
-
2007
- 2007-10-03 US US11/905,752 patent/USRE40995E1/en active Active
Patent Citations (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020036918A1 (en) * | 2000-09-25 | 2002-03-28 | Mitsubishi Denki Kabushiki Kaisha | Thin film magnetic memory device capable of reducing number of wires and reading data at high speed |
US20030032254A1 (en) | 2000-12-08 | 2003-02-13 | Gilton Terry L. | Resistance variable device, analog memory device, and programmable memory cell |
US20020123248A1 (en) | 2001-03-01 | 2002-09-05 | Moore John T. | Methods of metal doping a chalcogenide material |
US20030001229A1 (en) | 2001-03-01 | 2003-01-02 | Moore John T. | Chalcogenide comprising device |
US20020123170A1 (en) | 2001-03-02 | 2002-09-05 | Moore John T. | PCRAM cell manufacturing |
US20030045049A1 (en) | 2001-08-29 | 2003-03-06 | Campbell Kristy A. | Method of forming chalcogenide comprising devices |
US6791859B2 (en) | 2001-11-20 | 2004-09-14 | Micron Technology, Inc. | Complementary bit PCRAM sense amplifier and method of operation |
US6903396B2 (en) | 2002-04-12 | 2005-06-07 | Micron Technology, Inc. | Control of MTJ tunnel area |
US6940748B2 (en) | 2002-05-16 | 2005-09-06 | Micron Technology, Inc. | Stacked 1T-nMTJ MRAM structure |
US6850433B2 (en) | 2002-07-15 | 2005-02-01 | Hewlett-Packard Development Company, Lp. | Magnetic memory device and method |
US20040037152A1 (en) * | 2002-08-22 | 2004-02-26 | Mitsubishi Denki Kabushiki Kaisha | Non-volatile memory device conducting comparison operation |
US20040108561A1 (en) * | 2002-12-10 | 2004-06-10 | Won-Cheol Jeong | Magnetic random access memory (MRAM) devices having nonparallel main and reference magnetic resistors |
US6924520B2 (en) * | 2003-01-18 | 2005-08-02 | Samsung Electronics Co., Ltd. | MRAM including unit cell formed of one transistor and two magnetic tunnel junctions (MTJS) and method for fabricating the same |
US7149100B2 (en) * | 2003-11-04 | 2006-12-12 | Micron Technology, Inc. | Serial transistor-cell array architecture |
US20050216244A1 (en) | 2004-03-23 | 2005-09-29 | Nahas Joseph J | Magnetoresistive random access memory simulation |
US20060002186A1 (en) * | 2004-06-30 | 2006-01-05 | Stmicroelectronics, Inc. | Magnetic random access memory element |
US20070041242A1 (en) * | 2005-08-19 | 2007-02-22 | Sony Corporation | Nonvolatile memory cell, storage device and nonvolatile logic circuit |
US7264985B2 (en) * | 2005-08-31 | 2007-09-04 | Freescale Semiconductor, Inc. | Passive elements in MRAM embedded integrated circuits |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080013358A1 (en) * | 2004-07-14 | 2008-01-17 | Renesas Technology Corp. | Non-volatile semiconductor memory device |
US20120134200A1 (en) * | 2010-11-29 | 2012-05-31 | Seagate Technology Llc | Magnetic Memory Cell With Multi-Level Cell (MLC) Data Storage Capability |
US20170069835A1 (en) * | 2015-09-09 | 2017-03-09 | Kabushiki Kaisha Toshiba | Method of manufacturing magnetoresistive memory device |
US11164610B1 (en) | 2020-06-05 | 2021-11-02 | Qualcomm Incorporated | Memory device with built-in flexible double redundancy |
US11640835B2 (en) | 2020-06-05 | 2023-05-02 | Qualcomm Incorporated | Memory device with built-in flexible double redundancy |
US11177010B1 (en) * | 2020-07-13 | 2021-11-16 | Qualcomm Incorporated | Bitcell for data redundancy |
Also Published As
Publication number | Publication date |
---|---|
US20050226035A1 (en) | 2005-10-13 |
US7145795B2 (en) | 2006-12-05 |
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