USRE41764E1 - Semiconductor device with compensated threshold voltage and method for making same - Google Patents
Semiconductor device with compensated threshold voltage and method for making same Download PDFInfo
- Publication number
- USRE41764E1 USRE41764E1 US11/318,397 US31839700A USRE41764E US RE41764 E1 USRE41764 E1 US RE41764E1 US 31839700 A US31839700 A US 31839700A US RE41764 E USRE41764 E US RE41764E
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- United States
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- pockets
- dopant
- conductivity type
- length
- semiconductor device
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- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 59
- 238000000034 method Methods 0.000 title claims description 38
- 239000002019 doping agent Substances 0.000 claims abstract description 88
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 238000002513 implantation Methods 0.000 claims description 38
- 230000007423 decrease Effects 0.000 claims description 8
- 238000000137 annealing Methods 0.000 claims description 7
- 230000003247 decreasing effect Effects 0.000 claims description 3
- 230000000694 effects Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
- H01L21/2253—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase by ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1041—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
-
- Ln1>Lp,
- Lni−1<Lni<Lni+1,
- Nni−1>Nni>Nni+1, and
- the sum, ΣNni, of the concentrations of the dopant of the second conductivity type in the elementary pockets may be such that:
- ΣNni<Ns.
-
- Ln1>Lp,
- Lni−1<Lni<Lni+1,
- Nni−1>Nni>Nni+1, and
- the sun sum, ΣNni, of the concentrations of the dopant of the second conductivity type in the elementary pockets being such that:
- ΣNni<Ns.
-
- Lp<Lni,
- Lni−1<Lni<Lni+1,
- Nni−1<Nni<Nni+1, and
- the sum ΣNni of the concentrations of the dopant of the second conductivity type in the elementary pockets being such that:
- ΣNni<Ns.
-
- Lp<Ln1,
- Ln1<Ln2<Ln3,
- Nn1>Nn2>Nn3, and
- Nn1+Nn2+Nn3<Ns.
Claims (49)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9907391A FR2794898B1 (en) | 1999-06-11 | 1999-06-11 | SEMICONDUCTOR DEVICE WITH COMPENSATED THRESHOLD VOLTAGE AND MANUFACTURING METHOD |
FR9907391 | 1999-06-11 | ||
PCT/FR2000/001537 WO2000077856A1 (en) | 1999-06-11 | 2000-06-05 | Semiconductor device with compensated threshold voltage and method for making same |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/018,179 Reissue US6667513B1 (en) | 1999-06-11 | 2000-06-05 | Semiconductor device with compensated threshold voltage and method for making same |
Publications (1)
Publication Number | Publication Date |
---|---|
USRE41764E1 true USRE41764E1 (en) | 2010-09-28 |
Family
ID=9546662
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/318,397 Expired - Lifetime USRE41764E1 (en) | 1999-06-11 | 2000-06-05 | Semiconductor device with compensated threshold voltage and method for making same |
US10/018,179 Ceased US6667513B1 (en) | 1999-06-11 | 2000-06-05 | Semiconductor device with compensated threshold voltage and method for making same |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/018,179 Ceased US6667513B1 (en) | 1999-06-11 | 2000-06-05 | Semiconductor device with compensated threshold voltage and method for making same |
Country Status (4)
Country | Link |
---|---|
US (2) | USRE41764E1 (en) |
EP (1) | EP1186051B1 (en) |
FR (1) | FR2794898B1 (en) |
WO (1) | WO2000077856A1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8900954B2 (en) | 2011-11-04 | 2014-12-02 | International Business Machines Corporation | Blanket short channel roll-up implant with non-angled long channel compensating implant through patterned opening |
US9548401B2 (en) * | 2014-11-20 | 2017-01-17 | Samsung Electronics Co., Ltd. | Semiconductor device |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2794898B1 (en) | 1999-06-11 | 2001-09-14 | France Telecom | SEMICONDUCTOR DEVICE WITH COMPENSATED THRESHOLD VOLTAGE AND MANUFACTURING METHOD |
JP2005116891A (en) * | 2003-10-09 | 2005-04-28 | Sanyo Electric Co Ltd | Semiconductor device and its manufacturing method |
CN100373621C (en) * | 2004-10-28 | 2008-03-05 | 电子科技大学 | CMOS device with longitudinal ring grating non-homogeneous germanium silicon doped channel |
WO2007086008A1 (en) * | 2006-01-25 | 2007-08-02 | Nxp B.V. | Tunneling transistor with barrier |
US9269770B2 (en) * | 2006-03-10 | 2016-02-23 | Globalfoundries Singapore Pte. Ltd. | Integrated circuit system with double doped drain transistor |
US7855110B2 (en) * | 2008-07-08 | 2010-12-21 | International Business Machines Corporation | Field effect transistor and method of fabricating same |
Citations (51)
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US4154626A (en) | 1975-09-22 | 1979-05-15 | International Business Machines Corporation | Process of making field effect transistor having improved threshold stability by ion-implantation |
US4276095A (en) | 1977-08-31 | 1981-06-30 | International Business Machines Corporation | Method of making a MOSFET device with reduced sensitivity of threshold voltage to source to substrate voltage variations |
US4636822A (en) | 1984-08-27 | 1987-01-13 | International Business Machines Corporation | GaAs short channel lightly doped drain MESFET structure and fabrication |
US4683485A (en) | 1985-12-27 | 1987-07-28 | Harris Corporation | Technique for increasing gate-drain breakdown voltage of ion-implanted JFET |
US4801555A (en) | 1987-01-14 | 1989-01-31 | Motorola, Inc. | Double-implant process for forming graded source/drain regions |
US4851360A (en) | 1986-09-29 | 1989-07-25 | Texas Instruments Incorporated | NMOS source/drain doping with both P and As |
US4966859A (en) | 1982-03-09 | 1990-10-30 | Siemens Aktiengesellschaft | Voltage-stable sub-μm MOS transistor for VLSI circuits |
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-
1999
- 1999-06-11 FR FR9907391A patent/FR2794898B1/en not_active Expired - Fee Related
-
2000
- 2000-06-05 WO PCT/FR2000/001537 patent/WO2000077856A1/en active Application Filing
- 2000-06-05 US US11/318,397 patent/USRE41764E1/en not_active Expired - Lifetime
- 2000-06-05 US US10/018,179 patent/US6667513B1/en not_active Ceased
- 2000-06-05 EP EP00938886A patent/EP1186051B1/en not_active Expired - Lifetime
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US4154626A (en) | 1975-09-22 | 1979-05-15 | International Business Machines Corporation | Process of making field effect transistor having improved threshold stability by ion-implantation |
US4276095A (en) | 1977-08-31 | 1981-06-30 | International Business Machines Corporation | Method of making a MOSFET device with reduced sensitivity of threshold voltage to source to substrate voltage variations |
US4966859A (en) | 1982-03-09 | 1990-10-30 | Siemens Aktiengesellschaft | Voltage-stable sub-μm MOS transistor for VLSI circuits |
US4636822A (en) | 1984-08-27 | 1987-01-13 | International Business Machines Corporation | GaAs short channel lightly doped drain MESFET structure and fabrication |
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US4851360A (en) | 1986-09-29 | 1989-07-25 | Texas Instruments Incorporated | NMOS source/drain doping with both P and As |
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US8900954B2 (en) | 2011-11-04 | 2014-12-02 | International Business Machines Corporation | Blanket short channel roll-up implant with non-angled long channel compensating implant through patterned opening |
US9478615B2 (en) | 2011-11-04 | 2016-10-25 | Globalfoundries Inc. | Blanket short channel roll-up implant with non-angled long channel compensating implant through patterned opening |
US9548401B2 (en) * | 2014-11-20 | 2017-01-17 | Samsung Electronics Co., Ltd. | Semiconductor device |
Also Published As
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EP1186051B1 (en) | 2013-02-20 |
FR2794898A1 (en) | 2000-12-15 |
EP1186051A1 (en) | 2002-03-13 |
WO2000077856A1 (en) | 2000-12-21 |
FR2794898B1 (en) | 2001-09-14 |
US6667513B1 (en) | 2003-12-23 |
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