USRE41966E1 - Device and method for repeatedly updating the function of a LCD monitor - Google Patents
Device and method for repeatedly updating the function of a LCD monitor Download PDFInfo
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- USRE41966E1 USRE41966E1 US12/243,919 US24391908A USRE41966E US RE41966 E1 USRE41966 E1 US RE41966E1 US 24391908 A US24391908 A US 24391908A US RE41966 E USRE41966 E US RE41966E
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/04—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/04—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
- G09G2370/045—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller using multiple communication channels, e.g. parallel and serial
- G09G2370/047—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller using multiple communication channels, e.g. parallel and serial using display data channel standard [DDC] communication
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Read Only Memory (AREA)
Abstract
A monitor control system capable of reprogramming the function of a LCD monitor. The monitor control system utilizes VGA signal lines for video signal transmission during normal mode of operation and the same VGA signal lines for transmitting erase/record commands and data when the erasable programmable ROM inside the monitor demands reprogramming. Using an isolator circuit in the monitor control system for isolating an erase/record pathway of an erasable programmable ROM from a normal video pathway, data within the erasable programmable ROM can be modified without opening up the monitor casing. Hence, the modification of monitor function is much more convenient.
Description
More than one reissue applications have been filed for the reissue of U.S. Pat. No. 6,697,058. This application is a continuation reissue application of reissue application Ser. No. 11/361,038, filed on Feb. 22, 2006, now allowed. The prior reissue application Ser. No. 11/361,038 is based on U.S. application Ser. No. 10/418,435, filed on Apr. 17, 2003, now U.S. Pat. No. 6,697,058. U.S. Pat. No. 6,697,058 is a continuation-in-part of application Ser. No. 09/575,890, filed on May 22, 2000, now pendingU.S. Pat. No. 6,661,411, which is a continuation-in-part of application Ser. No. 09/414,251, filed on Oct. 7, 1999, now U.S. Pat. No. 6,295,053. This application The U.S. Pat. No. 6,697,058 is also a continuation-in-part of application Ser. No. 09/543,008, filed on Apr. 4, 2000, now U.S. Pat. No. 6,577,301, now allowed . The entirety of each of the above-mentioned patents is hereby incorporated by reference herein and made a part of this specification.
1. Field of the Invention
The invention relates to a device and a method for repeatedly updating the function of a liquid quid crystal (LCD) monitor, and more particularly to a device and a method for repeatedly updating the function of a LCD monitor by using Display Data Channel (DDC) signal lines for signal transmission.
2. Description of the Related Art
In a current monitor system, particularly to a LCD monitor, a monitor controller must be exchanged when function modifying or debugging, resulting in high cost consumed. As to a further advanced monitor system, a corresponding monitor controller has a build-in read only memory (ROM) which is an erasable programmable read only memory. By updating data stored in the erasable programmable read only memory, function modification and debugging can be achieved.
Referring to FIG. 1 , a conventional programmable LCD monitor with the circuit block diagram is shown. The conventional LCD monitor has a total of 18 VGA signal lines electrically coupled to a VGA card, which includes a vertical synchronous signal (Vsync) line, a horizontal synchronous signal (Hsync) line, a serial data (SDA) line, a serial clock (SCL) line, a ground (Gnd) line, a red (R) line, a green (G) line and a blue (B) line. During a normal operation, the LCD monitor controller 10 receives the VGA signals. The LCD monitor also coupled to a jumper 14 for connection to the flash ROM 20 or the erase/record socket 80. The flash ROM 20 stores the data used to control the displaying function. In addition, the LCD monitor 10 also has a panel connector to connect to the LCD displaying panel (not shown). Usually, the monitor controller 10 controls the display panel (not shown) based on the VGA signals. The Hsync, Vsync, SDA, SCL and R.G.B signal lines are electrically coupled to the monitor controller 10 for driving the scan and data signals to the LCD displaying panel.
When it is necessary to modify the function of the monitor system, data stored in the flash ROM 20 needs to be updated. First, the case of the monitor must be opened. Then, the first jumper 14 is used to separate the original circuit and the rewriting pathway to the flash ROM. And then, a cable connected to the socket 80 to transmit the updated data.
Obviously, it is really inconvenient to update the monitor system because the case of the conventional monitor must be first opened, and then the jumper has to be switched for recording the erasable programmable read only memory of the monitor controller 10.
As a result, it is rather inconvenience when the monitor system, such as LCD monitor, is updated because it is necessary to open the case of the monitor and to switch jumpers for recording the erasable programmable read only memory of the monitor controller 10.
The invention is to provides a device for reprogramming function of a LCD monitor, which needs not to open the case and needs no the conventional jumper. Also and, it is not necessary to include a connector with pre-designed layout for isolating the previously original circuit and the rewriting pathway to the flash memory. The displaying function of the LCD monitor can be repeatedly updated and the information about on-screen display.
The present invention provides a LCD monitor control system capable of reprogramming monitor function. The monitor control system utilizes the VGA signal lines for transmitting signals during normal operation. The same VGA signal lines are also used for transmitting erase/record commands to the monitor system and to erase/record data into an external erasable programmable ROM.
The invention provides a device for reprogramming function of a LCD monitor, which includes a set of video graphic adapter (VGA) signal lines for transmitting a plurality of erase/record commands and a plurality of erase/record data. A signal detector is coupled to the VGA signal lines for detecting and re-transmitting the erase/record commands and data. An activation device is coupled to the signal detector, wherein the activation device is normally connected to a video pathway, but as soon as erase/record commands are detected, the activation device is switched to an erase/record pathway so that erase/record commands and data can be re-directed. A read-only-memory (ROM) erase/record command decoder is coupled to the activation device via the erase/record pathway, wherein the decoder translates the erase/record commands into a plurality of erase/read/write signals and translates the erase/record data into a plurality of address signals and a plurality of data signals. A plurality of address signals, a plurality of data signals and a plurality of control signals are coupled to the ROM erase/record command decoder. Consequently, data stored in the external ROM unit can be modified, according to the address, data and erase/read/write signals coming from the command decoder. A mode return device is coupled to the ROM erase/record command decoder and the activation device. Wherein, the reprogramming status of the ROM unit can be determined from the address, data and read/write signals so that the activation device can be triggered to switch over connection from the erase/record pathway to the video pathway as soon as reprogramming is finished.
In the foregoing device, the signal detector further includes an inter-integrated circuit multiple address content comparator circuit, which is coupled to the VGA signal lines for comparing with a plurality of consecutive address sequences in the erase/record data such that a set signal is transmitted when there is a match with a pre-set address sequence. A monitor-in-system programming control flag unit is coupled to the inter-integrated circuit multiple address content comparator circuit for transmitting a start signal after receiving the set signal.
In the foregoing device, the activation device further includes a monitor-in-system reprogramming initialization circuit for producing a select signal after receiving the start signal, as well as an erase/record pathway isolator for switching over connection from the video pathway to the erase/record pathway after receiving the select signal and transmitting the erase/record commands and data via the erase/record pathway.
In the foregoing device, the ROM erase/record command decoder further includes an inter-integrated interface circuit for receiving and translating the erase/record commands and data, as well as an erase/record command decoder for receiving translated erase/record commands and data and outputting address, data and erase/read/write signals.
In the foregoing device, the erase/record command decoder further includes a hidden ROM for holding a program code for erase/record commands; a random access memory (RAM) unit for holding erase/record data; a central processing unit coupled to the hidden ROM, the RAM unit and the inter-integrated interface circuit. Wherein the central processing unit receives the erase/record commands and data passing through the inter-integrated circuit interface circuit and then stores the erase/record data in the RAM unit, while the erase/record commands are decoded by referring to the program code in the hidden ROM and then the decoded commands are re-transmitted. An erase/record control register coupled to the central processing unit for receiving the decoded erase/record commands and converting the erase/record commands into the interface control signals or erase/read/write signals, and converting the erase/record data stored in the RAM unit into address and data signals.
The invention further provides a system for reprogramming the function of a liquid crystal display (LCD) monitor, which comprises an erase/record device for holding and transmitting a plurality of erase/record commands and a plurality of erase/record data. A set of video graphic adapter (VGA) signal lines coupled to the erase/record device for transmitting the erase/record commands and data. And, a LCD monitor controller with a monitor-in-system programming function, wherein the LCD monitor controller is coupled to the VGA signal lines so that the erase/record commands of the erase/record device and data are received from the erase/record device via the VGA signal lines, and then a plurality of address signals, a plurality of data signals, and a plurality of control signals are exported for reprogramming a ROM unit, wherein the ROM unit coupled to the LCD monitor controller via signal lines for transferring the address signals, the data signals and the control signals, so that data stored in the ROM unit can be modified according to the address signals and the control signals, and the data signals coming from the LCD monitor controller.
In the forgoing invention, the LCD monitor controller with monitor-in-system programming function includes a signal detector coupled to the VGA signal lines for detecting and transmitting the erase/record commands and data. An activation device is coupled to the signal detector. Wherein the activation device is normally connected to a video pathway, but as soon as erase/record commands is detected, the activation device is switched to an erase/record pathway so that erase/record commands and data can be re-directed. A ROM erase/record command decoder is coupled to the activation device via the erase/record pathway, wherein the decoder translates the erase/record commands into a plurality of erase/read/write signals and translates the erase/record data into a plurality of address signals and a plurality of data. A mode return device is coupled to the ROM erase/record command decoder and the activation device. Wherein, the reprogramming status of the ROM unit can be determined from the address, data and erase/read/write signals so that the activation device can be triggered to switch over connection from the erase/record pathway to the video pathway as soon as reprogramming is finished.
The invention also provides a method for reprogramming the function of a LCD monitor system. The method includes tapping a plurality of signals from a set of video graphic adapter (VGA) signal lines to perform a plurality of consecutive address sequence comparisons with a pre-set address sequence. A programming mode inside the LCD monitor system is triggered when one of the tapped consecutive address sequences matches that of the pre-set address sequence. An erase/record command is read and it is decided what actions to take as soon as the programming mode is activated. The erase/record data is read and the erase/record data is written into a memory unit when the erase/record command is for a write operation, and then returning to the previous step. When the erase/record command demands a return to a non-programming mode, the process returns back to the very first step.
The invention will become more fully understood from the detailed description given hereinafter and the accompanying drawings which are given by way of illustration only, and thus do not limit the present invention, and wherein:
Referring to FIG. 3 , a block diagram schematically shows the circuit connections of various elements of a programmable monitor system according to this invention. The invention uses a monitor controller 180 with monitor-in-system programming function to receive the VGA signals 18, including Vsync, Hsync, SDA, SCL, and R.G.B. signals. The monitor controller 180 is also coupled to a LCD displaying panel (not shown) through a panel connector and a flash ROM 120. The VGA signals 18 are input to the monitor controller 180, then the monitor controller 180 also refers to the program stored in the flash ROM 120 to drive the LCD displaying panel.
When the function of driving program in the flash ROM 120 is desired to be updated, the updated program and data can be written to the flash ROM 120 without the need of opening the case of the monitor and the jumper for switching. For example, the updated information can be input through the SDA and SCL signal lines. Compared to the prior art, it is unnecessary to open the case of the monitor. In other words, the function update of the monitor can be achieved by just using the original signal lines 18.
Alternatively, the erase/record device can utilize an inter-integrated circuit (IIC) interface circuit platform. To reprogram the function of the monitor, erase/record commands and data are first written into the memory area of the IIC interface circuit platform. The erase/record commands and data are sent in the IIC interface format to the ROM inside the monitor controller 180 directly via the VGA signal lines.
In this embodiment of the invention, the serial data line SDA and the serial clock line SCL of the VGA signal lines are used to transmit erase/record commands and data in the IIC interface format. In practice, any two of the signal lines including SDA, SCL, Hsync and Vsync can be used for transmitting erase/record commands and data in the IIC interface format.
VGA signal lines are connected to the signal detector 300. The signal detector 300 is a device for detecting any erase/record commands and data on the VGA signal lines. Signals are next delivered to the activation device 400.
The activation device 400 has a video pathway and an erase/record pathway. When erase/record commands are detected by the signal detector 300, the erase/record commands and data are re-directed to the ROM erase/record command decoder 500 via the erase/record pathway by the activation device 400. In the normal mode of operation, video signals are re-directed to the image-processing circuits 700 via the video pathway by the activation device 400.
The ROM erase/record command decoder 500 translates the erase/record commands into erase/read/write signals to be used by the ROM unit 120 and the erase/record data are also translated into addresses and data signals. The translated signals are the sent to the ROM unit 120 so that monitor function can be modified.
The ROM erase/record command decoder 500 produces the address signals, the data signals, and the control signals and then exports the signals to an external ROM unit (not shown), which stores a program code and data used for performing displaying function. The external ROM can, for example, be the flash memory or erasable programmable ROM. However, if an updated program is desired, the program code can be erased and reprogrammed according to the address signals, data signals and erase/read/write signals picked up by the ROM unit.
The mode return device 600 is coupled to the ROM erase/record command decoder 500 and the activation device 400. According to address, data and read/write signals feedback from the decoder 500, progress in the reprogramming of ROM 120 can be determined. When the reprogramming is finished, the mode return device 600 signals to the activation device 400 so that connection to the video pathway is re-established.
In the following, elements and operation of each device are described in detail.
The hidden ROM 522 is a device for storing the program code of erase/record commands, and the RAM unit 526 is a device for storing erase/record data. The central processing unit 524 picks up the translated erase/record commands and data from the IIC interface circuit. The erase/record data is stored in the RAM unit 526. The erase/record commands are decoded using the decoding program inside the hidden ROM 522. The decoded erase/record commands are transmitted to an erase/record control register 528 where the commands are converted into ROM interface control signals or erase/read/write signals. The erase/record data stored in the RAM unit 526 is converted into address and data signals by the central processing unit 524.
The erase/record command decoder 520 can also be implemented using a hardware circuit. The erase/record commands picked up from the IIC circuit are divided into different states so that the commands can easily be converted into erase/read/write, address and data signals.
In summary, the invention provides a monitor control system capable of reprogramming the function of a LCD monitor. The monitor control system utilizes the VGA signal lines for signal transmission in normal operation and the same VGA signal lines in the modification of data inside the erasable programmable ROM of a monitor controller in the reprogramming mode. The original cable used by the VGA card can be used to rewrite a program used by the LCD monitor controller without opening the case and no need of the jumper. Also and, the related on-screen display information can also be updated.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
Claims (63)
1. A device for reprogramming the function of a liquid crystal display (LCD) monitor, comprising:
a set of video graphic adapter (VGA) signal lines for transmitting a plurality of erase/record commands and a plurality of erase/record data;
a signal detector coupled to the VGA signal lines for detecting and re-transmitting the erase/record commands and data;
an activation device coupled to the signal detector, wherein the activation device is normally connected to a video pathway, but as soon as erase/record commands are detected, the activation device is switched to an erase/record pathway so that erase/record commands and data can be re-directed;
a read-only-memory (ROM) erase/record command decoder connected to the activation device via the erase/record pathway, wherein the decoder translates the erase/record commands into a plurality of control signals and translates the erase/record data into a plurality of address signals and a plurality of data signals;
a plurality of signal lines for transferring the control signals, the address signals, and the data signals to an external ROM unit, wherein a content of the ROM unit can be modified according to the control signals, the address signals, and the data signals; and
a mode return device coupled to the ROM erase/record command decoder and the activation device, wherein the reprogramming status of the ROM unit can be determined from the address, data and read/write signals so that the activation device can be triggered to switch over connection from the erase/record pathway to the video pathway as soon as reprogramming is finished.
2. The device of claim 1 , wherein the erase/record commands and data come from an erase/record device that couples to the VGA signal lines.
3. The device of claim 2 , wherein the erase/record device is a computer platform that sends the erase/record commands and data in an inter-integrated circuit interface format via a parallel port VGA adapter.
4. The device of claim 2 , wherein the erase/record device is an inter-integrated circuit interface circuit platform for transmitting erase/record commands and data in an inter-integrated circuit interface format.
5. The device of claim 1 , wherein the signal detector further includes:
an inter-integrated circuit multiple address content comparator circuit coupled to the VGA signal lines for comparing with a plurality of consecutive address sequences in the erase/record data such that a set signal is transmitted when there is a match with a pre-set address sequence; and
a monitor-in-system programming control flag unit coupled to the inter-integrated circuit multiple address content comparator circuit for transmitting a start signal after receiving the set signal.
6. The device of claim 1 , wherein the activation device further includes:
a monitor-in-system reprogramming initialization circuit for producing a select signal after receiving the start signal; and
an erase/record pathway isolator for switching over connection from the video pathway to the erase/record pathway after receiving the select signal and transmitting the erase/record commands and data via the erase/record pathway.
7. The device of claim 1 , wherein the ROM erase/record command decoder further includes:
an inter-integrated interface circuit for receiving and translating the erase/record commands and data; and
an erase/record command decoder for receiving translated erase/record commands and data and outputting address, data and erase/read/write signals.
8. The device of claim 7 , wherein the erase/record command decoder further includes:
a hidden ROM for holding a program code for erase/record commands;
a random access memory (RAM) unit for holding erase/record data;
a central processing unit coupled to the hidden ROM, the RAM unit and the inter-integrated interface circuit, wherein the central processing unit receives the erase/record commands and data passing through the inter-integrated circuit interface circuit and then stores the erase/record data in the RAM unit, while the erase/record commands are decoded by referring to the program code in the hidden ROM and then the decoded commands are re-transmitted; and
an erase/record control register coupled to the central processing unit for receiving the decoded erase/record commands and converting the erase/record commands into the interface control signals or erase/read/write signals, and converting the erase/record data stored in the RAM unit into address and data signals.
9. The device of claim 7 , wherein the erase/record command decoder is a hardware circuit that separates each erase/record command picked up by the inter-integrated circuit into a plurality of states for ease of decoding and converts the erase/record commands and data into erase/read/write, address and data signals.
10. The device of claim 1 , wherein the mode return device further includes:
a mode return control register for receiving the address, data and erase/read/write signals and producing a mode return signal as soon as a reprogramming operation is finished; and
a mode return circuit coupled to the mode return control register and the activation device for sending a stop signal to the activation device after receiving the mode return signal so that the activation device switches over connection from the erase/record pathway back to the video pathway.
11. The device of claim 1 , wherein the external ROM unit comprises a flash ROM unit.
12. The device of claim 1 , wherein the external ROM unit comprises an erasable programmable ROM unit.
13. A system for reprogramming the function of a liquid crystal display (LCD) monitor, comprising:
an erase/record device for holding and transmitting a plurality of erase/record commands and a plurality of erase/record data;
a set of video graphic adapter (VGA) signal lines coupled to the erase/record device for transmitting the erase/record commands and data; and
a LCD monitor controller with a monitor-in-system programming function, wherein the LCD monitor controller is coupled to the VGA signal lines so that the erase/record commands of the erase/record device and data are received from the erase/record device via the VGA signal lines, and then a plurality of address signals, a plurality of data signals, and a plurality of control signals are exported for reprogramming a ROM unit, wherein
the ROM unit coupled to the LCD monitor controller via signal lines for transferring the address signals, the data signals and the control signals, so that data stored in the ROM unit can be modified according to the address signals and the control signals, and the data signals coming from the LCD monitor controller.
14. The system of claim 13 , wherein the erase/record device is a computer platform that sends the erase/record commands and data in an inter-integrated circuit interface format via a parallel port VGA adapter.
15. The system of claim 13 , wherein the erase/record device is an inter-integrated circuit interface circuit platform for transmitting erase/record commands and data in an inter-integrated circuit interface format.
16. The system of claim 13 , wherein the LCD monitor controller with monitor-in-system programming function includes:
a signal detector coupled to the VGA signal lines for detecting and transmitting the erase/record commands and data;
an activation device coupled to the signal detector, wherein the activation device is normally connected to a video pathway, but as soon as erase/record commands is detected, the activation device is switched to an erase/record pathway so that erase/record commands and data can be re-directed;
a ROM erase/record command decoder connected to the activation device via the erase/record pathway, wherein the decoder translates the erase/record commands into a plurality of erase/read/write signals and translates the erase/record data into a plurality of address signals and a plurality of data signals; and
a mode return device coupled to the ROM record command decoder and the activation device, wherein the reprogramming status of a ROM unit can be determined from the address, data and erase/read/write signals so that the activation device can be triggered to switch over connection from the erase/record pathway to the video pathway as soon as reprogramming is finished.
17. The system of claim 16 , wherein the signal detector further includes:
an inter-integrated circuit multiple address content comparator circuit coupled to the VGA signal lines for comparing with a plurality of consecutive address sequences in the erase/record data such that a set signal is transmitted when there is a match with a pre-set address sequence; and
a monitor-in-system programming control flag unit coupled to the inter-integrated circuit multiple address content comparator circuit for transmitting a start signal after receiving the set signal.
18. The system of claim 16 , wherein the activation device further includes:
a monitor-in-system reprogramming initialization circuit for producing a select signal after receiving the start signal; and
an erase/record pathway isolator for switching over connection from the video pathway to the erase/record pathway after receiving the select signal and transmitting the erase/record commands and data via the erase/record pathway.
19. The system of claim 16 , wherein the ROM erase/record command decoder further includes:
an inter-integrated interface circuit for receiving and translating the erase/record commands and data; and
an erase/record command decoder for receiving translated erase/record commands and data and outputting address, data and erase/read/write signals.
20. The system of claim 19 , wherein the erase/record command decoder further includes:
a hidden ROM for holding a program code for erase/record commands;
a random access memory (RAM) unit for holding erase/record data;
a central processing unit coupled to the hidden ROM, the RAM unit and the inter-integrated interface circuit, wherein the central processing unit receives the erase/record commands and data passing through the inter-integrated circuit interface circuit and then stores the erase/record data in the RAM unit, while the erase/record commands are decoded by referring to the program code in the hidden ROM after which the decoded commands are re-transmitted; and
an erase/record control register coupled to the central processing unit for receiving the decoded erase/record commands and converting the erase/record commands into the interface control signals or erase/read/write signals, and converting the erase/record data stored in the RAM unit into address and data signals.
21. The system of claim 19 , wherein the erase/record command decoder is a hardware circuit that separates each erase/record command picked up by the inter-integrated circuit into a plurality of states for ease of decoding and converts the erase/record commands and data into erase/read/write, address and data signals.
22. The system of claim 16 , wherein the mode return device further includes:
a mode return control register for receiving the address, data and read/write signals and producing a mode return signal as soon as a reprogramming operation is finished; and
a mode return circuit coupled to the mode return control register and the activation device for sending a stop signal to the activation device after receiving the mode return signal so that the activation device switches connection from the erase/record pathway back to the video pathway.
23. The system of claim 13 , wherein the ROM unit inside the monitor controller is a flash ROM unit.
24. The system of claim 13 , wherein the ROM unit comprises an erasable programmable ROM unit.
25. A method for reprogramming the function of a liquid crystal display (LCD) monitor system, comprising the steps of:
tapping a plurality of signals from a set of video graphic adapter (VGA) signal lines to perform a plurality of consecutive address sequence comparisons with a pre-set address sequence;
triggering a programming mode inside the LCD monitor system when one of the tapped consecutive address sequences matches that of the pre-set address sequence;
reading an erase/record command and deciding what actions to take as soon as the programming mode is activated;
reading in erase/record data and writing the erase/record data into a memory unit when the erase/record command is for a write operation, and then returning to the previous step; and
returning to the very first step when the erase/record command demands a return to a non-programming mode.
26. The method of claim 25 , wherein reprogramming starts only when the LCD monitor system is not operating in a normal mode.
27. The method of claim 25 , wherein the LCD monitor system continues to operate in a normal video transmission mode when the tapped consecutive address sequence does not match any pre-set address sequence.
28. A device for reprogramming the function of a display, comprising:
a set of video signal lines for transmitting a plurality of erase/record commands and a plurality of erase/record data;
a signal detector coupled to the video signal lines for detecting and re-transmitting the erase/record commands and data;
an activation and command decoder device coupled to the signal detector, wherein the activation device is normally connected to a video pathway, but after the erase/record commands are detected, the activation device is switched to an erase/record pathway so that the erase/record data can be re-directed, wherein the activation and command decoder translates the erase/record commands into a plurality of control signals and translates the erase/record data into a plurality of data signals;
a plurality of signal lines for transferring the control signals and the data signals to a ROM unit, wherein a content of the ROM unit is modified according to the control signals and the data signals.
29. The device of claim 28 , wherein the erase/record commands and data come from an erase/record device that couples to the video signal lines.
30. The device of claim 29 , wherein the erase/record device is a computer platform that sends the erase/record commands and data in an inter-integrated circuit interface format via a video port.
31. The device of claim 29 , wherein the erase/record device is an inter-integrated circuit interface circuit platform for transmitting erase/record commands and data in an inter-integrated circuit interface format.
32. The device of claim 28 , wherein the signal detector further includes:
an inter-integrated circuit address content comparator circuit coupled to the video signal lines for comparing with an address in the erase/record data such that a set signal is transmitted when there is a match with a pre-set address; and
a monitor-in-system programming control flag unit coupled to the inter-integrated circuit address content comparator circuit for transmitting a start signal after receiving the set signal.
33. The device of claim 28 , wherein the activation and command decoder device further includes:
a monitor-in-system reprogramming initialization circuit for producing a select signal after receiving the start signal; and
an erase/record pathway isolator for switching over connection from the video pathway to the erase/record pathway after receiving the select signal and transmitting the erase/record commands and data via the erase/record pathway.
34. The device of claim 28 , wherein the activation and command decoder device further includes:
an inter-integrated interface circuit for receiving and translating the erase/record commands and data; and
an erase/record command decoder for receiving translated erase/record commands and data and outputting address, data and erase/read/write signals.
35. The device of claim 34 , wherein the erase/record command decoder further includes:
a hidden ROM for holding a program code for erase/record commands;
a random access memory (RAM) unit for holding erase/record data;
a central processing unit coupled to the hidden ROM, the RAM unit and the inter-integrated interface circuit, wherein the central processing unit receives the erase/record commands and data passing through the inter-integrated circuit interface circuit and then stores the erase/record data in the RAM unit, while the erase/record commands are decoded by referring to the program code in the hidden ROM and then the decoded commands are re-transmitted; and
an erase/record control register coupled to the central processing unit for receiving the decoded erase/record commands and converting the erase/record commands into the interface control signals or erase/read/write signals, and converting the erase/record data stored in the RAM unit into address and data signals.
36. The device of claim 34 , wherein the erase/record command decoder is a hardware circuit that separates each erase/record command picked up by the inter-integrated circuit into a plurality of states for ease of decoding and converts the erase/record commands and data into erase/read/write, address and data signals.
37. The device of claim 28 , wherein the video signal lines comprise video graphic adapter (VGA) signal lines.
38. The device of claim 28 , wherein the video signal lines comprise digital visual interface (DVI) signal lines.
39. The device of claim 28 , wherein the video signal lines comprise high definition multimedia interface (HDMI) signal lines.
40. The device of claim 28 , wherein the video signal lines comprise component video lines.
41. The device of claim 28 , wherein the video signal lines comprise S-video lines.
42. The device of claim 28 , wherein the external ROM unit comprises a flash ROM unit.
43. The device of claim 28 , wherein the external ROM unit comprises an erasable programmable ROM unit.
44. A system for reprogramming the function of a display, comprising:
an erase/record device for holding and transmitting a plurality of erase/record commands and a plurality of erase/record data;
a set of video signal lines coupled to the erase/record device for transmitting the erase/record commands and data; and
a display controller with a programming function, wherein the display controller is coupled to the video signal lines so that the erase/record commands of the erase/record device and data are received from the erase/record device via the video signal lines, and then a plurality of data signals and a plurality of control signals are exported for reprogramming a ROM unit,
wherein the ROM unit coupled to the display controller via signal lines for transferring the data signals and the control signals, so that data stored in the ROM unit are modified according to the control signals and the data signals coming from the display controller.
45. The system of claim 44 , wherein the erase/record device is a computer platform that sends the erase/record commands and data in an inter-integrated circuit interface format via a video port.
46. The system of claim 44 , wherein the erase/record device is an inter-integrated circuit interface circuit platform for transmitting erase/record commands and data in an inter-integrated circuit interface format.
47. The system of claim 44 , wherein the display controller with monitor-in-system programming function includes:
a signal detector coupled to the video signal lines for detecting and transmitting the erase/record commands and data;
an activation device coupled to the signal detector, wherein the activation device is normally connected to a video pathway, but after the erase/record commands is detected, the activation device is switched to an erase/record pathway so that erase/record commands and data can be re-directed;
a command decoder connected to the activation device via the erase/record pathway, wherein the decoder translates the erase/record commands into a plurality of erase/read/write signals and translates the erase/record data into a plurality of data signals; and
a mode return device coupled to the command decoder and the activation device, wherein the reprogramming status of a ROM unit can be determined from the data and erase/read/write signals so that the activation device can be triggered to switch over connection from the erase/record pathway to the video pathway after reprogramming is finished.
48. The system of claim 47 , wherein the signal detector further includes:
an inter-integrated circuit address content comparator circuit coupled to the video signal lines for comparing with an address in the erase/record data such that a set signal is transmitted when there is a match with a pre-set address; and
a monitor-in-system programming control flag unit coupled to the inter-integrated circuit address content comparator circuit for transmitting a start signal after receiving the set signal.
49. The system of claim 47 , wherein the activation device further includes:
a monitor-in-system reprogramming initialization circuit for producing a select signal after receiving the start signal; and
an erase/record pathway isolator for switching over connection from the video pathway to the erase/record pathway after receiving the select signal and transmitting the erase/record commands and data via the erase/record pathway.
50. The system of claim 47 , wherein the command decoder further includes:
an inter-integrated interface circuit for receiving and translating the erase/record commands and data; and
an erase/record command decoder for receiving translated erase/record commands and data and outputting address, data and erase/read/write signals.
51. The system of claim 50 , wherein the erase/record command decoder further includes:
a hidden ROM for holding a program code for erase/record commands;
a random access memory (RAM) unit for holding erase/record data;
a central processing unit coupled to the hidden ROM, the RAM unit and the inter-integrated interface circuit, wherein the central processing unit receives the erase/record commands and data passing through the inter-integrated circuit interface circuit and then stores the erase/record data in the RAM unit, while the erase/record commands are decoded by referring to the program code in the hidden ROM after which the decoded commands are re-transmitted; and
an erase/record control register coupled to the central processing unit for receiving the decoded erase/record commands and converting the erase/record commands into the interface control signals or erase/read/write signals, and converting the erase/record data stored in the RAM unit into address and data signals.
52. The system of claim 50 , wherein the erase/record command decoder is a hardware circuit that separates each erase/record command picked up by the inter-integrated circuit into a plurality of states for ease of decoding and converts the erase/record commands and data into erase/read/write, address and data signals.
53. The system of claim 47 , wherein the mode return device further includes:
a mode return control register for receiving the address, data and read/write signals and producing a mode return signal after a reprogramming operation is finished; and
a mode return circuit coupled to the mode return control register and the activation device for sending a stop signal to the activation device after receiving the mode return signal so that the activation device switches connection from the erase/record pathway to the video pathway.
54. The device of claim 44 , wherein the video signal lines comprise video graphic adapter (VGA) signal lines.
55. The device of claim 44 , wherein the video signal lines comprise digital visual interface (DVI) signal lines.
56. The device of claim 44 , wherein the video signal lines comprise high definition multimedia interface (HDMI) signal lines.
57. The device of claim 44 , wherein the video signal lines comprise component video lines.
58. The device of claim 44 , wherein the video signal lines comprise S-video lines.
59. The system of claim 44 , wherein the ROM unit inside the monitor controller is a flash ROM unit.
60. The system of claim 44 , wherein the ROM unit comprises an erasable programmable ROM unit.
61. A method for reprogramming the function of a display system, comprising the steps of:
tapping a plurality of signals from a set of video signal lines to perform an address comparison with a pre-set address;
triggering a programming mode inside the display system when one of the tapped address matches that of the pre-set address;
reading an erase/record command and deciding what actions to take after the programming mode is activated;
reading in erase/record data and writing the erase/record data into a memory unit when the erase/record command is for a record operation.
62. The method of claim 61 , wherein reprogramming starts only when the display system is not operating in a normal mode.
63. The method of claim 61 , wherein the display system continues to operate in a normal video transmission mode when the tapped address does not match any pre-set address.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/243,919 USRE41966E1 (en) | 1999-10-07 | 2008-10-01 | Device and method for repeatedly updating the function of a LCD monitor |
US12/906,031 USRE44388E1 (en) | 1999-10-07 | 2010-10-15 | Device and method for repeatedly updating the function of a LCD monitor |
US13/904,463 USRE45305E1 (en) | 1999-07-19 | 2013-05-29 | Device for reprogramming the function of a display system |
US14/470,681 USRE45860E1 (en) | 1999-07-19 | 2014-08-27 | Device and method for reprogramming the function of a display system |
US14/957,353 USRE47206E1 (en) | 1999-07-19 | 2015-12-02 | Display controller device and method for reprogramming the function of a display system |
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/414,251 US6295053B1 (en) | 1999-07-19 | 1999-10-07 | System for reprogramming monitor function |
US09/543,008 US6577301B1 (en) | 1999-12-16 | 2000-04-04 | Method and apparatus for rewriting functions and fonts of a monitor |
US09/575,890 US6661411B1 (en) | 1999-07-19 | 2000-05-22 | Device and method for repeatedly updating the function of a monitor |
US10/418,435 US6697058B2 (en) | 1999-10-07 | 2003-04-17 | Device and method for repeatedly updating the function of a LCD monitor |
US11/361,038 USRE40574E1 (en) | 1999-10-07 | 2006-02-22 | Device and method for repeatedly updated the function of a LCD monitors |
US12/243,919 USRE41966E1 (en) | 1999-10-07 | 2008-10-01 | Device and method for repeatedly updating the function of a LCD monitor |
Related Parent Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/418,435 Reissue US6697058B2 (en) | 1999-07-19 | 2003-04-17 | Device and method for repeatedly updating the function of a LCD monitor |
US11/361,038 Continuation USRE40574E1 (en) | 1999-07-19 | 2006-02-22 | Device and method for repeatedly updated the function of a LCD monitors |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/418,435 Continuation US6697058B2 (en) | 1999-07-19 | 2003-04-17 | Device and method for repeatedly updating the function of a LCD monitor |
US12/906,031 Continuation USRE44388E1 (en) | 1999-07-19 | 2010-10-15 | Device and method for repeatedly updating the function of a LCD monitor |
Publications (1)
Publication Number | Publication Date |
---|---|
USRE41966E1 true USRE41966E1 (en) | 2010-11-30 |
Family
ID=28678941
Family Applications (7)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/361,037 Expired - Lifetime USRE40422E1 (en) | 1999-07-19 | 2006-02-22 | Device and methods for repeatedly updating the function of a LCD monitor |
US11/361,038 Expired - Lifetime USRE40574E1 (en) | 1999-07-19 | 2006-02-22 | Device and method for repeatedly updated the function of a LCD monitors |
US12/243,919 Expired - Lifetime USRE41966E1 (en) | 1999-07-19 | 2008-10-01 | Device and method for repeatedly updating the function of a LCD monitor |
US12/906,031 Expired - Lifetime USRE44388E1 (en) | 1999-07-19 | 2010-10-15 | Device and method for repeatedly updating the function of a LCD monitor |
US13/904,463 Expired - Lifetime USRE45305E1 (en) | 1999-07-19 | 2013-05-29 | Device for reprogramming the function of a display system |
US14/470,681 Expired - Lifetime USRE45860E1 (en) | 1999-07-19 | 2014-08-27 | Device and method for reprogramming the function of a display system |
US14/957,353 Expired - Lifetime USRE47206E1 (en) | 1999-07-19 | 2015-12-02 | Display controller device and method for reprogramming the function of a display system |
Family Applications Before (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/361,037 Expired - Lifetime USRE40422E1 (en) | 1999-07-19 | 2006-02-22 | Device and methods for repeatedly updating the function of a LCD monitor |
US11/361,038 Expired - Lifetime USRE40574E1 (en) | 1999-07-19 | 2006-02-22 | Device and method for repeatedly updated the function of a LCD monitors |
Family Applications After (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/906,031 Expired - Lifetime USRE44388E1 (en) | 1999-07-19 | 2010-10-15 | Device and method for repeatedly updating the function of a LCD monitor |
US13/904,463 Expired - Lifetime USRE45305E1 (en) | 1999-07-19 | 2013-05-29 | Device for reprogramming the function of a display system |
US14/470,681 Expired - Lifetime USRE45860E1 (en) | 1999-07-19 | 2014-08-27 | Device and method for reprogramming the function of a display system |
US14/957,353 Expired - Lifetime USRE47206E1 (en) | 1999-07-19 | 2015-12-02 | Display controller device and method for reprogramming the function of a display system |
Country Status (1)
Country | Link |
---|---|
US (7) | USRE40422E1 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
USRE40422E1 (en) * | 1999-10-07 | 2008-07-08 | Novatek Microelectronics Corp. | Device and methods for repeatedly updating the function of a LCD monitor |
US20170032746A1 (en) * | 2015-07-31 | 2017-02-02 | Shenzhen China Star Optpelectronics Technology Co. Ltd. | Driving circuit communication method, communication device and system of tft-lcd |
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- 2008-10-01 US US12/243,919 patent/USRE41966E1/en not_active Expired - Lifetime
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Also Published As
Publication number | Publication date |
---|---|
USRE40422E1 (en) | 2008-07-08 |
USRE40574E1 (en) | 2008-11-18 |
USRE47206E1 (en) | 2019-01-15 |
USRE45860E1 (en) | 2016-01-19 |
USRE44388E1 (en) | 2013-07-23 |
USRE45305E1 (en) | 2014-12-30 |
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