WO1988005947A1 - Array processor for optimizing state variables and travel costs between two topographical points - Google Patents

Array processor for optimizing state variables and travel costs between two topographical points Download PDF

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Publication number
WO1988005947A1
WO1988005947A1 PCT/US1988/000203 US8800203W WO8805947A1 WO 1988005947 A1 WO1988005947 A1 WO 1988005947A1 US 8800203 W US8800203 W US 8800203W WO 8805947 A1 WO8805947 A1 WO 8805947A1
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WO
WIPO (PCT)
Prior art keywords
point
array
cost
points
accumulated cost
Prior art date
Application number
PCT/US1988/000203
Other languages
French (fr)
Inventor
Paul Arthur Zank
Edward James Grundler
Original Assignee
Lockheed Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lockheed Corporation filed Critical Lockheed Corporation
Publication of WO1988005947A1 publication Critical patent/WO1988005947A1/en

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Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05DSYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES
    • G05D1/00Control of position, course or altitude of land, water, air, or space vehicles, e.g. automatic pilot
    • G05D1/0005Control of position, course or altitude of land, water, air, or space vehicles, e.g. automatic pilot with arrangements to save energy
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/10Geometric CAD
    • G06F30/18Network design, e.g. design based on topological or interconnect aspects of utility systems, piping, heating ventilation air conditioning [HVAC] or cabling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06QINFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q10/00Administration; Management
    • G06Q10/04Forecasting or optimisation specially adapted for administrative or management purposes, e.g. linear programming or "cutting stock problem"
    • G06Q10/047Optimisation of routes or paths, e.g. travelling salesman problem

Definitions

  • This invention relates to a special data processing 5 system and method for solving complex problems.
  • ]_Q require the determination of all possible permutations and combinations in order to obtain the optimal solu ⁇ tion. Further, when the problem involves a geometri ⁇ cally increasing number of calculations, and where the number" of required inputs becomes very large, the 5 necessary calculation may take an inordinate amount of time, using a general purpose computer.
  • a geographical area such as a section of the United States may be divided into a grid with the intersection of the grid lines constituting key points on the map.
  • data may be available, in ⁇ volving the local wind velocity at each point and other 5 factors, which would provide the incremental time, or required incremental fuel, for a flight to each point on the grid, from each adjacent point, taking into conside ⁇ ration the direction of flight to and from each point, and the aircraft characteristics for which the calculat- 0 ions are being made.
  • a predetermined starting point is then identified. The problem is then to minimize the time of the flight, or the fuel used, to all other possible destinations in the grid, and any factor of merit of this type will generically be referenced herein 5 as the "cost".
  • a principal object of the present invention is to solve problems of the type identified above in a simpler and more efficient way.
  • the current embodiment typically solves a problem in four to six seconds.
  • a point- by-point dynamic programming system and method involves establishing memory identifications or locations corresponding to each point on the geographical or topological grid, as mentioned above, with the accumula ⁇ ted cost from the starting point to each point being stored in a corresponding location in the system memory.
  • the cost value at the start point or points will be set to zero or the appropriate low value, and the accumulated cost value at all other points will be set to a maximum value.
  • the next step involves the determination of the incremental value from the start point to the next adjacent points, and the substitution of the new, relatively low, accumulated cost value for the maximum value previously stored relative to each grid point.
  • the system steps through the entire grid array several times, and the optimum minimum accumulated cost values quickly proprogate across the array, with the calculation being completed when a single complete pass results in no further changes in the accumulated cost at any point.
  • one specific optimiz ⁇ ing coprocessor includes:
  • First and second storage units for storing accumulated "costs" for each point in a geographical or topological array or grid, as related to a predetermined starting point in the array:
  • Control or addressing arrangements for addressing the first and second storage units concur ⁇ rently, or for addressing the second of said storage units independent of said first unit
  • a large scale memory for storing incremental cost information for all points in the array, and more specifically for storing incremental cost information for each selected point in the array from a plurality of adjacent points, and with separate incremental cost information taking other factors into consideration, such as different directions from the selected and adjacent points;
  • Control circuitry for substituting the newly 5 calculated accumulated cost figure into the accumulated cost memory if it is lower than the figure previously stored therein;
  • the cumulative cost memory may be made up of first and second substan ⁇ tially identical memories or sections of a larger 5 memory; both of which may at certain points in time contain the same accumulated cost information.
  • the accumulated cost for the starting point for example, is withdrawn from a first of these two accumulated cost memories, and the incremental cost to the next adjacent
  • the accumulated cost memories may, in practice hold a substantial number of values for each point, relating, for example, to different output
  • Figure 1 is a diagram of a grid showing a geogra ⁇ phical or topological array of points, and an optimal path from a starting point to an end point;
  • FIGS 2, 3 and 4 are schematic block diagrams of a system for implementing the principals of the present invention.
  • Figure 5 is block logic diagram showing one illustrative implementation of the present invention.
  • Figure 6 is a view of a printed circuit board showing a prototype embodiment of the present invention.
  • Figure 7 is a schematic diagram of possible flight paths to any point I, J, from previous adjacent points, F, G;
  • Figure 8 is a diagram which is useful in under ⁇ standing some of the calculations which may be employed in the implementation of the present invention.
  • Figure 9 is a diagram employed in calculating certain values used in the implementation of the present invention.
  • Figure 10 is a logic diagram indicating the mode of operation of the circuit of Fig. 5.
  • Figure 1 is a diagram of a geographical or a topological array in which a series of vertical or horizontal lines form a grid with a large number of intersecting points.
  • the array may be geographi ⁇ cal and include an area of 756 by 756 miles, with the grid lines being spaced apart by approximately 12 miles, and having 64 vertical and 64 horizontal lines.
  • a starting point for an airplane is indicated by the letter "S”
  • the landing point or end point is designated by the reference letter "E”.
  • a w nd such as a jet stream, is indicated by a series of arrows, 12, with the intensity of the wind being indicated by the length or density of the arrows.
  • each grid point has associated with it an accumulated cost figure, from a starting point "S" to each grid point designated by the coordinates "i, j".
  • the incremental "cost" from each grid point, to adjacent grid points is stored in memory; and, as mentioned above, the accumulated cost to each grid point is calculated by adding the incremental cost from adjacent grid points to the accumulated cost associated with each prior adjacent grid point.
  • FIGS. 2, 3 and 4 give an overall view of an illustrative system for implementing the present invention. More specifically, referring to Figure 2, two memories, 12 and 14, are provided which each include in storage, all of the accumulated cost figures for the entire array at each of points "i,j". A large memory, 16, is provided, which includes all of the incremental data involving the cost between each point i, j, and the adjacent points, f, g. Information included in the calculations for the entries in the incremental memory 16 would, for example, include wind speed information, which would make the incremental cost between east-west points on the jet stream signifi ⁇ cantly lower, in the west-to-east direction as shown in Figure 1, than in the east-to-we ⁇ t direction.
  • the point i, j, under consideration will be designated by the reference numeral 18, with the previous adjacent point, f, g, being designated by the reference numeral 20.
  • the accumulated cost stored relative to the point i, j, or point 18 as shown in Figure 1 is accessed from the memory 12, and appears on bus 22.
  • the accumulated cost for the point f, g, or point 20 as shown in Figure 1 is accessed from the memory 14, and the incremental cost to get from the prior point f, g to the point under consideration i, j, is accessed from the memory 16 as shown in Figure 2.
  • the accumulated cost from the prior point is added to the incremental cost in the adder 24, and the resultant sum in compared in the comparator 26 with the previously stored accumulated cost value from store 12, in the comparator 26. If the newly calculated accumulated cost value P' plus V is less than the prior stored accumulated cost value from store 12, then the new lower accumulated cost figure is entered into both memories 12 and 14, in the address corresponding to point i,j. In addition, the "not done" latch 28 is set, so that another complete pass through all points in the array will be accomplished, to see if there are any further changes to establish the minimum values in the memories 12 and 14.
  • the multi- plexer 30 permits the addressing of the store 14, also designated P' , either by the grid point location i, j.
  • Figure 3 shows the sequence controller including the clock gate 34, and the counters 36, 38, 40, and 42. With the counters I, J, being set to the initial grid point, the counters 36 and 38 are actuated to perform the calculation discussed hereinbelow in connection with Figure 2 for each of 16 output directions the point i, j, and from each of 16 adjacent previous points, f, g, making a total of 256 calculations, for each point, i, j . The details of this type of calculation and the subject matter which is involved will be discussed in greater detail hereinbelow.
  • Figure 4 shows in broad terms the nature of the index generators.
  • the index generator, 44, 46 provides an output signal indicating one coordinate "f" of the prior adjacent point.
  • the logic circuits 48 and 50 provide the identification of the other coordinate "g" of the immediately adjacent point from the point under conside ⁇ ration "j". From a more practical consideration, with reference to Figure 1, the number at the output of the block 44 would be minus 1, giving an " 1" value which is one less than the corresponding "i” value for the point 18.
  • Logic circuit 52 provides the turn model H, which is derived from the directional and the turn input signals to the block 52, all as discussed in greater detail hereinbelow.
  • FIG. 5 The larger block circuit diagram of Figure 5 shows in somewhat greater detail the implementation of the dynamic point-to-point calculation system illustrating the present invention.
  • a host computer 63 is indicated schematically at the far left of the diagram and the large scale memory 16 containing the incremental data, is shown toward the center at the bottom of the diagram.
  • the appropriate indication for the turn parameter H will also appear at the output bus 68 from circuit 52.
  • the input IDIR indicates the output direction from the selected point i, j and can take any of 16 values.
  • the output on bus 72 to the adder 24 will be the total cost figure for the prior adjacent point f, g.
  • To this value is added the incremental data between the point under consideration (i, j) and the prior adjacent point (f, g) which appears on bus 74.
  • the sum of these two quantities appears on bus 76 at the input to the comparator 26 where it is compared with the existing accumulated cost value from memory 12, which appears on bus 22.
  • the values for the accumulated cost throughout the array is initially set to a maximum value in the storage units 12 and 14, so that at least initially, the newly calcula ⁇ ted values appearing on bus 76 are likely to be less than the previous values appearing on bus 22.
  • the update control circuit 78 will be actuated so that the latch circuit 80 will hold the new accumula ⁇ ted cost value.
  • This new accumulated cost value is then fed back through the buffers 82 and 84 to the memories 12 and 14, respectively, to be substituted for the prior larger values.
  • the counter 62 checks for each of 16 output direc- tions from the point i, j and also checks for each of 16 adjacent points from which aircraft might logically come, by stepping through the counting cycle of counter 62.
  • the host computer 63 is coupled to the system by the additional address bus 108 and the data bus 110.
  • Suitable buffers 112 and 114 are provided to hold the address control and data information and apply it in a timely manner to the remainder of the circuitry.
  • the interface would normally conform with the Institute of Electrical and Electronic Engineers, Standard Number 488 Interface requirements. However, other interface couplings may be employed, and in the current embodiment, a Commodore 64 personal computer was employed with a special interface.
  • the bus 116 couples the buffer 112 to the address decoding circuit 118.
  • the control circuit 120 appears at the output of the address decoder 118 and supplies signals on lead 122 to the remainder of the circuitry in a conventional manner.
  • Figure 6 shows a prototype, a circuit board by which the system of Figure 5 was actually implemented.
  • the main circuit board 132 is connected to the host computer 63 through the parallel bus 134 and the small connector circuit board 136 carrying the series of parallel connectors 138.
  • the very large memory is the V memory designated by the reference numeral 16 in Figure 5, wherein 256 incremen- tal values are provided for each point in the array.
  • the dash-dot lines 140 which extend across four rows of chips 142 are all part of the memory 16. They may be implemented by chips made by the Nippon Electric Co. and which are designated by the part numbers NEC D43256C(32Kx8) .
  • the F memory 44 which appears toward the top in Figure 5 is implemented by the chip 144 in Figure 6, with the G memory 48 and the H memory 52 being implemented by chips 146 and 148 in Figure 6.
  • These memories may be implemented by Part No. CYC7C122 from Cypress Semiconductor Co.
  • the balance of the circuit as shown in Figure 5 is implemented by the remaining chips which appear on the circuit board 132.
  • Figures 7, 8 and 9 w ⁇ hich go into some detail as to the nature of the information provided in the memories 44, 48, 52 and 16 in Figure 5, for the one particular example, which is discussed herein.
  • the block 162 represents the point i, j which is under consideration, and which is, of course, identified by the state of counters 40 and 42 in Figure 5.
  • Figure 7 we are assuming that the output direction from point 162 is due East, with it being assumed that North is toward the top of Figure 7.
  • 16 possible output directions are provided from point 162, and these are indicated in the diagram of Figure 8.
  • the relationship between a pre-determined point 182 and the adjacent points is developed, and the amount of fuel required to reach the next adjacent point is also indicated.
  • the number 250 appears adjacent the point 184 indicating that 250 gallons of fuel are required to travel the 12 mile segment from point 182 to point 184, in the absence of a headwind or a tailwind.
  • the other three 12-mile segments in the north, west, and south directions have a similar "cost" of 250 gallons of fuel required for the traverse.
  • the more remote points such as point 186 requires 559 gallons of fuel, as the distance would be the diagonal having one 12-mile side and one 24-mile side of the related triangle.
  • Figure 9 shows a typical turn path required when the point under consideration is point 192 also desig ⁇ nated as point "B", and the direction of departure from point "B" is due east.
  • Point A is the adjacent point having coordinates f, g, as compared with coordinates i, j for point B.
  • the point A is also designated by reference numeral 194.
  • the points A and B in Figure 9 correspond to the points 164 and 162, respectively, in Figure 7.
  • the curved portion of the aircraft path is an arc of a circle tangent to the lines BC and AC.
  • the center of the circle lies on the bisector of the angle ACB.
  • the length of line segment BC is 24 nautical miles, and the length of AC is 26.83 nautical miles.
  • this path uses 688 pounds of fuel, with the scaled value for the fuel being 138, which number is included in the V array 16 as the incremental value relating to these adjacent points and the turn as shown in Fig. 9.
  • ground speed (S) of an aircraft operating in a wind can be calculated by:
  • the curved path may be estimated by several straight sections. The fuel used is calculated for each section and the results summed.
  • a more accurate estimate can be calculated by using smaller steps.
  • Figure 10 is a flow diagram indicating the mode of operation of the circuit of Figure 5. More speciically, the conventional start ⁇ up steps are indicated by blocks 202, 204 and 206 which appear toward the top of the diagram. The next steps are generally conventional, and then the critical comparison step is indicated by blocks 208 and diamond 210. Diamond 210 indicates the decision step wherein it is determined if the value for accumulated cost stored in memory P is equal to or greater than that stored in the adjacent point as retrieved from memory P' plus the incremental value as stored in memory V. If the newly calculated value is less, then the ew value is written into both the P and P' memories as indicated by the block 212 and as indicated by the block 214, the update latch 96 (Fig.
  • block 224 indicates the determination of the path 5 through the points lying on the optimal path producing the minimum cost, between points S and E as shown in Figure 1 of the drawings. This is accomplished on a point-by-point basis using the final value, and determi ⁇ ning which previous point was employed to give the final 0 minimum cost value.

Abstract

A computing system for determining the optimum or shortest elapsed time, route between two widely spaced starting and completion points calculates the cumulative cost or elapsed time using a point-by-point calculation, and successively adds cost increments between a grid of points from the starting point to the completion point. Two memories (12, 14) are provided for storing the cumulative time or cost from the starting point to each point in the grid array. A large memory (16) is loaded with incremental cost data to each point (18) in the array from each adjacent point (20), with input and output vector and/or other information. The cumulative cost information from the starting point to all other points in the array are calculated successively, with the lowest cumulative cost to each point being retained, and this process is repeated until further repetitions produce no further changes at any point.

Description

'ARRAY PROCESSOR FOR OPTIMIZING STATE VARIABLES AND TRAVEL COSTS BETWEEN TWO TOPOGRAPHICAL POINTS"
FIELD OF THE INVENTION
This invention relates to a special data processing 5 system and method for solving complex problems.
BACKGROUND OF THE INVENTION
Certain types of mathematical problems, when considered from a "brute force" approach, appear to
]_Q require the determination of all possible permutations and combinations in order to obtain the optimal solu¬ tion. Further, when the problem involves a geometri¬ cally increasing number of calculations, and where the number" of required inputs becomes very large, the 5 necessary calculation may take an inordinate amount of time, using a general purpose computer.
In the present specification a special class of problem involving a large array of geographically or topologically spaced points, will be considered. By way
2o of specific example, a geographical area, such as a section of the United States may be divided into a grid with the intersection of the grid lines constituting key points on the map. Now, data may be available, in¬ volving the local wind velocity at each point and other 5 factors, which would provide the incremental time, or required incremental fuel, for a flight to each point on the grid, from each adjacent point, taking into conside¬ ration the direction of flight to and from each point, and the aircraft characteristics for which the calculat- 0 ions are being made. A predetermined starting point is then identified. The problem is then to minimize the time of the flight, or the fuel used, to all other possible destinations in the grid, and any factor of merit of this type will generically be referenced herein 5 as the "cost". Now, "the classical brute force approach to the problem would be to calculate the "cost" by considering all possible combinations and permutations of routes between the starting grid point and all other points, in terms of the incremental point-to-point costs. However, assuming, for example, a square grid of only 756 miles with 12 mile grid lines, we would have a 64 X 64 array, (with sixty three 12 mile increments) and detailed information relating to all 4,096 points, with respect to 16 adjacent points, with vector input and output information from the selected point and each of the adjacent 16 points. To go through all possible permuta¬ tions and combinations of the incremental cost values involving all 4,096 points and considering all routes between the starting and terminating points would, take an unreasonable long amount of computer time, for example, in the order of at least several days for a typical computer.
Accordingly, a principal object of the present invention is to solve problems of the type identified above in a simpler and more efficient way. The current embodiment typically solves a problem in four to six seconds.
SUMMARY OF THE INVENTION
In accordance with the present invention, a point- by-point dynamic programming system and method involves establishing memory identifications or locations corresponding to each point on the geographical or topological grid, as mentioned above, with the accumula¬ ted cost from the starting point to each point being stored in a corresponding location in the system memory. Initially, the cost value at the start point or points will be set to zero or the appropriate low value, and the accumulated cost value at all other points will be set to a maximum value. The next step involves the determination of the incremental value from the start point to the next adjacent points, and the substitution of the new, relatively low, accumulated cost value for the maximum value previously stored relative to each grid point. The system steps through the entire grid array several times, and the optimum minimum accumulated cost values quickly proprogate across the array, with the calculation being completed when a single complete pass results in no further changes in the accumulated cost at any point.
From an apparatus standpoint one specific optimiz¬ ing coprocessor includes:
(1) First and second storage units for storing accumulated "costs" for each point in a geographical or topological array or grid, as related to a predetermined starting point in the array:
(2) Control or addressing arrangements for addressing the first and second storage units concur¬ rently, or for addressing the second of said storage units independent of said first unit,
(3) A large scale memory for storing incremental cost information for all points in the array, and more specifically for storing incremental cost information for each selected point in the array from a plurality of adjacent points, and with separate incremental cost information taking other factors into consideration, such as different directions from the selected and adjacent points;
(4) Control arrangements for initially setting the accumulated cost figure relating to each point (or points) to a very high or maximum value, except for the starting point which is set to a very low cost value or to zero;
(5) Control arrangements for successively addresε- ing each point in the accumulated cost memory and calculating a new accumulated cost value for each selected point by adding the accumulated cost at each adjacent point with the incremental cost from adjacent points to the pre-selected point;
(6) Control circuitry for substituting the newly 5 calculated accumulated cost figure into the accumulated cost memory if it is lower than the figure previously stored therein;
(7) Circuit arrangements for determining when a successive repetition of the preceding steps results in
10 no changes in the accumulated cost memory, and then stopping the calculations.
In a preferred specific embodiment the cumulative cost memory may be made up of first and second substan¬ tially identical memories or sections of a larger 5 memory; both of which may at certain points in time contain the same accumulated cost information. The accumulated cost for the starting point, for example, is withdrawn from a first of these two accumulated cost memories, and the incremental cost to the next adjacent
20 point (including wind speed factors and the like) is added; and this new accumulated cost figure is compared with that previously stored in the second accumulated cost memory for the adjacent point, and if the newly calculated accumulated cost value is less, it is
«t- substituted into both memories as the new accumulated cost figure for that adjacent point.
Incidentally, the accumulated cost memories may, in practice hold a substantial number of values for each point, relating, for example, to different output
30 directions from that point.
It is also noted that certain prohibited geographi¬ cal or topographical areas may be indicated by maximum incremental cost figures, to preclude selection of a path through such prohibited areas.
35 It has been determined that it is useful to step across the array first in one direction and then in the opposite direction, in order to minimize the time for the calculation to be completed. Assuming a 64 by 64 point array, and 256 incremental values associated with each point, it usually takes less than a second for each pass through every point of the array, and the calculation is normally completed after three or four passes. When certain prohibited zones are included in the array, however, as mentioned above, as many as 10 or 12 passes may be required before the system reaches the minimum accumulated cost values for each point on the array.
Other objects, features, and advantages will become apparent from a consideration of the following detailed description, and from the accompanying drawings.
BRIEF DESCRIPTION OF DRAWINGS
Figure 1 is a diagram of a grid showing a geogra¬ phical or topological array of points, and an optimal path from a starting point to an end point;
Figures 2, 3 and 4 are schematic block diagrams of a system for implementing the principals of the present invention;
Figure 5 is block logic diagram showing one illustrative implementation of the present invention;
Figure 6 is a view of a printed circuit board showing a prototype embodiment of the present invention;
Figure 7 is a schematic diagram of possible flight paths to any point I, J, from previous adjacent points, F, G;
Figure 8 is a diagram which is useful in under¬ standing some of the calculations which may be employed in the implementation of the present invention;
Figure 9 is a diagram employed in calculating certain values used in the implementation of the present invention; and Figure 10 is a logic diagram indicating the mode of operation of the circuit of Fig. 5.
DETAILED DESCRIPTION Referring more particularly to the drawings, Figure 1 is a diagram of a geographical or a topological array in which a series of vertical or horizontal lines form a grid with a large number of intersecting points. In the particular example which will be dealt with in the present patent application, the array may be geographi¬ cal and include an area of 756 by 756 miles, with the grid lines being spaced apart by approximately 12 miles, and having 64 vertical and 64 horizontal lines. In Figure 1, a starting point for an airplane is indicated by the letter "S", and the landing point or end point is designated by the reference letter "E". To illustrate the type of problem with which we are concerned, a w nd, such as a jet stream, is indicated by a series of arrows, 12, with the intensity of the wind being indicated by the length or density of the arrows.
It is customary for aircraft pilots to depart from the most direct path between the starting point "S" and the ending point "E", to pick up favorable winds, in this case the jet stream, 12, to assist the aircraft in more rapid flight time and minimum fuel usage. However, up to the present time, many of such routes have not been optimal, but merely based on an estimate of the desired or preferred route. One of the objects of the present invention is to rapidly make a more accurate calculation of the optimal path, involving either minimum fuel consumption or minimum time in flying from point "S" to point "~". In order to accomplish the calculation, a "cost" is established, with the "cost" representing fuel, time, or any other desired merit parameter. As will be developed below, each grid point has associated with it an accumulated cost figure, from a starting point "S" to each grid point designated by the coordinates "i, j". The incremental "cost" from each grid point, to adjacent grid points is stored in memory; and, as mentioned above, the accumulated cost to each grid point is calculated by adding the incremental cost from adjacent grid points to the accumulated cost associated with each prior adjacent grid point. By initially setting the cost at each grid point to a maximum figure, and then by substituting any lower calculated cost value for these maximum values, after several passes through the grid array, the minimum cost and the corresponding minimum cost route from the point "S" to point "E" is determined.
The block circuit diagrams of Figures 2, 3 and 4 give an overall view of an illustrative system for implementing the present invention. More specifically, referring to Figure 2, two memories, 12 and 14, are provided which each include in storage, all of the accumulated cost figures for the entire array at each of points "i,j". A large memory, 16, is provided, which includes all of the incremental data involving the cost between each point i, j, and the adjacent points, f, g. Information included in the calculations for the entries in the incremental memory 16 would, for example, include wind speed information, which would make the incremental cost between east-west points on the jet stream signifi¬ cantly lower, in the west-to-east direction as shown in Figure 1, than in the east-to-weεt direction.
Nov.-, with further reference to Figure 1, the point i, j, under consideration will be designated by the reference numeral 18, with the previous adjacent point, f, g, being designated by the reference numeral 20. Of course, there is an incremental cost in reaching point 18 from point 20. With reference to Figure 2, the accumulated cost stored relative to the point i, j, or point 18 as shown in Figure 1, is accessed from the memory 12, and appears on bus 22. The accumulated cost for the point f, g, or point 20 as shown in Figure 1, is accessed from the memory 14, and the incremental cost to get from the prior point f, g to the point under consideration i, j, is accessed from the memory 16 as shown in Figure 2. The accumulated cost from the prior point is added to the incremental cost in the adder 24, and the resultant sum in compared in the comparator 26 with the previously stored accumulated cost value from store 12, in the comparator 26. If the newly calculated accumulated cost value P' plus V is less than the prior stored accumulated cost value from store 12, then the new lower accumulated cost figure is entered into both memories 12 and 14, in the address corresponding to point i,j. In addition, the "not done" latch 28 is set, so that another complete pass through all points in the array will be accomplished, to see if there are any further changes to establish the minimum values in the memories 12 and 14. The multi- plexer 30 permits the addressing of the store 14, also designated P' , either by the grid point location i, j. which is the current point under consideration, or by the identification of the location of the accumulated cost for the adjacent point f, g, used in the calculation noted herein above. Figure 3 shows the sequence controller including the clock gate 34, and the counters 36, 38, 40, and 42. With the counters I, J, being set to the initial grid point, the counters 36 and 38 are actuated to perform the calculation discussed hereinbelow in connection with Figure 2 for each of 16 output directions the point i, j, and from each of 16 adjacent previous points, f, g, making a total of 256 calculations, for each point, i, j . The details of this type of calculation and the subject matter which is involved will be discussed in greater detail hereinbelow. Figure 4 shows in broad terms the nature of the index generators. Specifically, with a predetermined value of the direction and the turn inputs, in combina¬ tion with the "i" value of the point under considerati- on, the index generator, 44, 46 provides an output signal indicating one coordinate "f" of the prior adjacent point. Similarly, with respect to the second coordinate, the logic circuits 48 and 50 provide the identification of the other coordinate "g" of the immediately adjacent point from the point under conside¬ ration "j". From a more practical consideration, with reference to Figure 1, the number at the output of the block 44 would be minus 1, giving an " 1" value which is one less than the corresponding "i" value for the point 18. Logic circuit 52 provides the turn model H, which is derived from the directional and the turn input signals to the block 52, all as discussed in greater detail hereinbelow.
The larger block circuit diagram of Figure 5 shows in somewhat greater detail the implementation of the dynamic point-to-point calculation system illustrating the present invention. In Figure 5, a host computer 63 is indicated schematically at the far left of the diagram and the large scale memory 16 containing the incremental data, is shown toward the center at the bottom of the diagram. The memories 14 and 12, which are essentially duplicate memories containing the accumulated cost information for each point in the grid, appear directly above the incremental information memory 16-
We will now consider the mode of operation of the overall circuit of Figure 5, and show how it corresponds to the simpler circuit diagram of Figures 2, 3 and 4. First, it will be assumed that the up-down counters for the " x" and the "j" coordinates are set to zero, and that the counter 62 has cycled to its first state. Starting at the top central portion of the diagram, with the signals from the IDIR and the ITRN counters being applied to the circuit 44, and the "i" coordinate for the selected point under consideration being applied to the lower input 61 to the adder 46, the appropriate coordinate "£" for the adjacent point under considerat¬ ion will appear at the output bus 64 from the circuit 46. Similarly, the appropriate adjacent point coordin¬ ate "g" will appear on the output bus 66 on the adder 50. The appropriate indication for the turn parameter H will also appear at the output bus 68 from circuit 52. As mentioned above, the input IDIR indicates the output direction from the selected point i, j and can take any of 16 values. With the coordinates g, f and h being applied through the address selector or multiplexer 30 to the memory 14, the output on bus 72 to the adder 24 will be the total cost figure for the prior adjacent point f, g. To this value is added the incremental data between the point under consideration (i, j) and the prior adjacent point (f, g) which appears on bus 74. The sum of these two quantities appears on bus 76 at the input to the comparator 26 where it is compared with the existing accumulated cost value from memory 12, which appears on bus 22. It is noted in passing that the values for the accumulated cost throughout the array is initially set to a maximum value in the storage units 12 and 14, so that at least initially, the newly calcula¬ ted values appearing on bus 76 are likely to be less than the previous values appearing on bus 22. In the event that the new value is less than the old value indicated by Q (P + V) being less than P, as shown in Figure 5, the update control circuit 78 will be actuated so that the latch circuit 80 will hold the new accumula¬ ted cost value. This new accumulated cost value is then fed back through the buffers 82 and 84 to the memories 12 and 14, respectively, to be substituted for the prior larger values.
For each point selected by the I and J counters 40, 42, the counter 62 checks for each of 16 output direc- tions from the point i, j and also checks for each of 16 adjacent points from which aircraft might logically come, by stepping through the counting cycle of counter 62.
Incidentally, in addition to the control bus, 106, the host computer 63 is coupled to the system by the additional address bus 108 and the data bus 110. Suitable buffers 112 and 114 are provided to hold the address control and data information and apply it in a timely manner to the remainder of the circuitry. Incidentally, it is contemplated that the interface would normally conform with the Institute of Electrical and Electronic Engineers, Standard Number 488 Interface requirements. However, other interface couplings may be employed, and in the current embodiment, a Commodore 64 personal computer was employed with a special interface. The bus 116 couples the buffer 112 to the address decoding circuit 118. The control circuit 120 appears at the output of the address decoder 118 and supplies signals on lead 122 to the remainder of the circuitry in a conventional manner. Similarly, the additional outputs 124 and 126 provide control signals to the balance of the circuitry as shown in the remainder of Figure 5, and in accordance with techniques which are well known, per se, to those skilled in the art. Figure 6 shows a prototype, a circuit board by which the system of Figure 5 was actually implemented. In Figure 6, the main circuit board 132 is connected to the host computer 63 through the parallel bus 134 and the small connector circuit board 136 carrying the series of parallel connectors 138. With regard to the chips which appear on the principal circuit board 132, as mentioned above, the very large memory is the V memory designated by the reference numeral 16 in Figure 5, wherein 256 incremen- tal values are provided for each point in the array. On Figure 6, the dash-dot lines 140 which extend across four rows of chips 142 are all part of the memory 16. They may be implemented by chips made by the Nippon Electric Co. and which are designated by the part numbers NEC D43256C(32Kx8) . The F memory 44 which appears toward the top in Figure 5 is implemented by the chip 144 in Figure 6, with the G memory 48 and the H memory 52 being implemented by chips 146 and 148 in Figure 6. These memories may be implemented by Part No. CYC7C122 from Cypress Semiconductor Co. The 8 chips near the edge of the board between the lines joined by the arrow 150, together form the P memory 12 and the P' memory 14, and may be implemented by the same NEC chips identified above for the V memory 16. The balance of the circuit as shown in Figure 5 is implemented by the remaining chips which appear on the circuit board 132.
Attention will now be directed to Figures 7, 8 and 9 wτhich go into some detail as to the nature of the information provided in the memories 44, 48, 52 and 16 in Figure 5, for the one particular example, which is discussed herein. First, considering Figure 7, the block 162 represents the point i, j which is under consideration, and which is, of course, identified by the state of counters 40 and 42 in Figure 5. Now, in Figure 7, we are assuming that the output direction from point 162 is due East, with it being assumed that North is toward the top of Figure 7. Incidentally, as will be developed in connection wit Figure 8, 16 possible output directions are provided from point 162, and these are indicated in the diagram of Figure 8. Returning to Figure 7, with the aircraft leaving point i, j, also designated by the reference numeral 162, to the east, there are various possible adjacent points, which will be designated by the coordinates f, g. These possible input points are indicated by the numbers 1 through 15, which are set forth in Figure 7. For the moment we will consider the 14th possibility,, which is point 164, also designated by the coordinates f, g. Referring back to Figure 5, the input 166 to memory 44 indicates the output direction from point i, j, the selected point under consideration, and the input 168 indicates the nature of the turn model which must be executed, and therefore the two numbers (from 1 to 16, or 0 to 15) together identify the relationship between the adjacent point f, g, and point i, j. Thus, the output from the memory 44 on bus 170 would be minus one, so that the coordinate "1" , which appears on bus 64 will be one less than the coordinate "i".
Similarly, considering memory 48, and the informa¬ tion supplied on input bus 172 and 174, the output on bus 176 will be minus 2, so that the coordinate value for "q" will be two less than the coordinate value for "j", thus identifying the point 164 in Figure 7 and its relationship to the point 162.
Now, with reference to Figure 8, the relationship between a pre-determined point 182 and the adjacent points is developed, and the amount of fuel required to reach the next adjacent point is also indicated. Thus, for example, the number 250 appears adjacent the point 184 indicating that 250 gallons of fuel are required to travel the 12 mile segment from point 182 to point 184, in the absence of a headwind or a tailwind. Similarly, the other three 12-mile segments in the north, west, and south directions have a similar "cost" of 250 gallons of fuel required for the traverse. However, the more remote points such as point 186 requires 559 gallons of fuel, as the distance would be the diagonal having one 12-mile side and one 24-mile side of the related triangle. Incidentally, as noted above, all of the figures set forth in Figure 8 are without a headwind or a tailwind, and these figures would of course be modified in the event that a headwind or tailwind were present. Also, as mentioned hereinabove, it is contemp¬ lated that headwind and tailwind information will be set into the data supplied to the memory 16 involving the incremental cost values, in order to properly determine the optimum flight path.
Figure 9 shows a typical turn path required when the point under consideration is point 192 also desig¬ nated as point "B", and the direction of departure from point "B" is due east. Point A is the adjacent point having coordinates f, g, as compared with coordinates i, j for point B. The point A is also designated by reference numeral 194. The points A and B in Figure 9 correspond to the points 164 and 162, respectively, in Figure 7.
In connection with the examples of Figures 8 and 9, the assumptions for this example are an aircraft flying at 480 knots, true airspeed, with a fuel flow of 10,000 pounds per hour. With no wind, the aircraft uses 10,000 divided by 480, or 20.833 pounds of fuel per nautical mile. Based on these assumptions and a grid spacing of 12 nautical miles, the no-wind fuel consumption between grid points spaced twelve miles apart is 250 pound of fuel. The diagram of Figure 8 shows the fuel consumpt¬ ion in the 16 directions of interest.
In the actual implementation of the computer hardware it was convenient to use a scaled value for the fuel, and a scale factor used in the present example was 5. The scaled values of the fuel used is shown in parenthesis in the diagram of Figure 8. With reference to Figure 9, to calculate the fuel used in a turning path, it is necessary to calculate the distance travelled. For the purposes of this calculat¬ ion, it will be assumed that the aircraft is leaving point A in the indicated direction shown in Figure 9 and performs a minimum distance constant bank angle turn to leave point B in the indicated direction traveling due east.
The curved portion of the aircraft path is an arc of a circle tangent to the lines BC and AC. The center of the circle lies on the bisector of the angle ACB. From the geometry of the diagram, the length of line segment BC is 24 nautical miles, and the length of AC is 26.83 nautical miles. Completing the necessary calcula- tion, it may be determined that the distance from A to B along the indicated circular route and including the short straight section designated "X" in Figure 9 is 33.01 nautical miles. Accordingly, this path uses 688 pounds of fuel, with the scaled value for the fuel being 138, which number is included in the V array 16 as the incremental value relating to these adjacent points and the turn as shown in Fig. 9.
For a straight line path, the ground speed (S) of an aircraft operating in a wind can be calculated by:
2W COS(D-H+180) (2W COS (D-H+180) ) 2 - 4 (W2 - V2) S 2
Where W is wind speed
D is wind direction V is aircraft true airspeed H is aircraft ground track heading
Using the above formula, 480 knots true airspeed, 120 knots wind speed and a wind direction of 270 degrees (from the west) , the following chart is generated for the sixteen directions of interest. DIRECTION H S 480/S NO-WIND FUEL SCALED WITH FUEL WIND
0 (East) 90.00 600 0.80 250 200 40
1 63.43 584 0.82 559 459 92
2 45.00 557 0.86 354 305 61
3 26.57 522 0.92 559 514 103
4 (North) 0.00 465 1.03 250 258 52
5 333.43 414 1.16 559 648 130
6 315.00 388 1.24 354 438 88
7 296.57 370 1.30 559 725 145
8 (West) 270.00 360 1.33 250 333 67
9 243.43 370 1.30 559 725 145
10 225.00 388 1.24 354 438 88
11 206.57 414 1.16 559 648 130
12 (South) 180.00 465 1.03 250 258 52
13 153.43 522 0.92 559 514 103
14 135.00 557 0.86 354 305 61
15 116.57 584 0.82 559 459 92
To estimate the fuel used for a curved path with wind, the curved path may be estimated by several straight sections. The fuel used is calculated for each section and the results summed.
NOTE: For ease of calculation, the no-wind constant-bank-angle ground path is followed. This is NOT a constant-bank-angle turn in the presence of wind.
As an example, here are representative calculations for the curved path previously shown. The path is broken into eleven segments: the straight segment 'X and ten equal length (3.018 Nautical Mile) segments along the curve. 'H' is calculated at the segment midpoint. SEGMENT H S LENGTH FUEL USED SCALED X 333.43 414 2.830 68.36 1 339.26 424 3.018 71.18
2 350.92 446 3.018 67.67
3 2.57 470 3.018 64.21
4 14.23 495 3.018 60.97
5 25.89 520 3.018 58.04
6 37.55 544 3.018 55.48
7 49.20 564 3.018 53.51
8 60.86 581 3.018 51.94
9 72.51 593 3.018 50.89
10 84.17 599 3.018 50.38
TOTAL 652.64 131
A more accurate estimate can be calculated by using smaller steps.
Turning now to Figure 10, Figure 10 is a flow diagram indicating the mode of operation of the circuit of Figure 5. More speci ically, the conventional start¬ up steps are indicated by blocks 202, 204 and 206 which appear toward the top of the diagram. The next steps are generally conventional, and then the critical comparison step is indicated by blocks 208 and diamond 210. Diamond 210 indicates the decision step wherein it is determined if the value for accumulated cost stored in memory P is equal to or greater than that stored in the adjacent point as retrieved from memory P' plus the incremental value as stored in memory V. If the newly calculated value is less, then the ew value is written into both the P and P' memories as indicated by the block 212 and as indicated by the block 214, the update latch 96 (Fig. 5) is triggered, indicating that another complete cycle is to be made. Once each cycle is completed, we proceed to the decision diamond 216 wherein the state of the update latch 96 is determined. o If no pulse has been applied to the update latch 96, indicating that the "not-done" flag was not set, then a system proceeds to the blocks 218, 220, 222 and 224, finally terminating at the symbol 226. Incidentally, block 224 indicates the determination of the path 5 through the points lying on the optimal path producing the minimum cost, between points S and E as shown in Figure 1 of the drawings. This is accomplished on a point-by-point basis using the final value, and determi¬ ning which previous point was employed to give the final 0 minimum cost value.
In the event of a "yes" answer from the decision diamond 216, this is an indication that one specific cycle of updating all points in the array is completed, but at least one more cycle will be needed; and the 5 block 228 indicates the resetting or clearing of the "not-done" latch 96 as shown in Figure 5 in preparing for the next cycle. In addition, for more rapid completion of the entire calculation, the direction of the counters 40, 42, and 62 is reversed, as indicated by the block 230. Following this step, the cycle is repeated, as indicated by the recirculation line 232.
It is noted in passing that, instead of initially inserting a maximum binary figure such as "11111111" as the accumulated cost figure for each point except the start point S, a minimum binary figure such as "000000- 00" could be used, with the complements of the normal binary numbers being used as incremental values. Using this type of arrangement, the lowest cost path would be that having the highest binary number. Similarly, for certain problems, it might be desirable to calculate maximum accumulated values, such as maximum profits, by the technique of the present invention. Accordingly, it is to be understood that the claims referencing "minimum costs" encompass alternatives such as those contemplated hereinabove in this paragraph.
In conclusion, it is to be understood that the foregoing detailed description and the accompanying drawings illustrate one preferred embodiment of the invention. It is to be understood that the present system is applicable to other types of topological problems differing from a geographical problem described herein, and to problems having additional dimensions. Further, threat analysis may be included with high "cost" figures associated with dangerous conditions. Also, in some cases the figure of merit may involve a maximum value, such as profit, and it is understood that the present system is fully applicable to such problems with a mere mathematical inversion being involved. In addition, instead of the specific logic circuits and memory arrangements as shown herein, other comparable computer components may be employed. Accordingly, the present invention is not limited to the particular system as shown in the drawings, and as described in detail hereinabove.

Claims

What is claimed is:
1. An optimizing coprocessor system comprising: means for establishing mathematical coordinates identifying a geographical or topological array of points ; first and second memory means for storing total cost values for each point in the array as related to a predetermined starting point in the array in each of said first and second memory means; means for addressing said second cost memory means either concurrently with said first memory with a first address input to said second memory, or independently of the addressing of said first accumulated cost memory, via a second address input; large scale memory means for storing incremental cost information for all points in the array and more specifically for each selected point in said array from a plurality of adjacent points, and for a plurality of output directions from the selected points; means for initially setting said accumulated cost memories to a maximum value for each point; means for setting the accumulated cost for at least one starting point in said array to zero in said accumulated cost memories; means for addressing all other points in said array and determining the accumulated cost from said starting point to each of the other selected points by summing the accumulated cost at adjacent points with the incremental cost from the adjacent points to the selected point, and comparing the resultant sum with the accumulated cost previously stored relative to the selected point under consideration, and substituting the newly calculated cost when it is less than the previou- sly accumulated stored cost at the selected point; and repeating the foregoing process point-by-point throughout the array until successive repetitions produce no change in minimum accumulated cost values for any point throughout the array.
2. An optimizing coprocessor system as defined in claim 1 including counter means for successively addressing selected points throughout the array.
3. An optimizing coprocessor system as defined in claim 1 including means for sequentially determining the addresses of adjacent points relative to a selected point, said means including additional memory means for storing differential coordinate information, and means for combining such differential coordinate information with the coordinates of the selected point under consideration, to obtain the coordinates of the successive adjacent points.
4- An optimizing coprocessor system as defined in claim 1, wherein said means for addressing all points in the array is changed in successive cycles to address the selected points in accordance with one pattern in one cycle and in accordance with another pattern in the next successive cycle.
5. An optimizing coprocessor system as defined in claim 4 wherein said addressing means includes at least one reversible counter, and where means are provided for reversing the counting direction of said counter during successive cycles.
6. An optimizing coprocessor system as defined in claim 1 wherein said system includes a bistable circuit or latch means for indicating that at least one change in an accumulated cost value has occurred during a cycle of operation, and means for repeating the cycle if such a change has occurred.
7. An optimizing coprocessor system as defined in claim 1 wherein said system includes means for synchron¬ izing the provision of adajacent point coordinate information and direction information in the calculation of incremental costs.
8. An optimizing coprocessor system comprising: means for establishing mathematical coordinates identifying a geographical or topological array of points; memory means for storing accumulated cost values for each point in the array as related to a predetermi¬ ned starting point in the array; large scale memory means for storing incremental cost information for all points in the array and more specifically for each selected point in said array from a plurality of adjacent points; means for initially setting said accumulated cost memory to a maximum value for each point; means for setting the accumulated cost for at least one starting point in said array to zero in said accumulated cost memories; means for addressing all other points in said array and determining the accumulated cost from said starting point to each of the other selected points by summing the accumulated cost at adjacent points with the incremental cost from the adjacent points to the selected point, and comparing the resultant sum with the accumulated cost previously stored relative to the selected point under consideration, and substituting the newly calculated cost when it is less than the stored cost at the selected point; and repeating the foregoing process point-by-point throughout the array until successive repetitions produce no change in minimum total cost values for any point throughout the array.
9. An optimizing coprocessor system as defined in 5 claim 8 including counter means for successively addressing selected points throughout the array.
10. An optimizing coprocessor system as defined in claim 8 including means for sequentially determining the 0 addresses of adjacent points relative to a selected point, said means including additional memory means for storing differential coordinate information, and means for combining such differential coordinate information with the coordinates of the selected point under 5 consideration, to obtain the coordinates of the success¬ ive adjacent points.
11. An optimizing coprocessor system as defined in claim 8 wherein said means for addressing all points
20 in the array is changed in successive cycles to address the selected points in accordance with one pattern in one cycle and in accordance with another pattern in the next successive cycle.
t-
12. An optimizing coprocessor system as defined in claim 11 wherein said addressing means includes at least one reversible counter, and where means are provided for reversing the counting direction of said counter during successive cycles.
30
13. An optimizing coprocessor system as defined in claim 8 wherein said system includes a bistable circuit or latch means for indicating that at least one change in an accumulated cost value has occurred during
35 a cycle of operation, and means for repeating the cycle if such a change has occurred.
14. An optimizing coprocessor system as defined in claim 8 including means for providing a plurality of incremental costs for each adjacent point, with the plurality of costs involving alternative cost calculati¬ ons.
15. An optimizing coprocessor method comprising the steps of: establishing mathematical coordinates identifying a geographical or topological array of points; storing accumulated cost values for each point in the array relative to a predetermined starting point; initially setting the accumulated cost values for each point except said pre-selected starting point to a maximum value; storing incremental cost information for each point in the array from a plurality of adjacent points; setting the accumulated cost for said starting point to zero or to a low value; addressing the accumulated cost values for all other points in the array and determining the accumula¬ ted cost by summing the accumulated cost at adjacent points with the incremental cost from each adjacent point to the selected addressed point; comparing the resultant sum with the accumulated cost previously stored relative to the selected point, and substituting the newly calculated accumulated cost when it is less than the previously stored accumulated cost figure relative to the selected point; and repeating the foregoing process point-by-point throughout the array until successive repetitions produce no change in the minimum accumulated cost value for any point throughout the array.
16. A method as defined in claim 15 wherein the accumulated cost information for each point in the array is stored in two memory locations, and wherein the cost information for the selected and adjacent points are
5 addressed concurrently.
17. A method as defined in claim 15 including the step of addressing the points in said array in a different sequence in successive cycles of operation in
X0 the course of the calculation.
18. A method as defined in claim 15 including the step of storing incremental information relative to a plurality of output directions from each selected point,
15 and for calculating accumulatetd cost values using each of the stored incremental values.
19. A method as defined in claim 15 including the step of setting a flag or a bistable circuit when any
20 change is made in any stored accumulated cost value, and for proceeding through an additional cycle of calculat¬ ion whenever such a change was made in the preceding cycle.
5 20. A method as defined in claim 1 including calculating the coordinates of adjacent points from an identification of the coordinates of the selected point and from the output direction from the selected point, and from the selected turn model.
30
35
PCT/US1988/000203 1987-01-29 1988-01-28 Array processor for optimizing state variables and travel costs between two topographical points WO1988005947A1 (en)

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US008,231 1987-01-29

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