WO1992013395A1 - Receiver controller method and apparatus - Google Patents

Receiver controller method and apparatus Download PDF

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Publication number
WO1992013395A1
WO1992013395A1 PCT/US1992/000595 US9200595W WO9213395A1 WO 1992013395 A1 WO1992013395 A1 WO 1992013395A1 US 9200595 W US9200595 W US 9200595W WO 9213395 A1 WO9213395 A1 WO 9213395A1
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WO
WIPO (PCT)
Prior art keywords
time
time period
receiver
data
parameter
Prior art date
Application number
PCT/US1992/000595
Other languages
French (fr)
Inventor
Thomas R. Klaus
Original Assignee
Motorola, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola, Inc. filed Critical Motorola, Inc.
Publication of WO1992013395A1 publication Critical patent/WO1992013395A1/en
Priority to GB9222171A priority Critical patent/GB2261140B/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
    • H04W88/02—Terminal devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40006—Architecture of a communication node
    • H04L12/40013—Details regarding a bus controller
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H04B1/1607—Supply circuits
    • H04B1/1615—Switching on; Switching off, e.g. remotely
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40071—Packet processing; Packet format
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/4013—Management of data rate on the bus
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/22—Parsing or analysis of headers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/02—Power saving arrangements
    • H04W52/0209—Power saving arrangements in terminal devices
    • H04W52/0225—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal
    • H04W52/0245—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal according to signal strength
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • This invention generally relates to controlling the on-time of a receiver and more specifically to adaptively controlling the on-time of a radio receiver to minimize its power consumption.
  • radio frequency signal receivers control their power consumption in a radiotelephone.
  • the first way is to turn the receiver on with the radiotelephone and leave it on during the entire operation.
  • the second way is to activate the receiver in anticipation of receiving radio frequency signals of interest in an effort to reduce the amount of power consumption.
  • the receiver When a receiver is used in a system where radio frequency signals are transmitted at known intervals, such as in a time division multiplexed system, the receiver can know the point in time when the receiver should be active. If the receiver is synched with the remote transmitter, the radio receiver can be turned on in anticipation of a data signal from the transmitter and turned off after receiving the data signal from the remote transmitter. Currently, this anticipation is used in some radiotelephones, such as model #TZ803 available from Motorola, Inc..
  • a microprocessor external to the receiver is used to control the on-time for the receiver. The on-time must account for rise times of the components and the lock time for the frequency synthesizer. The on-time is calculated using the worst case timing analysis for the different parts of the receiver circuitry which compensates for changes in the frequency, the temperature and the component specifications.
  • a radio frequency signal containing a data frame which needs to be received can last 40 milliseconds (mS) and typically a radiotelephone would receive one of every eight frames. Therefore, the receiver including the frequency synthesizer needs to be operational for forty milliseconds, then can be off for 280 mS.
  • the worse case lock time of the frequency synthesizer is 100 milliseconds over temperature, frequency and component tolerance. To account for the worst case timing, the frequency synthesizer is turned on 100 mS earlier than the anticipated arrival of the radio frequency signal of interest. Therefore, the frequency synthesizer is on for approximately 44% of the time.
  • the worst case rise time of the other receiver circuitry is 20 milliseconds, therefore, this receiver circuitry is on approximately 18% of the time.
  • the worst case times which are used to calculate these turn-on times are uncommon, therefore, the frequency synthesizer and the receiver circuitry are often on for longer periods of time than is necessary.
  • the worst case times are uncommon because they account for the theoretical extremes of operation.
  • the lock-times and rise times change with the changes in temperature and the frequency of the frequency synthesizer; rarely meeting the worst case times. Therefore, a need exists for an adaptive controller of the radio receiver on-time which compensates for the frequency of the receive signals, the current temperature of the radiotelephone and for the component variations of the specific receiver.
  • the present invention encompasses a method of controlling a receiver's on-time.
  • the receiver includes a data detector and a frequency synthesizer and receives radio frequency signals containing data having a first predetermined duration at an interval having a second predetermined time period.
  • the receiver's on-time is varied until the data detector is on the verge of failing to detect all of the data.
  • FIG. 1 is a block diagram of a data communications system which may employ the present invention.
  • FIG. 2 is a detailed view of the receiver depicted in FIG. 1.
  • FIG. 3 is a timing diagram of the transmission of the incoming radio frequency signals and the relationship to the turn-on time of a radio receiver which may employ the present invention.
  • FIG. 4 is a process flow chart of a method which may employ the present invention. Description of a Preferred Embodiment
  • FIG. 1 depicts a radio frequency transmission system which includes a fixed transmitter site 123 and a portable or mobile radiotelephone 105.
  • the fixed transmitter site 123 contains an antenna 103 and a radio frequency transmitter 101.
  • the portable or mobile radiotelephone 105 includes an antenna 107 for coupling the radio frequency signals sent from the fixed transmitter site 123, a receiver 109 for receiving and detecting data in the receive radio frequency signals, a microprocessor 111 which receives the detected data via the data bus 115 and transmits control signals via control lines 117 to the receiver 109.
  • the control signals 117 control the on-time of the individual parts of the receiver 109.
  • the microprocessor 111 also has external memory 113.
  • the memory 113 is used for storage of computer data and programs which may employ the current invention.
  • the memory 113 is coupled to the microprocessor 111 via an address bus 119 and a data bus 121.
  • FIG. 2 reveals a detailed view of the receiver 109 depicted in FIG. 1.
  • a frequency synthesizer 203 Upon reception of radio frequency signals via the antenna 107, a mixer 201 combines the incoming signals with the frequency generated from the frequency synthesizer 203.
  • the data detector 205 transposes the output signal of the mixer 201 into a data form recognizable by the microprocessor 111.
  • the radio transmitter 101 transmits radio frequency signals at predetermined intervals to the receiver 109 for predetermined lengths of time, therefore, the receiver 109 does not need power 100% of the time.
  • the control signals 117 turn on and off the frequency synthesizer 203, the mixer 201 and the data detector 205 contained within the receiver 109.
  • FIG. 3 is a timing diagram of the transmission of the incoming radio frequency signals from the transmitter 101 which are received by the antenna 107 and the signal's relationship to the turn-on time of the frequency synthesizer 203, the data detector 205 and the mixer 201.
  • the first waveform 309 depicts the transmission of the radio frequency signals of interest from the transmitter 101.
  • the parameter "T” 301 is the time interval between transmissions of radio frequency signals, in the present embodiment the time is 280 mS.
  • Parameter "T1" 305 is the length in time of an individual transmission of radio frequency signals of interest from the transmitter 101 , which in the present embodiment can be 40 mS.
  • the second waveform 311 is a control signal created by the microprocessor 111 which turns the frequency synthesizer 203 on and off.
  • Parameter "TO” 303 is the minimized warm-up time necessary for the frequency synthesizer to lock on to the desired frequency as determined by the method disclosed in FIG. 4.
  • "T1 " + “TO” is the receiver on-time.
  • the third waveform 313 is a control signal created by the microprocessor 111 which switches the data detector 205 and the mixer 201 on and off.
  • Parameter "T2" is the fixed amount of time after turning on the frequency synthesizer 203 that the data detector 205 and the mixer 201 are turned on.
  • Parameter “T3” is the warm-up time necessary for the data detector 205 and the mixer 201 to ensure that all of circuitry contained within the data detector 205 and the mixer 201 has warmed-up prior to receiving the output signal from the antenna 107.
  • the method depicted in FIG. 4 in flow chart form is an adaptive loop which controls the on-time of components of the receiver 109, such as the frequency synthesizer 203, the data detector 205 and the mixer 201.
  • the method compensates for the frequency, the temperature at which the radio is operating and the component variation in the radio by starting the method in response to a change in the temperature of the receiver 109 or a change in the frequency of the frequency synthesizer 203.
  • the method starts the on-time of the receiver 109, "TO” + “T1", at the predetermined worst case time, in this embodiment 142 mS, and reduces the on-time by a predetermined increment, "T3" set at 5 mS for this embodiment, until it is on the verge of not detecting all of the data.
  • Equally efficient methods may be developed, for example, by starting at a predetermined minimum value and working out until the data detection is successful.
  • the method begins at 401 triggered by a measurable change in the temperature or a change in the frequency of the frequency synthesizer 203.
  • the warm-up time parameter "TO" 307 is set to the predetermined worst case value, 142 mS.
  • the receiver 109 is turned off at the end of "T1 " 305.
  • the method waits an amount of time equal to "T” 301 less the current setting for "TO" 303 and "T1 " 305.
  • the receiver 109 is turned on.
  • the data detector 205 attempts to detect the data from the incoming radio frequency signals 309.
  • the method decides if the data detection was successful or not successful by verifying the accuracy of the data detected.
  • the warm-up time parameter, "TO" 307 is reduced by a predetermined increment "T3" and the method is repeated starting at 405. These steps are repeated until data detection is not successful. If the data detection is not successful, the warm-up parameter is increased by the predetermined increment "T3", returning the warm-up time "T1 " 307 to the duration of the previous successful data detection. The method ends at 419. The minimized warm-up time is now at the lower limit of successfully detecting data.
  • the accuracy of the method may be improved by reducing the magnitude of the predetermined increment "T3", however, this will increase the number of iterations necessary to achieve the minimized limit, in the present invention, this method was implemented for the turn-on time of the frequency synthesizer 203.
  • the data detector 205 and the mixer 201 are turned-on a fixed time, "T2", from the turn-on time of the frequency synthesizer 203, but upon apprehending the present invention, a designer may implement this method individually for the frequency synthesizer 203, the data detector 205, the mixer 201 and any other circuitry for which it may be deemed necessary, thus, increasing the accuracy of the turn-on times and increasing the microprocessor time necessary for the implementation of the method.

Abstract

A method of controlling a receiver's on-time (313). The radio receiver (109) receives radio frequency signals (309) of a predetermined duration (305) at an interval having a predetermined time period (301). The method varies the receiver's on-time (415, 417) until the data detector (205) is on the verge of failing to detect all of the data.

Description

Receiver Controller Method and Apparatus
Field of the Invention
This invention generally relates to controlling the on-time of a receiver and more specifically to adaptively controlling the on-time of a radio receiver to minimize its power consumption.
Background of the Invention
Generally, there are two ways in which radio frequency signal receivers control their power consumption in a radiotelephone. The first way is to turn the receiver on with the radiotelephone and leave it on during the entire operation. The second way is to activate the receiver in anticipation of receiving radio frequency signals of interest in an effort to reduce the amount of power consumption.
When a receiver is used in a system where radio frequency signals are transmitted at known intervals, such as in a time division multiplexed system, the receiver can know the point in time when the receiver should be active. If the receiver is synched with the remote transmitter, the radio receiver can be turned on in anticipation of a data signal from the transmitter and turned off after receiving the data signal from the remote transmitter. Currently, this anticipation is used in some radiotelephones, such as model #TZ803 available from Motorola, Inc.. A microprocessor external to the receiver is used to control the on-time for the receiver. The on-time must account for rise times of the components and the lock time for the frequency synthesizer. The on-time is calculated using the worst case timing analysis for the different parts of the receiver circuitry which compensates for changes in the frequency, the temperature and the component specifications.
For example, in the TZ803, a radio frequency signal containing a data frame which needs to be received can last 40 milliseconds (mS) and typically a radiotelephone would receive one of every eight frames. Therefore, the receiver including the frequency synthesizer needs to be operational for forty milliseconds, then can be off for 280 mS. The worse case lock time of the frequency synthesizer is 100 milliseconds over temperature, frequency and component tolerance. To account for the worst case timing, the frequency synthesizer is turned on 100 mS earlier than the anticipated arrival of the radio frequency signal of interest. Therefore, the frequency synthesizer is on for approximately 44% of the time. Similarly, the worst case rise time of the other receiver circuitry is 20 milliseconds, therefore, this receiver circuitry is on approximately 18% of the time. This is a savings over other radio systems in which the receiver circuitry and the frequency synthesizer are on 100% of the time, however, the worst case times which are used to calculate these turn-on times are uncommon, therefore, the frequency synthesizer and the receiver circuitry are often on for longer periods of time than is necessary. The worst case times are uncommon because they account for the theoretical extremes of operation. During a majority of the operation of the radiotelephone, the lock-times and rise times change with the changes in temperature and the frequency of the frequency synthesizer; rarely meeting the worst case times. Therefore, a need exists for an adaptive controller of the radio receiver on-time which compensates for the frequency of the receive signals, the current temperature of the radiotelephone and for the component variations of the specific receiver.
Summary of the Invention
The present invention encompasses a method of controlling a receiver's on-time. The receiver includes a data detector and a frequency synthesizer and receives radio frequency signals containing data having a first predetermined duration at an interval having a second predetermined time period. The receiver's on-time is varied until the data detector is on the verge of failing to detect all of the data.
Brief Description of the Drawings
FIG. 1 is a block diagram of a data communications system which may employ the present invention.
FIG. 2 is a detailed view of the receiver depicted in FIG. 1.
FIG. 3 is a timing diagram of the transmission of the incoming radio frequency signals and the relationship to the turn-on time of a radio receiver which may employ the present invention. FIG. 4 is a process flow chart of a method which may employ the present invention. Description of a Preferred Embodiment
FIG. 1 depicts a radio frequency transmission system which includes a fixed transmitter site 123 and a portable or mobile radiotelephone 105. The fixed transmitter site 123 contains an antenna 103 and a radio frequency transmitter 101. The portable or mobile radiotelephone 105 includes an antenna 107 for coupling the radio frequency signals sent from the fixed transmitter site 123, a receiver 109 for receiving and detecting data in the receive radio frequency signals, a microprocessor 111 which receives the detected data via the data bus 115 and transmits control signals via control lines 117 to the receiver 109. The control signals 117 control the on-time of the individual parts of the receiver 109. The microprocessor 111 also has external memory 113. The memory 113 is used for storage of computer data and programs which may employ the current invention. The memory 113 is coupled to the microprocessor 111 via an address bus 119 and a data bus 121.
FIG. 2 reveals a detailed view of the receiver 109 depicted in FIG. 1. inside the receiver 109, there is a frequency synthesizer 203 and a data detector 205. Upon reception of radio frequency signals via the antenna 107, a mixer 201 combines the incoming signals with the frequency generated from the frequency synthesizer 203. The data detector 205 transposes the output signal of the mixer 201 into a data form recognizable by the microprocessor 111. The radio transmitter 101 transmits radio frequency signals at predetermined intervals to the receiver 109 for predetermined lengths of time, therefore, the receiver 109 does not need power 100% of the time. In an effort to reduce the power consumption of the radiotelephone, the control signals 117 turn on and off the frequency synthesizer 203, the mixer 201 and the data detector 205 contained within the receiver 109.
FIG. 3 is a timing diagram of the transmission of the incoming radio frequency signals from the transmitter 101 which are received by the antenna 107 and the signal's relationship to the turn-on time of the frequency synthesizer 203, the data detector 205 and the mixer 201. The first waveform 309 depicts the transmission of the radio frequency signals of interest from the transmitter 101. The parameter "T" 301 is the time interval between transmissions of radio frequency signals, in the present embodiment the time is 280 mS. Parameter "T1" 305 is the length in time of an individual transmission of radio frequency signals of interest from the transmitter 101 , which in the present embodiment can be 40 mS. The second waveform 311 is a control signal created by the microprocessor 111 which turns the frequency synthesizer 203 on and off. Parameter "TO" 303 is the minimized warm-up time necessary for the frequency synthesizer to lock on to the desired frequency as determined by the method disclosed in FIG. 4. "T1 " + "TO" is the receiver on-time. The third waveform 313 is a control signal created by the microprocessor 111 which switches the data detector 205 and the mixer 201 on and off. Parameter "T2" is the fixed amount of time after turning on the frequency synthesizer 203 that the data detector 205 and the mixer 201 are turned on. Parameter "T3" is the warm-up time necessary for the data detector 205 and the mixer 201 to ensure that all of circuitry contained within the data detector 205 and the mixer 201 has warmed-up prior to receiving the output signal from the antenna 107. The method depicted in FIG. 4 in flow chart form is an adaptive loop which controls the on-time of components of the receiver 109, such as the frequency synthesizer 203, the data detector 205 and the mixer 201. The method compensates for the frequency, the temperature at which the radio is operating and the component variation in the radio by starting the method in response to a change in the temperature of the receiver 109 or a change in the frequency of the frequency synthesizer 203. The method starts the on-time of the receiver 109, "TO" + "T1", at the predetermined worst case time, in this embodiment 142 mS, and reduces the on-time by a predetermined increment, "T3" set at 5 mS for this embodiment, until it is on the verge of not detecting all of the data. Equally efficient methods may be developed, for example, by starting at a predetermined minimum value and working out until the data detection is successful.
The method begins at 401 triggered by a measurable change in the temperature or a change in the frequency of the frequency synthesizer 203. At 403, The warm-up time parameter "TO" 307 is set to the predetermined worst case value, 142 mS. At 405, the receiver 109 is turned off at the end of "T1 " 305. At 407, the method waits an amount of time equal to "T" 301 less the current setting for "TO" 303 and "T1 " 305. At 409, the receiver 109 is turned on. At 411 , the data detector 205 attempts to detect the data from the incoming radio frequency signals 309. At 413, the method decides if the data detection was successful or not successful by verifying the accuracy of the data detected. If it was successful, then at 415 the warm-up time parameter, "TO" 307, is reduced by a predetermined increment "T3" and the method is repeated starting at 405. These steps are repeated until data detection is not successful. If the data detection is not successful, the warm-up parameter is increased by the predetermined increment "T3", returning the warm-up time "T1 " 307 to the duration of the previous successful data detection. The method ends at 419. The minimized warm-up time is now at the lower limit of successfully detecting data.
The accuracy of the method may be improved by reducing the magnitude of the predetermined increment "T3", however, this will increase the number of iterations necessary to achieve the minimized limit, in the present invention, this method was implemented for the turn-on time of the frequency synthesizer 203. The data detector 205 and the mixer 201 are turned-on a fixed time, "T2", from the turn-on time of the frequency synthesizer 203, but upon apprehending the present invention, a designer may implement this method individually for the frequency synthesizer 203, the data detector 205, the mixer 201 and any other circuitry for which it may be deemed necessary, thus, increasing the accuracy of the turn-on times and increasing the microprocessor time necessary for the implementation of the method.
What is claimed is:

Claims

1. A method of adaptively controlling a radio receiver's on-time, the receiver including a data detector, a mixer and a frequency synthesizer, and receiving a first of a plurality of radio frequency signals, the radio frequency signals being received for a first predetermined time period at intervals of a second predetermined time period, the method comprising the steps of:
setting a first time parameter to a third time period;
turning off the radio receiver at the end of the first time period;
subtracting the sum of the magnitude of the first predetermined time period and the magnitude of said first time parameter from the magnitude of the second predetermined time period, forming a second time parameter;
waiting a length of time equal to said second time parameter;
turning on the radio receiver circuitry;
attempting to detect data from the received radio frequency signals; and
increasing said first time parameter by a fifth time period when data is not detected.
2. A method of adaptively controlling a radio receiver's on-time in accordance with claim 1 further comprising the step of reducing said first time parameter by a fourth time period when data is detected.
3. A method of adaptively controlling a radio receiver's on-time in accordance with claim 1 further comprising, triggering, responsive to a change from the first radio frequency to a second radio frequency, said setting said first time parameter to said third predetermined time period.
4. A method of adaptively controlling a radio receiver's on-time in accordance with claim 1 wherein said turning on the radio receiver circuitry further comprises:
turning on the frequency synthesizer;
waiting a length of time equal to a sixth time parameter;
turning on the data detector; and
turning on the mixer.
5. A radiotelephone receiver disposed within a radiotelephone, receiving radio frequency signals for a first time period at intervals of a second time period, the radiotelephone receiver comprising:
means for setting a first time parameter to a third time period;
means for turning off the radio receiver at the end of the first time period;
means for subtracting the sum of the magnitude of the first predetermined time period and the magnitude of said first time parameter from the magnitude of the second predetermined time period, forming a second time parameter;
means for waiting a length of time equal to said second time parameter;
means for turning on the radio receiver circuitry;
means for attempting to detect data from the received radio frequency signals; and
means for increasing said first time parameter by a fifth time period when data is not detected.
6. A radiotelephone receiver in accordance with claim 5 further comprising means for reducing said first time parameter by a fourth time period when data is detected.
7. A radiotelephone receiver on-time controller for use with a digital computer disposed within a radiotelephone, the controller comprising:
a computer program storage medium having a computer program to be executed by the digital computer stored thereon, the computer program comprising:
means for processing the minimum radio reciever on-time necessary to receive radio frequency signals;
means for setting a first time parameter to a third time period;
means for turning off said radio receiver at the end of a first time period;
means for subtracting the sum of the magnitude of said first predetermined time period and the magnitude of said first time parameter from the magnitude of a second predetermined time period, forming a second time parameter;
means for waiting a length of time equal to said second time parameter;
means for turning on said radio receiver;
means for attempting to detect data from said radio frequency signals; and means for increasing said first time parameter by a fifth time period when data is not detected.
8. A radiotelephone receiver on-time controller in accordance with claim 7 wherein said computer program further comprises means for reducing said first time parameter by a fourth time period when data is detected.
PCT/US1992/000595 1991-01-28 1992-01-24 Receiver controller method and apparatus WO1992013395A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9222171A GB2261140B (en) 1991-02-25 1992-10-22 Receiver controller method and apparatus

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US64692491A 1991-01-28 1991-01-28
US660,195 1991-02-25

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WO1992013395A1 true WO1992013395A1 (en) 1992-08-06

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PCT/US1992/000646 WO1992013414A1 (en) 1991-01-28 1992-01-27 Packet transmission system and method utilizing both a data bus and dedicated control lines

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EP (1) EP0569512A4 (en)
JP (2) JP2678690B2 (en)
KR (1) KR970007257B1 (en)
BR (1) BR9205487A (en)
WO (2) WO1992013395A1 (en)

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WO1994010812A1 (en) * 1992-11-02 1994-05-11 Siemens Aktiengesellschaft Arrangement for controlling a transmitter-receiver pair, in particular base stations and mobile units of a cordless telephone system
CN1049551C (en) * 1992-09-30 2000-02-16 摩托罗拉公司 Reliable message communication system

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Also Published As

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EP0569512A4 (en) 1997-11-05
JPH06505600A (en) 1994-06-23
KR930703776A (en) 1993-11-30
EP0569512A1 (en) 1993-11-18
JPH06503216A (en) 1994-04-07
WO1992013414A1 (en) 1992-08-06
JP2678690B2 (en) 1997-11-17
KR970007257B1 (en) 1997-05-07
BR9205487A (en) 1994-06-21

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