WO1992014322A1 - Method for the automatic setting of decision thresholds - Google Patents

Method for the automatic setting of decision thresholds Download PDF

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Publication number
WO1992014322A1
WO1992014322A1 PCT/GB1992/000198 GB9200198W WO9214322A1 WO 1992014322 A1 WO1992014322 A1 WO 1992014322A1 GB 9200198 W GB9200198 W GB 9200198W WO 9214322 A1 WO9214322 A1 WO 9214322A1
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Prior art keywords
mean
level
signal
threshold
zero
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PCT/GB1992/000198
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French (fr)
Inventor
Paul Thomas Ryan
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Cognito Group Limited
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Publication of WO1992014322A1 publication Critical patent/WO1992014322A1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/063Setting decision thresholds using feedback techniques only

Definitions

  • This invention relates to a method and apparatus for extracting data from a demodulated signal.
  • Eye patterns have therefore been used to monitor the performance of cable-based data transmission systems in which line attenuation is a problem that makes it necessary to employ signal compensation techniques.
  • An object of the present invention is to provide an improved method and apparatus for extracting data from a demodulated signal.
  • the present invention consists in a method of extracting data from a demodulated signal by reference to a mean amplitude level of the signal which is determined by monitoring the time which the signal spends above and below said mean level and adjusting said signal and mean level relative to one another to equate the mean time the signal spends above and below said mean level.
  • a mean zero level may be determined by monitoring the whole of the time that the signal spends either above or below said mean zero level. Once established, such a mean zero level can be used to establish the zero crossings where the demodulated signal passes through the mean zero level.
  • a mean level may be determined in relation to a threshold level by monitoring only while the signal is above (or below) the threshold, the signal being monitored according to the time spent between the threshold and the mean level and the time spent above (or below) the mean level.
  • a demodulated signal that varies positively and negatively either side of a mean zero level may be monitored either side of the mean zero level as the threshold to determine a mean positive level or a mean negative level.
  • the threshold level may be set at a level offset from the zero level towards the mean level so that the mean level moves towards the peak signal values.
  • the threshold level By setting the threshold level as a fixed proportion of the mean level after the latter has been established for positive (or negative) values of the signal, a new mean level for the signal in excess of said threshold level is established and in the process the threshold level itself shifts with the mean level towards the peak signal values, thereby further causing the mean level to shift towards these peak signal values.
  • the mean level tends towards a level close to the mean peak signal value.
  • the threshold then lies at a corresponding intermediate level between this mean peak level and the mean zero level and can be used as a criteria for signal decoding to distinguish between signal values corresponding to different binary values.
  • a mean peak signal level has been established by reference to a proportionally related threshold level, the latter can be supplemented by timing limits for the mean occurrence of signal peaks. These timing limits represent a more restrictive selection criteria for the mean peak level and thus produce a mean peak level which more closely approximates to the actual mean peak level.
  • the threshold level taken as a proportion of this mean peak level is therefore also more accurately determined for the purposes of signal decoding.
  • the phase of the signal for the mean occurrence of signal peaks is the same phase for mean occurrence of zero crossings, this being apparent from an eye-pattern produced by the signal.
  • the invention allows this phase to be determined by establishing the mean zero level, establishing the phase of the zero crossings on this level, and establishing a mean phase value for these zero crossings.
  • This zero phase is used as the sampling point for the signal, and the corresponding value is compared with upper and lower threshold levels determined as a proportion of the mean peak levels to decode the signal as a binary value.
  • the system is relatively insensitive to short term large amplitude interfering signals.
  • a signal decoding system involves analogue comparison operations in which the signal and predetermined or derived threshold levels are compared with one another, and timing operations in which the duration between signal and threshold coincidences are measured.
  • the system can therefore preferably be implemented with all of the timing operations being implemented digitally, thereby reducing the cost and size of the equipment used.
  • Figure 1 shows an eye-pattern such as would be produced by a demodulated input signal as displayed on an oscilloscope
  • Figure 2 shows the statistical signal amplitude distribution at the zero phase sampling time P in Figure 1 when in the presence of some interfering noise
  • Figure 3 shows a schematic diagram of a system according to the invention
  • Figure 4 shows a comparison process to determine the mean level of the positive intervals only of a demodulated input signal
  • Figure 5 shows a comparison process to determine the mean level of the positive intervals of a demodulated input signal above a threshold level proportional to the mean level.
  • the typical eye-pattern for a GMSK signal is shown in Figure 1, the pattern being produced by overlaying successive cycles t of the signal on an oscilloscope.
  • the optimum timing point for binary decoding of the signal is selected as that time P in the cycle at which there is a maximum number of zero crossings.
  • the zero level O can be taken to represent a binary "0" value.
  • Threshold levels T p/ T n are selected between these peak levels M p , M n and the zero level 0 in order to distinguish between binary "0" and binary "1" values.
  • threshold levels T p , T n correspond to the open areas or "eyes" shown shaded in Figure 1, in which the occurrence of values of the signal is minimal, as indicated by the distribution curve in Figure 2.
  • Signal values within the thresholds T p , T n are decoded as binary "0" and input values outside the thresholds T p , T n are decoded as binary "1".
  • a decoding system is illustrated in Figure 3 comprising an FM demodulator 1 and a filter 2 which process an input signal V in such as that received in a radio transmission. Since the input signal varies cyclically and is conditioned for dc balance about a zero level, this zero level is established as a first step.
  • a differential amplifier 3 between the demodulator 1 and the filter 2 has an adjustable bias voltage V applied to it which serves to offset the input signal.
  • a comparator 4 receives the offset input signal V and a reference signal V ref and produces a corresponding difference signal V 0 as an output to a counter 5. This counter counts at a predetermined rate set by a clock 17, and counts up when the difference signal is high corresponding to an input signal above V ref , and counts down when the difference signal is low corresponding to an input signal below V ref .
  • a digital/analogue converter 6 converts this count of the counter into a voltage which is applied as the bias voltage V b to the differential amplifier 3 and causes a corresponding offset of the input signal which balances it on V ref as the zero level, with the signal spending equal times above and below this zero level V ref .
  • the response rate of the bias voltage V b in the feedback loop from the counter 5 is dependent upon the count rate of the counter set by clock 17 and can be varied to suit different conditions. For example, a high count rate can be used to adapt to large input variations rapidly, or a low count rate can be used to track slowly changing variations and ignore rapid short term noise variations.
  • the output V 0 of the comparator 4 is analysed for zero crossings by detecting when the output changes state between positive and negative values.
  • the cycle t of the input signal V is divided into sixteen phases, and a zero crossing counter 7 is provided for each of the sixteen phases to record the occurrence of zero crossings in each corresponding phase over successive cycles.
  • a statistical distribution of zero crossings is established in the counters 7 and this is analysed by an analyser 14 to establish that phase t p in which there is a maximum number of zero crossings, the maximum preferably being taken as the median of the distribution.
  • This phase t p for the maximum number of zero crossings is that including time P in Figure 1, and is used as the sampling point in decoding the input signal V.
  • the threshold levels T p , T n have to be established, and this is done by taking them as a proportion of the mean peak levels M p M n .
  • the mean peak levels M p and M n are each established separately in corresponding circuitry, and that for the upper mean peak level M p will be described first.
  • This comprises a comparator 8 with one input supplied with the input signal V, the other input supplied with the reference voltage V ref via a potential divider 9, and an output V** . to a counter 10.
  • a digital/analogue converter 11 is connected between the counter 10 and said other input of the comparator 8 to produce a feedback signal V*-, 1 corresponding to the count in counter 10.
  • the counter 10 counts up or down depending on whether the input signal V is above or below the signal at its other input, provided also that the input signal V is above V ref as indicated by the output V 0 of comparator 4 which is connected via gating logic 12 to an enable input of the counter 10.
  • the counter 10 counts up and down and the output V b 1 of the converter 11 tends towards a mean level M pl at which the positive peaks of the input signal spend equal time above and below this level. This process is illustrated in Figure 4.
  • the enable condition that the input signal V must be above V ref is replaced by a more restrictive condition that the input signal must be above a threshold level M p2 which is a predetermined proportion of the mean peak level M pl .
  • This condition is derived from a further comparator 13 similar to the comparator 8 with one input supplied with the input signal V and the other input connected to a tapping of the potential divider 9, for example, at a midpoint so that the signal applied to the comparator 13 is half that applied to the comparator 8.
  • the output V 2 of the comparator 13 therefore changes state between positive and negative values as the input signal V exceeds or falls below half the mean peak level M pl , and this change operates via the gating logic 12 to control the enable signal applied to the counter 10 so that the counter counts up and down only when the input signal is above M p2 which equals half of M pl .
  • the mean peak level M pl therefore increases with M p2 towards the peak values. This process is illustrated in Figure 5.
  • the enable condition based on the threshold value M p2 is supplemented by a yet more restrictive condition that the input signal V should be within time limits tl and t2 centred on the phase t p determined as the median for zero crossings.
  • Phase t p and thus the period tl to t2 covers the occurrence of peak values of the input signal (see Figure 1) and is thus used to isolate these peak values so that a final mean peak level M p can be determined.
  • the median zero crossing phase analyser 14 establishes this phase t p and the limits tl and t2 which typically cover four of the sixteen phases of a complete cycle.
  • the analyser 14 then operates via the gating logic 12 to control the enable signal applied to the counter 10 so that the counter counts up and down only between these time limits tl and t2. This process is also illustrated in Figure 5.
  • the output V 2 of the comparator 13 indicates directly whether the input signal is above or below half the upper mean peak level M p (the upper threshold level T p in Figure 1) and is used to decode the input signal at the sampling point P.
  • the output V 2 of the comparator 13 is connected via an OR gate 15 to a sampler 16 controlled by the median zero crossing phase analyser 14 so as to sample the output of comparator 13 at the sampling point P.
  • the circuitry to establish the lower mean peak level M n is substantially similar to that for the upper mean peak level M p described above, the corresponding components being indicated by the same reference numerals followed by a dash.
  • the output of the comparator 13' indicated directly whether the input signal is above or below half

Abstract

Data is extracted from a demodulated signal (V) by reference to a mean amplitude level (Vref, Mp1) of the signal determined by monitoring the time which the signal spends above and below said mean level and adjusting said signal and mean level relative to one another to equate the mean time the signal spends above and below said mean level. A mean zero level (0) may be determined by monitoring the whole of the time that the signal spends either above or below said mean zero level, and can be used to establish the zero crossings where the signal passes through the mean zero level. Also, a mean level may be determined in relation to a threshold level (O, Mp2) by monitoring only while the signal is above (or below) the threshold, the signal being monitored according to the time spent between the threshold and the mean level (Mp1) and the time spent above (or below) the mean level. The threshold may be the mean zero level (O) and may subsequently be set at a level (Mp2) offset from the zero level towards the peak signal values.

Description

METHOD FOR THE AUTOMATIC SETTING OF DECISION THRESHOLDS
Technical Field
This invention relates to a method and apparatus for extracting data from a demodulated signal.
When a bit serial data stream is processed for transmission in a G SK signal it is subject to line and differential coding and filtering in order to reduce the bandwidth of the transmitted signal. As a result of these processes, the data is distorted, especially through the interaction between successive bits, known as intersymbol distortion. There are therefore problems in extracting the data from the received signal after demodulation and filtering. However, it is known that the received data signal conforms to certain amplitude and cycle limits which are represented by an "eye pattern" formed by overlaying the oscilloscope traces of successive bit signals. From this pattern it is possible to identify a zero crossing point corresponding to a cycle or bit synchronising point, and open areas or "eyes" corresponding to amplitude limits or thresholds between "0" and "1" bit levels. Eye patterns have therefore been used to monitor the performance of cable-based data transmission systems in which line attenuation is a problem that makes it necessary to employ signal compensation techniques.
Disclosure of the Invention
An object of the present invention is to provide an improved method and apparatus for extracting data from a demodulated signal.
The present invention consists in a method of extracting data from a demodulated signal by reference to a mean amplitude level of the signal which is determined by monitoring the time which the signal spends above and below said mean level and adjusting said signal and mean level relative to one another to equate the mean time the signal spends above and below said mean level.
For example, a mean zero level may be determined by monitoring the whole of the time that the signal spends either above or below said mean zero level. Once established, such a mean zero level can be used to establish the zero crossings where the demodulated signal passes through the mean zero level. Alternatively, a mean level may be determined in relation to a threshold level by monitoring only while the signal is above (or below) the threshold, the signal being monitored according to the time spent between the threshold and the mean level and the time spent above (or below) the mean level.
For example, a demodulated signal that varies positively and negatively either side of a mean zero level, may be monitored either side of the mean zero level as the threshold to determine a mean positive level or a mean negative level. Further, the threshold level may be set at a level offset from the zero level towards the mean level so that the mean level moves towards the peak signal values.
By setting the threshold level as a fixed proportion of the mean level after the latter has been established for positive (or negative) values of the signal, a new mean level for the signal in excess of said threshold level is established and in the process the threshold level itself shifts with the mean level towards the peak signal values, thereby further causing the mean level to shift towards these peak signal values. Thus the mean level tends towards a level close to the mean peak signal value. The threshold then lies at a corresponding intermediate level between this mean peak level and the mean zero level and can be used as a criteria for signal decoding to distinguish between signal values corresponding to different binary values.
Once a mean peak signal level has been established by reference to a proportionally related threshold level, the latter can be supplemented by timing limits for the mean occurrence of signal peaks. These timing limits represent a more restrictive selection criteria for the mean peak level and thus produce a mean peak level which more closely approximates to the actual mean peak level. The threshold level taken as a proportion of this mean peak level is therefore also more accurately determined for the purposes of signal decoding.
The phase of the signal for the mean occurrence of signal peaks is the same phase for mean occurrence of zero crossings, this being apparent from an eye-pattern produced by the signal. Thus the invention allows this phase to be determined by establishing the mean zero level, establishing the phase of the zero crossings on this level, and establishing a mean phase value for these zero crossings. This zero phase is used as the sampling point for the signal, and the corresponding value is compared with upper and lower threshold levels determined as a proportion of the mean peak levels to decode the signal as a binary value.
It will be appreciated that because the mean zero level and mean peak levels are determined by reference to the time during which the signal lies within predetermined levels, the system is relatively insensitive to short term large amplitude interfering signals.
A signal decoding system according to the invention involves analogue comparison operations in which the signal and predetermined or derived threshold levels are compared with one another, and timing operations in which the duration between signal and threshold coincidences are measured. The system can therefore preferably be implemented with all of the timing operations being implemented digitally, thereby reducing the cost and size of the equipment used.
Description of the Drawings
The invention will now be described by way of example with reference to the accompanying drawings in which:
Figure 1 shows an eye-pattern such as would be produced by a demodulated input signal as displayed on an oscilloscope,
Figure 2 shows the statistical signal amplitude distribution at the zero phase sampling time P in Figure 1 when in the presence of some interfering noise,
Figure 3 shows a schematic diagram of a system according to the invention,
Figure 4 shows a comparison process to determine the mean level of the positive intervals only of a demodulated input signal, and
Figure 5 shows a comparison process to determine the mean level of the positive intervals of a demodulated input signal above a threshold level proportional to the mean level.
Mode of Carrying Out the Invention
The typical eye-pattern for a GMSK signal is shown in Figure 1, the pattern being produced by overlaying successive cycles t of the signal on an oscilloscope. The optimum timing point for binary decoding of the signal is selected as that time P in the cycle at which there is a maximum number of zero crossings. The zero level O can be taken to represent a binary "0" value. At this time P, there are peak signal levels Mp, Mn both sides of the zero level which can be taken to represent a binary "1" value. Threshold levels Tp/ Tn are selected between these peak levels Mp, Mn and the zero level 0 in order to distinguish between binary "0" and binary "1" values. These threshold levels Tp, Tn correspond to the open areas or "eyes" shown shaded in Figure 1, in which the occurrence of values of the signal is minimal, as indicated by the distribution curve in Figure 2. Signal values within the thresholds Tp, Tn are decoded as binary "0" and input values outside the thresholds Tp, Tn are decoded as binary "1".
A decoding system according to the invention is illustrated in Figure 3 comprising an FM demodulator 1 and a filter 2 which process an input signal Vin such as that received in a radio transmission. Since the input signal varies cyclically and is conditioned for dc balance about a zero level, this zero level is established as a first step. A differential amplifier 3 between the demodulator 1 and the filter 2 has an adjustable bias voltage V applied to it which serves to offset the input signal. A comparator 4 receives the offset input signal V and a reference signal Vref and produces a corresponding difference signal V0 as an output to a counter 5. This counter counts at a predetermined rate set by a clock 17, and counts up when the difference signal is high corresponding to an input signal above Vref, and counts down when the difference signal is low corresponding to an input signal below Vref.
If the input signal V spends equal times above and below Vref, then the mean count of the counter remains substantially constant. However, if the input signal spends more time above or below Vref, then the mean count increases or decreases, respectively. A digital/analogue converter 6 converts this count of the counter into a voltage which is applied as the bias voltage Vb to the differential amplifier 3 and causes a corresponding offset of the input signal which balances it on Vref as the zero level, with the signal spending equal times above and below this zero level Vref.
The response rate of the bias voltage Vb in the feedback loop from the counter 5 is dependent upon the count rate of the counter set by clock 17 and can be varied to suit different conditions. For example, a high count rate can be used to adapt to large input variations rapidly, or a low count rate can be used to track slowly changing variations and ignore rapid short term noise variations.
Once the zero level 0 in Figure 1 has been established as Vref, the output V0 of the comparator 4 is analysed for zero crossings by detecting when the output changes state between positive and negative values. The cycle t of the input signal V is divided into sixteen phases, and a zero crossing counter 7 is provided for each of the sixteen phases to record the occurrence of zero crossings in each corresponding phase over successive cycles. Thus a statistical distribution of zero crossings is established in the counters 7 and this is analysed by an analyser 14 to establish that phase tp in which there is a maximum number of zero crossings, the maximum preferably being taken as the median of the distribution. This phase tp for the maximum number of zero crossings is that including time P in Figure 1, and is used as the sampling point in decoding the input signal V.
In order to decode the input signal, the threshold levels Tp, Tn have to be established, and this is done by taking them as a proportion of the mean peak levels Mp Mn. The mean peak levels Mp and Mn are each established separately in corresponding circuitry, and that for the upper mean peak level Mp will be described first. This comprises a comparator 8 with one input supplied with the input signal V, the other input supplied with the reference voltage Vref via a potential divider 9, and an output V**. to a counter 10. A digital/analogue converter 11 is connected between the counter 10 and said other input of the comparator 8 to produce a feedback signal V*-,1 corresponding to the count in counter 10. The counter 10 counts up or down depending on whether the input signal V is above or below the signal at its other input, provided also that the input signal V is above Vref as indicated by the output V0 of comparator 4 which is connected via gating logic 12 to an enable input of the counter 10. Thus the counter 10 counts up and down and the output Vb 1 of the converter 11 tends towards a mean level Mpl at which the positive peaks of the input signal spend equal time above and below this level. This process is illustrated in Figure 4.
As a second stage in establishing a final value for the upper mean peak level Mp, the enable condition that the input signal V must be above Vref is replaced by a more restrictive condition that the input signal must be above a threshold level Mp2 which is a predetermined proportion of the mean peak level Mpl. This condition is derived from a further comparator 13 similar to the comparator 8 with one input supplied with the input signal V and the other input connected to a tapping of the potential divider 9, for example, at a midpoint so that the signal applied to the comparator 13 is half that applied to the comparator 8. The output V2 of the comparator 13 therefore changes state between positive and negative values as the input signal V exceeds or falls below half the mean peak level Mpl, and this change operates via the gating logic 12 to control the enable signal applied to the counter 10 so that the counter counts up and down only when the input signal is above Mp2 which equals half of Mpl. The mean peak level Mpl therefore increases with Mp2 towards the peak values. This process is illustrated in Figure 5.
As a third and final stage in establishing a final value for the mean upper peak level Mp, the enable condition based on the threshold value Mp2 is supplemented by a yet more restrictive condition that the input signal V should be within time limits tl and t2 centred on the phase tp determined as the median for zero crossings. Phase tp and thus the period tl to t2 covers the occurrence of peak values of the input signal (see Figure 1) and is thus used to isolate these peak values so that a final mean peak level Mp can be determined. The median zero crossing phase analyser 14 establishes this phase tp and the limits tl and t2 which typically cover four of the sixteen phases of a complete cycle. The analyser 14 then operates via the gating logic 12 to control the enable signal applied to the counter 10 so that the counter counts up and down only between these time limits tl and t2. This process is also illustrated in Figure 5.
Once the final mean peak level Mp has been established, the output V2of the comparator 13 indicates directly whether the input signal is above or below half the upper mean peak level Mp (the upper threshold level Tp in Figure 1) and is used to decode the input signal at the sampling point P. Thus the output V2 of the comparator 13 is connected via an OR gate 15 to a sampler 16 controlled by the median zero crossing phase analyser 14 so as to sample the output of comparator 13 at the sampling point P.
The circuitry to establish the lower mean peak level Mn is substantially similar to that for the upper mean peak level Mp described above, the corresponding components being indicated by the same reference numerals followed by a dash. The output of the comparator 13' indicated directly whether the input signal is above or below half

Claims

the lower mean peak level Mn (the lower threshold level Tn in Figure 1) and passes via the OR gate 15 to the sampler 16 like the corresponding output from the comparator 13. Thus the output Vout of the sampler is a binary stream corresponding to a decoded version of the input signal.The decoding system as illustrated in Figure 1 can be implemented as a combination of discrete analogue circuits and digitally, for example within an ASIC. The comparators may all be analogue devices with their outputs connected to a digital ASIC and/or microprocessor. Thus, the counters, gating logic, digital/analogue converters, and the zero crossing analyser and sampler may all be implemented in the ASIC and/or microprocessor. CLAIMS
1. A method of extracting data from a demodulated signal by reference to a mean amplitude level of the signal characterised in that said mean amplitude level (Vref, Mpl) is determined by monitoring the time which the signal (Vin) spends above and below said mean level (Vref, Mpl) and adjusting said signal (V) and said mean level (Vref, Mpl) relative to one another to equate the mean time the signal (Vin) spends above and below said mean level.
2. A method as claimed in claim 1 in which the mean amplitude level (Vref) is a mean zero level (0) determined by monitoring the whole of the time that the signal (Vin) spends above and below said mean zero level (0) .
3. A method as claimed in claim 2 in which the demodulated signal (Vin) is compared with the mean zero level (0) to establish zero crossings of the demodulated signal with the mean zero level.
4. A method as claimed in claim 3 in which the phase of each zero crossing within successive cycles of the demodulated signal (Vin) is measured and recorded so as to establish a mean phase (tP) for the zero crossings.
5. A method as claimed in claim 4 in which the demodulated signal (Vin) is sampled at said mean phase (tp) for the zero crossings and is decoded by reference to an amplitude threshold level (Tp) of the demodulated signal, values thereof either side of said threshold level being decoded as different binary values.
6. A method as claimed in claim 1 in which the mean amplitude level (Mpl) is determined in relation to an amplitude threshold level (0) of the signal by monitoring only while the signal is to one side of said threshold level (0).
7. A method as claimed in claim 6 in which the demodulated signal (Vin) varies positively and negatively either side of a mean zero level (0), and is monitored one side of the mean zero level as the threshold level to determine a mean intermediate level (Mpl) on said one side of the mean zero level.
8. A method as claimed in claim 6 in which the threshold level is set at a level (Mp2) offset from the mean zero level (0) on said one side of the mean zero level.
9. A method as claimed in claim 7 in which after said mean intermediate level (Mpl) is established in relation to the mean zero level (0), a second threshold level (Mp2) is set as a fixed proportion of said mean intermediate level (Mpl) so that a new mean intermediate level is established between said mean intermediate level and the peak values of the demodulated signal (Vin) said one side of the mean zero level (0) .
10. A method as claimed in claim 9 in which the second threshold level (Mp2) is set at substantially half of said mean intermediate level (Mpx).
11. A method as claimed in claim 9 or 10 in which monitoring is limited so as to occur only between timing limits (tl, t2) that include the peak values of the demodulated signal.
12. A method as claimed in claim 11 in which said timing limits (tl, t2) correspond to limits either side of the mean phase (tp) for the zero crossings of the demodulated signal as claimed in claim 4.
13. A method as claimed in any one of claims 9 to 12 in which the second threshold level (Mp2) is used as a criteria for decoding the demodulated signal (V1n), values thereof either side of said second threshold level (Mp2) being decoded as different binary values.
14. A method as claimed in claim 13 in which said second threshold level (Mp2)is established on said one side of the mean zero level (0) and a corresponding second threshold level (Tn) is established on the other side of the mean zero level (0), and values of the demodulated signal (Vin) between these two second threshold levels and outside of these two second threshold values are decoded as different binary values.
15. Apparatus for extracting data from a demodulated signal characterised in comprising mean comparison means (4 or 8) to compare the demodulated signal (Vιn) at one input thereof with a mean reference signal (Vref) at another input thereof and produce a corresponding mean difference signal (V0 or V- , and mean timing means (5 or 10) to monitor the time which the demodulated signal (Vin) spends above and below said mean reference signal (Vref or Mpl) and produce a corresponding bias signal (Vb or Vbl) which is applied to one of the inputs of the mean comparison means (4 or 8) so as to equate the mean time the demodulated signal (Vin) spends above and below said mean reference signal (Vref or Mpl).
16. Apparatus as claimed in claim 15 in which the bias signal (Vb) is applied with the demodulated signal (Vin) to said one input of the mean comparison means (4) to produce a biassed input signal (V) .
17. Apparatus as claimed in claim 16 in which the mean timing means (5) monitors the whole of the time that the biassed input signal (V) spends above and below said mean reference signal (Vref) so that the latter represents a mean zero level.
18. Apparatus as claimed in claim 17 which includes recording means (7) responsive to the difference signal (V0) so as to record zero crossings of the biassed input signal (V) with the mean zero level.
19. Apparatus as claimed in claim 18 including phase monitoring means (7, 14) to monitor the phase of each zero crossing within successive cycles of the demodulated signal (Vn) and establish a mean phase (tp) for the zero crossings.
20. Apparatus as claimed in claim 19 including threshold comparison means (8) to compare the biassed input signal (V) to a threshold level (Tp) thereof such that values of the biassed input signal (V) either side of said threshold level are decoded as different binary values, and sampling means (16) to sample the decoded binary values of the biassed input signal (V) at said mean phase (tp) for the zero crossings.
21. Apparatus as claimed in any one of claims 17 to 19 including gating means (12) responsive to the mean difference signal (V0) from the mean comparison means (4) when the biassed input signal (V) lies to one side of its mean zero level (0); threshold comparison means (8) to compare the biassed input signal (V) at one input thereof with a reference level signal (Mpl) at another input thereof and produce a corresponding threshold difference signal (Vx); and threshold timing means (10) responsive to the threshold difference signal (V- and the gating means (12) to monitor the time which the biassed input signal (V) spends above and below said reference level signal (Mpl) on said one side of the mean zero level (0) and produce a corresponding bias signal (Vbl) which is applied as said reference level signal to said other input of the threshold comparison means (8), so as to equate the mean time the biassed input signal (V) spends above and below said reference level signal (Mpl) on said one side of the mean zero level (0) and thereby establish a mean intermediate level of said reference level signal.
22. Apparatus as claimed in claim 21 in which a reference signal equal to the mean reference signal (Vref) applied to said other input of the mean comparison means (4) is applied to said other input of the threshold comparison means (8).
23. Apparatus as claimed in claim 22 including second threshold comparison means (13) to compare the biassed input signal (V) with a second threshold level (Mp2) corresponding to a fixed proportion of said reference level signal (Mpl) and to produce a corresponding difference signal (V2) for said gating means (12), said gating means (12) being responsive at said second threshold level (Mp2) and serving to control the threshold timing means (10) so that after said mean intermediate level (Mpl) is established, the second threshold level (Mp2) is effective to control the threshold timing means (10) and establish a new mean intermediate level (Mpl) between said mean intermediate level and the peak values of the biassed input signal (V) on said one side of the mean zero level (0).
24. Apparatus as claimed in claim 23 in which the second threshold level (Mp2) is set at substantially half of said mean intermediate level (Mpl).
25. Apparatus as claimed in claim 23 or 24 which includes phase monitoring means (7, 14) to monitor the phase of the peak values of the biassed input signal (V) within successive cycles thereof and establish phase timing limits (tl, t2) which include the peak values, the gating means (12) being responsive to said phase timing limits (tl, t2) and controlling the threshold timing means (10) so that it monitors the biassed input signal (V) only between these phase timing limits (tl, t2).
26. Apparatus as claimed in claim 25 in which the phase monitoring means (7, 14) monitors the zero crossings of the biassed input signal (V) at the mean zero level (0) thereof.
27. Apparatus as claimed in any of claims 24 to 26 including decoding means (16) which is responsive to the difference signal (V2) from said second threshold comparison means (13) so as to decode values of the biassed input signal (V) either side of the second threshold level (Mp2) as different binary values.
28. Apparatus as claimed in claim 27 in which said threshold comparison means (8), threshold timing means (10), gating means (12), and second threshold comparison means (13) which establishes said second threshold level (Mp2) on said one side of the mean zero level (0), is duplicated so that similar apparatus establishes a corresponding second threshold level (Mn) on the other side of the mean zero level (0), the decoding means (16) serving to decode values of the biassed input signal (V) between these two second threshold levels (Mp2, Mn) as one binary value, and values outside these two second threshold levels as the other binary value.
29. Apparatus as claimed in claim 15 in which the bias signal (Vbl) is applied to said other input of the mean comparison means (8) to produce said mean reference signal (Mpl).
30. Apparatus as claimed in claim 29 including threshold setting means (4) which sets a threshold level (0) of the demodulated signal (Vin), and gating means (12) which is responsive to said threshold level (0) and controls the mean timing means (10) accordingly so that it monitors the demodulated signal (Vin) on one side of the threshold level (0).
31. Apparatus as claimed in claim 30 in which the threshold setting means (4) sets a threshold level at a mean zero level (0) of the demodulated signal (V1n) so that the mean reference signal corresponds to a mean intermediate level (Mpl) of the demodulated signal (Vin) on said one side of the mean zero level.
32. Apparatus as claimed in claim 31 including second threshold setting means (13) which sets a second threshold level (Mp2) corresponding to a fixed proportion of said mean intermediate level (Mpl), said gating means (12) being responsive to said second threshold level (Mp2) and controlling the mean timing means (10) so that after said mean intermediate level (Mpl) is established, the second threshold level (Mp2) is effective to control the mean timing means (10) and establish a new mean intermediate level between said mean intermediate level (Mpl) and the peak values of the demodulated signal (Vin) on said one side of the mean zero level (0) .
33. Apparatus as claimed in claim 32 in which the second threshold level (Mp2) is set at substantially half of said mean intermediate level (Mpl).
34. Apparatus as claimed in claim 32 or 33 which includes phase monitoring means (7, 14) to monitor the phase of the peak values of the demodulated signal (Vιrι) within successive cycles thereof and establish phase timing limits (tl, t2) which include the peak values, the gating means (12) being responsive to said phase timing limits (tl, t2) and controlling the mean timing means (10) so that it monitors the demodulated signal (Vin) only between these phase timing limits (tl, t2).
35. Apparatus as claimed in claim 34 in which the phase monitoring means (7, 14) monitors the zero crossings of the demodulated signal (Vin) at the mean zero level (0) thereof.
36. Apparatus as claimed in any of claims 32 to 35 including decoding means (16) which is responsive to the demodulated signal (Vin) and said second threshold level (Mp2) so as to decode values of the demodulated signal either side of the second threshold level as different binary values.
37. Apparatus as claimed in claim 36 in which said mean comparison means (8) , mean timing means (10), gating means (12), and second threshold setting means (13) which establishes said second threshold level (Mp2) on said one side of the mean zero level (0), is duplicated so that similar apparatus establishes a corresponding second threshold level on the other side of the mean zero level (0), the decoding means (16) serving to decode values of the demodulated signal (Vin) between these two second threshold levels as one binary value, and values outside these two second threshold levels as the other binary value.
PCT/GB1992/000198 1991-02-02 1992-02-03 Method for the automatic setting of decision thresholds WO1992014322A1 (en)

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GB919102275A GB9102275D0 (en) 1991-02-02 1991-02-02 Decoding method and apparatus

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0555970A2 (en) * 1992-02-10 1993-08-18 Plessey Semiconductors Limited Data tracking system
EP0599522A1 (en) * 1992-11-23 1994-06-01 Hewlett-Packard Company Optical transceiver with improved range and data communication rate
WO1996003826A1 (en) * 1994-07-21 1996-02-08 Siemens Aktiengesellschaft Data signal zero crossing detection process
EP1675338A1 (en) * 2004-12-23 2006-06-28 Alcatel Device for analog to digital conversion with decision circuit and optimized decision threshold
US7496478B2 (en) * 2005-07-18 2009-02-24 Dieter Rathei Method of monitoring a semiconductor manufacturing trend
US7587292B2 (en) * 2005-07-18 2009-09-08 Dieter Rathei Method of monitoring a semiconductor manufacturing trend

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3864529A (en) * 1972-09-14 1975-02-04 Lynch Communication Systems Receiver for decoding duobinary signals
EP0051141A1 (en) * 1980-11-04 1982-05-12 LGZ LANDIS & GYR ZUG AG Method and arrangement for equalizing received binary signals

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3864529A (en) * 1972-09-14 1975-02-04 Lynch Communication Systems Receiver for decoding duobinary signals
EP0051141A1 (en) * 1980-11-04 1982-05-12 LGZ LANDIS & GYR ZUG AG Method and arrangement for equalizing received binary signals

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
JOURNAL OF LIGHTWAVE TECHNOLOGY. vol. 7, no. 11, November 1989, NEW YORK US pages 1634 - 1640; KAWAI ET AL.: 'Smart optical receiver with automatic decision threshold setting and retiming phase alignment' *

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0555970A2 (en) * 1992-02-10 1993-08-18 Plessey Semiconductors Limited Data tracking system
EP0555970A3 (en) * 1992-02-10 1994-03-23 Plessey Semiconductors Ltd
EP0599522A1 (en) * 1992-11-23 1994-06-01 Hewlett-Packard Company Optical transceiver with improved range and data communication rate
US5495358A (en) * 1992-11-23 1996-02-27 Hewlett-Packard Company Optical transceiver with improved range and data communication rate
WO1996003826A1 (en) * 1994-07-21 1996-02-08 Siemens Aktiengesellschaft Data signal zero crossing detection process
US5862185A (en) * 1994-07-21 1999-01-19 Tektronix, Inc. Data signal zero crossing detection process
EP1675338A1 (en) * 2004-12-23 2006-06-28 Alcatel Device for analog to digital conversion with decision circuit and optimized decision threshold
FR2880222A1 (en) * 2004-12-23 2006-06-30 Cie Financiere Alcatel Sa ANALOG-DIGITAL CONVERSION DEVICE WITH DECISION CIRCUIT AND OPTIMIZED DECISION THRESHOLD
US7564925B2 (en) 2004-12-23 2009-07-21 Alcatel Analog-to-digital converter with a decision circuit and an optimized decision threshold
US7496478B2 (en) * 2005-07-18 2009-02-24 Dieter Rathei Method of monitoring a semiconductor manufacturing trend
US7587292B2 (en) * 2005-07-18 2009-09-08 Dieter Rathei Method of monitoring a semiconductor manufacturing trend

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