WO1994016428A1 - A data driver circuit for use with an lcd display - Google Patents
A data driver circuit for use with an lcd display Download PDFInfo
- Publication number
- WO1994016428A1 WO1994016428A1 PCT/GB1994/000003 GB9400003W WO9416428A1 WO 1994016428 A1 WO1994016428 A1 WO 1994016428A1 GB 9400003 W GB9400003 W GB 9400003W WO 9416428 A1 WO9416428 A1 WO 9416428A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- groups
- demultiplexing
- circuit
- elements
- display
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
- G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2230/00—Details of flat display driving waveforms
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0243—Details of the generation of driving signals
- G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2011—Display of intermediate tones by amplitude modulation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
Definitions
- the present invention relates generally to video displays and their associated driving circuits and in particular to LCD video display column driving circuits that use a simplified multiplexing arrangement for data lines and pixel capacitors that are precharged to a selected voltage level prior to the application of video data signals to enable selected ones of the data lines and pixel capacitors to be additionally charged or discharged to an appropriate level by the incoming video data signals to enhance the operation of the display.
- Matrix display devices commonly utilize a plurality of display elements that are arranged in a matrix of rows and columns and supported on opposing sides of a thin layer of electro-optic material. Switching devices are associated with the display elements to control the application of data signals thereto.
- the display elements include a pixel capacitor driven by a transistor as a switching device.
- One of the pixel electrodes is on one side of the matrix display and a common electrode for each of the pixels is formed on the opposite of the matrix display.
- the transistor is usually a thin-film transistor (TFT) that is deposited on a transparent substrate such as glass.
- the switching transistor has its source electrode connected to the pixel electrode that is deposited on the glass on the same side of the display matrix as the switching transistor.
- the drain electrodes of all of the switching transistors in a given column are connected to the same column conductor to which data signals are applied.
- the gate electrodes of all of the switching transistors in a given row are connected to a common row conductor to which row selection signals are applied to switch all the transistors in a selected row to the ON condition or state.
- the video data signals supplied to the switching transistor electrodes cause the pixel capacitors to be charged to a value corresponding to the data signal on the column conductor.
- each pixel with its electrodes on opposite sides of the display acts as a capacitor.
- the charge in the pixel capacitor is stored until the next repetition when that row is again selected with a row select signal and new voltages are stored therein.
- a picture is formed on the matrix display by the charges stored in the pixel capacitors. It is also known to precharge the pixel capacitors of the presently selected row to a predetermined voltage level prior to the video data signals being applied to the column conductors as set forth in commonly assigned copending US application Serial No.
- precharging TFTs are deposited onto the glass substrate with each of the drain electrodes connected to a column conductor and each of the gate electrodes connected together and to a precharge circuit and each of the source electrodes connected to a predetermined voltage source. Then prior to the video data signals being applied, the precharge circuit turns ON each of the precharging TFTs thereby allowing the voltage source to charge the pixel capacitors to a predetermined level.
- video although it has been generally applied to the use of signals for television, is intended to cover displays other than TV pictures or displays. Such displays may be hand-held games having an LCD display with moving figures thereon and the like.
- the present invention is directed to a new data driver circuit for use with a scanned LCD video display.
- the demultiplexer elements are fabricated as thin-film transistors (TFTs) on the display itself to transfer a precharging voltage and video data from an off-glass source to the on-glass pixel capacitors of the display.
- TFTs thin-film transistors
- the demultiplexer elements are divided into a predetermined number of groups and a demultiplexing circuit controls the activation of these groups.
- the demultiplexing circuit consecutively and seguentially enables each of the groups of demultiplexer elements in order to provide video data to charge the pixel capacitors to a corresponding level.
- a control circuit Prior to the video data being provided, a control circuit provides a precharging voltage and the demultiplexing circuit enables each of the groups of demultiplexer elements simultaneously to allow all of the pixel capacitors of the selected row to be charged to a predetermined level.
- FIG. 1 is a basic block diagram of the novel system and data driver circuit for a self-scanned TFTLCD video display
- FIG. 2 is a detailed diagram of the matrix array on glass and the data scanning circuits associated therewith in accordance with the present invention
- FIG. 3 is a detailed diagram of a matrix array and data scanning circuits disclosed in a commonly assigned copending patent application
- FIG. 4 illustrates the waveforms and timing of the present invention
- FIG. 5 is a diagram of a capacitor charge waveform illustrating that a capacitor discharges faster than it charges.
- FIG. 6 is a waveform illustrating the time saving benefits of applying less than a full precharge voltage V+ or V- to the pixel capacitors.
- the circuit of FIG. 3 is disclosed in detail in commonly assigned copending US application Serial No. 971,721 filed November 3, 1992 entitled “DATA DRIVING CIRCUIT FOR LCD DISPLAY” which is incorporated herein in its entirety by reference.
- FIG. 1 is a basic block diagram of the novel display system 10 which includes the display device 14 and the "off-glass" control circuits 12 that are separate from and connected to the display 14 to drive the elements thereon.
- An active matrix liquid crystal display (AMLCD) of the type illustrated in FIG. 1 may typically consist of 200,000 or more display elements.
- AMLCD active matrix liquid crystal display
- the array may include 384 columns and 240 rows. In such a case, in excess of 92,000 display elements or pixels are required. For larger sets, of course, the number increases.
- the transistors used to drive the pixels are usually thin-film transistors (TFTs) deposited on a substrate such as glass.
- TFTs thin-film transistors
- the display elements include electrodes deposited on the glass and common electrode elements on an opposing substrate, the opposing substrates being separated by an electro- optic material.
- the column data driver circuits 16 drive the column lines 24 with the video data signals and precharging voltage.
- the row select driver 25 may be of any type well known in the art, preferably of the type disclosed in commonly assigned copending US application Serial No. 996,979 filed 24 December 1992 and entitled "A SELECT DRIVER CIRCUIT FOR AN LCD DISPLAY", and sequentially activates the pixels in each selected row and the rows 1 through 240 are driven sequentially.
- sample capacitors 50 receive data from input circuit 64 through shift register 49.
- the red, green and blue video signals are coupled from circuit 58 to the sample capacitors 50 in concert with the data in the shift registers 49.
- the clock signals and horizontal and vertical synchronization signals are provided by control logic 60.
- a high voltage generator 62 provides the necessary high voltage power.
- the output of the sample capacitors 50 are coupled to 64 output amplifiers 52.
- the amplifiers 52 are coupled to a gate 53 for controlling the output of the video data.
- a gate 55 is coupled to voltage sources 63 and 65 and controls the voltages on lines 57 and 59 to allow a precharging voltage to be provided to substrate 14.
- a gate control 61 controls gates 53 and 55 such that only one gate is enabled at a time.
- Line 57 is coupled to each odd output line D,, D 3
- D 63 and line 59 is coupled to each even input line D 2 , D 4
- the 64 data input lines 13 are coupled in multiplexed fashion, 64 bits at a time, to the 384 display elements on the substrate 14 after a precharge voltage is applied.
- the 64 video outputs are coupled on line 13 to the column conductors 24 through column data drivers 16 as will be disclosed hereafter.
- lines 104, 106, 130, and 132 from a demultiplexing circuit 102 form six pairs of enabling signal lines that are applied to X(6) groups, designated as 66, 68 and 70, of Y(64) demultiplexing elements. These elements are designated as 108, 110
- the lines 104, 106, 130, and 132 enable all 384 demultiplexing elements (108, 110 112, and 114 in each group) simultaneously for a time period prior to the video data being applied to substrate 14 to allow the display elements to be precharged to a predetermined voltage level.
- the row select driver signals, the clock and power lines are coupled from the control circuit 12 on line 21 to the row select driver circuit 25 as shown in FIG. 1.
- Row select driver circuit 25 may be any of such type of circuits well known in the art but is preferably of the type disclosed in commonly assigned copending application Serial No. 996979 filed December 24 1992. As shown in FIG. 3, if the first row is selected by row select driver circuit 225, the transistors 278, 280, 282, and 284 in row 1 will all be activated.
- a precharging circuit 316 and the X column data driver circuits 266, 268, and 270 will provide signals that will precharge each column line and each of the pixel capacitors 294, 296, 298, and 300 in the first row of row driver 225 to a preselected voltage. Then, as the data signals are applied to the column lines 224, the capacitors will be further charged or discharged by an amount that depends upon the level of the data signal being applied to the column lines 224. Precharge of the capacitors is used because the capacitors 294, 296, 298, and 300 are able to discharge much faster than they charge as illustrated in FIG. 5. As can be seen in FIG. 5, for the capacitor to charge from 0 to a value designated by the numeral 23, takes X amount of time.
- a precharge circuit 316 generates an output signal on line 318 that is coupled to the gates of all 384 precharge transistors 320, 322, 324, and 326, one of which is coupled to each of the 384 column lines on the substrate 214.
- a sample of the precharge transistors is shown in group 1, designated by the block numbered 266.
- Precharge transistor 320 has its drain connected to a voltage source, V+, and its source electrode coupled to internal data line column D 1 . All of the odd column lines have such a transistor coupled thereto.
- transistors 320 and 324 have their drain electrodes coupled to a V+ voltage source 328.
- the transistors 322 and 326 for the even column lines have their drain electrodes connected to a V- voltage source 327.
- the present invention eliminates the need for the precharging circuit 316 and transistors 320, 322 324, and 326 of FIG. 3 while still maintaining the precharging function and advantages outlined above, as seen by comparing FIG. 3 with FIG. 2. As shown in FIG. 1, this is accomplished by alternatively turning OFF gate 53 and turning ON gate 55 with gate control 61 to allow voltage sources 63 and 65 to charge lines 57 and 59 to a predetermined level for a specified time period. Then, for the same time gate 55 is turned ON, demultiplexing circuit 102 in FIG. 2 simultaneously enables the X groups of Y demultiplexing elements (108, 110 112, and 114) shown in FIG. 2. This allows capacitors 94, 96, 98, and 100 to be charged to the predetermined voltage.
- FIG. 2 is a more detailed diagram of the substrate 14.
- a control circuit 12 external to the substrate, provides precharging voltages and video signals on lines 13 to the substrate 14.
- the row driver circuit 25, which may be of the type previously described, includes TFT transistors operated from control signals on line 21 in FIG. 1, sequentially selects a row, as is well known in the art. Rows are indicated in FIG. 2 as 1-Z rows and only the first and last rows are shown. The remaining rows are identical. It will also be noted in FIG. 2 that there are X groups of Y switching elements. A switching element comprises a transistor and its associated pixel capacitor. In the first group designated by the numeral 72, there are shown only four switching elements 86, 88, 90, and 92 for purposes of simplicity.
- the gates of the transistors 78, 80, 82, and 84 which may be thin-film transistors deposited on the glass substrate 14, are coupled through row conductor 1 to the row driver circuit 25.
- a pixel capacitor or display element (94, 96, 98, and 100) is connected to the respective source electrodes of the transistors 78, 80, 82, and 84.
- the electrode 28 is the second plate of the pixel capacitor and is the ground or common electrode segment that is located on the opposing substrate of the display 14.
- the present invention as seen in FIGS.
- gate control 61 When gate control 61 turns OFF gate 53 and opens gate 55. Gate control 61 alternately enables and disables gates 53 and 55 such that only one gate is enabled at a time. This allows voltage sources 63 and 65 to charge the odd and even lines D, through D w , respectively. While gate 55 is open, demultiplexing circuit 102 generates clock signals to turn ON transistors 108, 110 112, and 114 in all groups, thus allowing all capacitors 94, 96, 98, and 100 to be charged in the selected row.
- the present invention allows the elimination of 384 TFTs (320, 322, 324, and 326) on the display substrate shown in FIG. 3. This, in turn, reduces manufacturing costs and increases production yield and reliability.
- the function of precharge circuit 316 is performed by control circuit 12 and demultiplexing circuit 102 in the present invention. After the precharging function is performed, the operation of the circuit of FIG. 3 and the circuit of the present invention are exactly the same.
- the scanning line time interval is approximately 63 microseconds for a 384 X 240 pixel display interfacing with the NTSC TV system.
- the budgeted line time is 8 microseconds for previous line deselection, 6 microseconds for scan data line precharge, 42 microseconds for the video data transferring in demultiplexed fashion from an external video source to the X groups of data lines of the display and 7 microseconds for the pixels to settle. This can be seen in line (c) .
- the V + voltage level is approximately 5 volts and the V voltage level is approximately 0 volts, for example. It should be understood, however, that these voltage levels may vary to increase the speed of operation of the device.
- the internal data line and the pixel capacitor may be charged to a V value that is less than the 5 volt maximum voltage. Then, during the 7 ⁇ s time period for the data lines to charge the pixel capacitors to the data input voltage level, it requires the same time for ⁇ V 2 to go from V + to the maximum data voltage and for ⁇ V 1 to be discharged to the minimum data voltage. In both cases, the charge time for ⁇ V 2 and discharge time for ⁇ v, can be shortened or optimized.
- the V + voltage level may be optimized so that the time difference between charging an internal data line and its associated pixel capacitor to the maximum input video data signal level, 5 volts for example only, and discharging an internal data line and its associated pixel capacitor to the minimum input video data signal level, 0 volts for example, is minimal.
- less precharge time is required because the pixel capacitors are not charged to the full value of 5 volts during the precharge time period.
- the same analysis applies to the V voltage level as to the V + voltage level.
- the incoming video data signals red, green, and blue
- the incoming video data signals red, green, and blue
- D.,, D 3 , — D 63 are positive polarity video signals
- D 2 , D 4 , — D u are their complementary polarity video signals.
- These video signal voltages are shown in lines (i) and (j) in FIG. 4 as dashed lines following the precharge time.
- the control signals from demultiplexer driver circuit 102 on lines 104 and 106 are raised to 25 volts and 30 volts, respectively, as illustrated in line (f) for 7 ⁇ s.
- Each of the other X groups of input lines, in this case X 6, have the video data on lines 13 coupled thereto for 7 ⁇ s as shown in lines (f) , (g) , and (h) in FIG. 4.
- the reason to divide the data lines into two groups, even and odd, is because the data voltage polarity inversion scheme is used in this system.
- the data voltage polarity is altered between two fields of a TV frame.
- the last 7 ⁇ s of the 63 ⁇ s time interval is used to allow the pixels in the last group, group X, to settle better.
- the internal data lines D-.-D ⁇ can be discharged to within 15 millivolts of the incoming video data color signal levels within the allocated time interval of 7 ⁇ s in this example.
- a successive operation is repeated for each of the demultiplexer circuits numbered 66 through 68, and 70, or all six groups.
- the pixel switching transistors in row n are already fully turned ON. Therefore, after the scanned row n-1 is deselected, the pixels in row n are then precharged.
- the first block of the pixel transistors on columns D ⁇ D ⁇ in row n has the entire 49 microseconds for pixel discharge times
- the second block of the pixel transistors in row n connected to columns D 65 -D 128 has approximately 41 ⁇ s discharging time.
- the third block would have approximately 33 ⁇ s and so forth.
- the final block of the pixel transistors in row n would have substantially only 9 ⁇ s left for pixel discharging.
- the demultiplex ratio affects the number of video leads and the number of signal input leads. It can be optimized or compromised according to the product application. For example, for high resolution and/or high picture quality, one can use a smaller demultiplex ratio so that more video signal leads per group could be coupled into the substrate 14 instead of 64. One can also reduce a large number of input lead counts for less demanding gray levels or slower speed video products.
- the data lines and pixels are precharged to the highest needed voltage levels due to the fact that N-channel transistors are used for signal transferring and the data lines or pixels are discharged while inputting video signals because it is much easier and faster to discharge them than to charge them in order to obtain an accurate signal voltage.
- ⁇ 1 e and , 0 (lines 104 and 106) can be combined into one control line signal feeding all the gates of multiplexing transistors 108, 110 112, and 114 in group 1.
- the combining of signals ⁇ 1 e and ⁇ , 0 can be accomplished when the gate voltage stress is not a concern and the device characteristics of the demultiplexing> transistors 108, 110 112, and 114 are good enough to discharge the internal data lines and pixel capacitors uniformly.
- the other demultiplexing line pairs such as 130 and 132 to the other five groups, including 68 and 70 in FIG. 2, can be combined into one control line for each pair. In such case, the number of multiplexer gate control lines can be reduced to one-half the number.
- a 384 X 240 pixel color hand-held TV is used.
- the horizontal pixel count is 384.
- the demultiplexer transistors 108, 110 112, and 114 are fabricated with thin-film transistors on the display itself to transfer the precharge voltage and video data and to interface the display directly to a video source.
- the precharge voltage is applied to all columns simultaneously.
- the video signals from a video source external to the display are arranged to come onto the display 64 data lines at a time using one-sixth of a designated line time interval. Twelve control signals, two to each of the six groups, enable demultiplexing transistors in six different blocks to sequentially transfer the incoming video signals to the display's six groups of 64 internal data lines.
- the next 64 video signals will be transferred to the internal data lines D 65 through D 128 .
- each video data signal transfer takes place during one-sixth of the designated line time interval. This operation continues sequentially for all six demultiplexing circuits. The entire one row of video information is transferred to the internal data lines in 42 microseconds of allocated data input time.
Abstract
Description
Claims
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP94902981A EP0678210B1 (en) | 1993-01-05 | 1994-01-04 | A data driver circuit for use with an lcd display |
BR9406255A BR9406255A (en) | 1993-01-05 | 1994-01-04 | Circuit to provide video data to a display |
RU95115553A RU2126177C1 (en) | 1993-01-05 | 1994-01-04 | Circuit transmitting videodata to display |
KR1019950702774A KR100296673B1 (en) | 1993-01-05 | 1994-01-04 | Data driver circuit for LCD display |
CA002150454A CA2150454C (en) | 1993-01-05 | 1994-01-04 | Data driver circuit for use with an lcd display |
DE69406267T DE69406267T2 (en) | 1993-01-05 | 1994-01-04 | DATA DRIVER DEVICE FOR USE IN A LIQUID CRYSTAL DISPLAY |
AU57129/94A AU672082B2 (en) | 1993-01-05 | 1994-01-04 | A data driver circuit for use with an LCD display |
GR970402949T GR3025307T3 (en) | 1993-01-05 | 1997-11-07 | A data driver circuit for use with an lcd display. |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/001,127 | 1993-01-05 | ||
US08/001,127 US5510807A (en) | 1993-01-05 | 1993-01-05 | Data driver circuit and associated method for use with scanned LCD video display |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1994016428A1 true WO1994016428A1 (en) | 1994-07-21 |
Family
ID=21694514
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/GB1994/000003 WO1994016428A1 (en) | 1993-01-05 | 1994-01-04 | A data driver circuit for use with an lcd display |
Country Status (16)
Country | Link |
---|---|
US (1) | US5510807A (en) |
EP (1) | EP0678210B1 (en) |
JP (1) | JP2855053B2 (en) |
KR (1) | KR100296673B1 (en) |
CN (1) | CN1063561C (en) |
AT (1) | ATE159371T1 (en) |
AU (1) | AU672082B2 (en) |
BR (1) | BR9406255A (en) |
CA (1) | CA2150454C (en) |
DE (1) | DE69406267T2 (en) |
DK (1) | DK0678210T3 (en) |
ES (1) | ES2109664T3 (en) |
GR (1) | GR3025307T3 (en) |
MY (1) | MY110588A (en) |
RU (1) | RU2126177C1 (en) |
WO (1) | WO1994016428A1 (en) |
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2733852A1 (en) * | 1995-05-01 | 1996-11-08 | Motorola Inc | METHOD AND CIRCUIT FOR CONTROLLING DISPLAY DEVICE |
EP0745967A2 (en) * | 1995-06-02 | 1996-12-04 | Xerox Corporation | Circuit for driving display data lines of an array formed on a substrate |
WO1997025706A1 (en) * | 1996-01-11 | 1997-07-17 | Thomson-Lcd | Method for addressing a flat screen using pixel precharging, driver for carrying out the method, and use thereof in large screens |
EP0809229A2 (en) * | 1996-05-23 | 1997-11-26 | Motorola, Inc. | Drive device for scanning a monolithic integrated LED array |
EP0809228A2 (en) * | 1996-05-23 | 1997-11-26 | Motorola, Inc. | Drive device and method for scanning a monolithic integrated led array |
GB2325329A (en) * | 1997-05-17 | 1998-11-18 | Lg Electronics Inc | Digital-type liquid crystal display panel driving circuit |
GB2327137A (en) * | 1997-07-10 | 1999-01-13 | Lg Electronics Inc | Liquid crystal display |
GB2351177A (en) * | 1999-05-21 | 2000-12-20 | Lg Philips Lcd Co Ltd | Driving data lines in a liquid crystal display |
EP1094438A1 (en) * | 1999-10-21 | 2001-04-25 | Pioneer Corporation | Active matrix display apparatus and driving method therefor |
US6307532B1 (en) | 1997-07-16 | 2001-10-23 | Seiko Epson Corporation | Liquid crystal apparatus, driving method thereof, and projection-type display apparatus and electronic equipment using the same |
KR100320668B1 (en) * | 1997-03-03 | 2002-05-09 | 니시무로 타이죠 | Flat panel display |
KR100408002B1 (en) * | 2001-12-29 | 2003-12-01 | 엘지.필립스 엘시디 주식회사 | circuit for driving liquid crystal display device |
KR100430100B1 (en) * | 1999-03-06 | 2004-05-03 | 엘지.필립스 엘시디 주식회사 | Driving Method of Liquid Crystal Display |
KR100548799B1 (en) * | 1997-10-01 | 2006-03-23 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor display device and method of driving the same |
Families Citing this family (59)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3451717B2 (en) * | 1994-04-22 | 2003-09-29 | ソニー株式会社 | Active matrix display device and driving method thereof |
JP3518086B2 (en) * | 1995-09-07 | 2004-04-12 | ソニー株式会社 | Video signal processing device |
US5757351A (en) * | 1995-10-10 | 1998-05-26 | Off World Limited, Corp. | Electrode storage display addressing system and method |
US6040812A (en) * | 1996-06-19 | 2000-03-21 | Xerox Corporation | Active matrix display with integrated drive circuitry |
US6100879A (en) * | 1996-08-27 | 2000-08-08 | Silicon Image, Inc. | System and method for controlling an active matrix display |
US6124853A (en) * | 1996-09-03 | 2000-09-26 | Lear Automotive Dearborn, Inc. | Power dissipation control for a visual display screen |
US6157360A (en) * | 1997-03-11 | 2000-12-05 | Silicon Image, Inc. | System and method for driving columns of an active matrix display |
WO1999004384A1 (en) * | 1997-07-14 | 1999-01-28 | Seiko Epson Corporation | Liquid crystal device, method for driving the same, and projection display and electronic equipment made using the same |
WO1999010868A1 (en) * | 1997-08-26 | 1999-03-04 | Koninklijke Philips Electronics N.V. | Display device |
US6100868A (en) * | 1997-09-15 | 2000-08-08 | Silicon Image, Inc. | High density column drivers for an active matrix display |
US6229508B1 (en) * | 1997-09-29 | 2001-05-08 | Sarnoff Corporation | Active matrix light emitting diode pixel structure and concomitant method |
JP2001506381A (en) * | 1997-10-20 | 2001-05-15 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Display device |
TW530287B (en) * | 1998-09-03 | 2003-05-01 | Samsung Electronics Co Ltd | Display device, and apparatus and method for driving display device |
GB9827988D0 (en) * | 1998-12-19 | 1999-02-10 | Koninkl Philips Electronics Nv | Active matrix liquid crystal display devices |
JP3482908B2 (en) | 1999-05-26 | 2004-01-06 | 日本電気株式会社 | Drive circuit, drive circuit system, bias circuit, and drive circuit device |
JP3681580B2 (en) * | 1999-07-09 | 2005-08-10 | 株式会社日立製作所 | Liquid crystal display |
GB9917677D0 (en) * | 1999-07-29 | 1999-09-29 | Koninkl Philips Electronics Nv | Active matrix array devices |
US6483522B1 (en) * | 2000-04-20 | 2002-11-19 | Industrial Technology Research Institute | Method and circuit for data driving of a display |
US8489669B2 (en) * | 2000-06-07 | 2013-07-16 | Apple Inc. | Mobile data processing system moving interest radius |
KR100685942B1 (en) * | 2000-08-30 | 2007-02-23 | 엘지.필립스 엘시디 주식회사 | Liquid crystal display device and method for driving the same |
GB2367176A (en) * | 2000-09-14 | 2002-03-27 | Sharp Kk | Active matrix display and display driver |
JP4330059B2 (en) * | 2000-11-10 | 2009-09-09 | カシオ計算機株式会社 | Liquid crystal display device and drive control method thereof |
JP2004514948A (en) * | 2000-11-30 | 2004-05-20 | トムソン ライセンシング ソシエテ アノニム | Method and apparatus for equalizing brightness in a display |
US7088330B2 (en) * | 2000-12-25 | 2006-08-08 | Sharp Kabushiki Kaisha | Active matrix substrate, display device and method for driving the display device |
US6630921B2 (en) * | 2001-03-20 | 2003-10-07 | Koninklijke Philips Electronics N.V. | Column driving circuit and method for driving pixels in a column row matrix |
JP2003029687A (en) * | 2001-07-16 | 2003-01-31 | Sony Corp | D/a conversion circuit, display device using the same circuit and portable terminal using the same device |
US7508479B2 (en) * | 2001-11-15 | 2009-03-24 | Samsung Electronics Co., Ltd. | Liquid crystal display |
KR100789139B1 (en) * | 2001-11-15 | 2007-12-28 | 삼성전자주식회사 | On-glass single chip liquid crystal display device |
KR100649243B1 (en) * | 2002-03-21 | 2006-11-24 | 삼성에스디아이 주식회사 | Organic electroluminescent display and driving method thereof |
KR100515299B1 (en) * | 2003-04-30 | 2005-09-15 | 삼성에스디아이 주식회사 | Image display and display panel and driving method of thereof |
KR100560468B1 (en) * | 2003-09-16 | 2006-03-13 | 삼성에스디아이 주식회사 | Image display and display panel thereof |
KR100515306B1 (en) * | 2003-10-29 | 2005-09-15 | 삼성에스디아이 주식회사 | Electroluminescent display panel |
KR100778409B1 (en) * | 2003-10-29 | 2007-11-22 | 삼성에스디아이 주식회사 | Electroluminescent display panel and deriving method therefor |
JP4385730B2 (en) * | 2003-11-13 | 2009-12-16 | セイコーエプソン株式会社 | Electro-optical device driving method, electro-optical device, and electronic apparatus |
KR100529077B1 (en) * | 2003-11-13 | 2005-11-15 | 삼성에스디아이 주식회사 | Image display apparatus, display panel and driving method thereof |
KR100578911B1 (en) * | 2003-11-26 | 2006-05-11 | 삼성에스디아이 주식회사 | Current demultiplexing device and current programming display device using the same |
KR100589381B1 (en) * | 2003-11-27 | 2006-06-14 | 삼성에스디아이 주식회사 | Display device using demultiplexer and driving method thereof |
KR100578914B1 (en) * | 2003-11-27 | 2006-05-11 | 삼성에스디아이 주식회사 | Display device using demultiplexer |
KR100578913B1 (en) * | 2003-11-27 | 2006-05-11 | 삼성에스디아이 주식회사 | Display device using demultiplexer and driving method thereof |
KR100589376B1 (en) * | 2003-11-27 | 2006-06-14 | 삼성에스디아이 주식회사 | Light emitting display device using demultiplexer |
TWI225237B (en) * | 2003-12-04 | 2004-12-11 | Hannstar Display Corp | Active matrix display and its driving method |
JP2005202159A (en) * | 2004-01-15 | 2005-07-28 | Seiko Epson Corp | Electrooptical device and the driving circuit and method for driving the same, and electrooptical equipment |
CN100410995C (en) * | 2004-01-17 | 2008-08-13 | 奇美电子股份有限公司 | Asymmetrical liquid crystal screen driving method |
KR101126343B1 (en) * | 2004-04-30 | 2012-03-23 | 엘지디스플레이 주식회사 | Electro-Luminescence Display Apparatus |
KR100600350B1 (en) * | 2004-05-15 | 2006-07-14 | 삼성에스디아이 주식회사 | demultiplexer and Organic electroluminescent display using thereof |
KR100622217B1 (en) * | 2004-05-25 | 2006-09-08 | 삼성에스디아이 주식회사 | Organic electroluminscent display and demultiplexer |
JP2006154772A (en) * | 2004-10-25 | 2006-06-15 | Nec Micro Systems Ltd | Liquid crystal display, liquid crystal driver, and its operating method |
KR101201127B1 (en) * | 2005-06-28 | 2012-11-13 | 엘지디스플레이 주식회사 | Liquid Crystal Display and Driving Method thereof |
GB2436389A (en) * | 2006-03-23 | 2007-09-26 | Sharp Kk | Active matrix liquid crystal device with temperature measuring capacitor |
GB2436388A (en) * | 2006-03-23 | 2007-09-26 | Sharp Kk | Active matrix liquid crystal device with temperature sensing capacitor arrangement |
EP2075789A3 (en) * | 2007-12-25 | 2010-01-06 | TPO Displays Corp. | Transient control drive method and circuit, and image display system thereof |
JP5053434B2 (en) * | 2008-04-11 | 2012-10-17 | シャープ株式会社 | Display device and driving method of display device |
RU2471217C2 (en) * | 2008-05-13 | 2012-12-27 | Шарп Кабусики Кайся | Display device and television receiver |
CN102483888B (en) * | 2009-09-02 | 2014-06-04 | 夏普株式会社 | Device substrate |
JP5552954B2 (en) | 2010-08-11 | 2014-07-16 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP5664034B2 (en) | 2010-09-03 | 2015-02-04 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
US9214127B2 (en) * | 2013-07-09 | 2015-12-15 | Apple Inc. | Liquid crystal display using depletion-mode transistors |
TWI505257B (en) * | 2013-11-01 | 2015-10-21 | Au Optronics Corp | Displaying device and driving method thereof |
EP3249639A1 (en) * | 2016-05-26 | 2017-11-29 | Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO | Conformable matrix display device |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2162984A (en) * | 1984-07-23 | 1986-02-12 | Sharp Kk | Matrix display driver circuits |
EP0186540A1 (en) * | 1984-11-28 | 1986-07-02 | ETAT FRANCAIS représenté par le Ministre des PTT (Centre National d'Etudes des Télécommunications) | Electronic circuit composed of thin-film transistors for controlling a matrix device |
EP0417578A2 (en) * | 1989-09-11 | 1991-03-20 | Deutsche Thomson-Brandt Gmbh | Circuit for driving a liquid crystal display |
WO1992009986A1 (en) * | 1990-12-03 | 1992-06-11 | Thomson S.A. | Logic circuits for an amorphous silicone self-scanned matrix system |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL169647B (en) * | 1977-10-27 | 1982-03-01 | Philips Nv | DISPLAY WITH A LIQUID CRYSTAL. |
US4233603A (en) * | 1978-11-16 | 1980-11-11 | General Electric Company | Multiplexed varistor-controlled liquid crystal display |
US4403217A (en) * | 1981-06-18 | 1983-09-06 | General Electric Company | Multiplexed varistor-controlled liquid crystal display |
JPS6281629A (en) * | 1985-10-07 | 1987-04-15 | Canon Inc | Driving method for liquid crystal display device |
JPS62191832A (en) * | 1986-02-18 | 1987-08-22 | Canon Inc | Driving device |
EP0238867B1 (en) * | 1986-02-21 | 1994-12-14 | Canon Kabushiki Kaisha | Display apparatus |
NL8700627A (en) * | 1987-03-17 | 1988-10-17 | Philips Nv | METHOD FOR CONTROLLING A LIQUID CRYSTAL DISPLAY AND ASSOCIATED DISPLAY. |
GB2205191A (en) * | 1987-05-29 | 1988-11-30 | Philips Electronic Associated | Active matrix display system |
US4922240A (en) * | 1987-12-29 | 1990-05-01 | North American Philips Corp. | Thin film active matrix and addressing circuitry therefor |
US5151689A (en) * | 1988-04-25 | 1992-09-29 | Hitachi, Ltd. | Display device with matrix-arranged pixels having reduced number of vertical signal lines |
NL8802436A (en) * | 1988-10-05 | 1990-05-01 | Philips Electronics Nv | METHOD FOR CONTROLLING A DISPLAY DEVICE |
JP2830004B2 (en) * | 1989-02-02 | 1998-12-02 | ソニー株式会社 | Liquid crystal display device |
US5245579A (en) * | 1989-11-24 | 1993-09-14 | Sharp Kabushiki Kaisha | Semiconductor memory device |
JPH03168617A (en) * | 1989-11-28 | 1991-07-22 | Matsushita Electric Ind Co Ltd | Method for driving display device |
JP2951352B2 (en) * | 1990-03-08 | 1999-09-20 | 株式会社日立製作所 | Multi-tone liquid crystal display |
JPH05273522A (en) * | 1992-01-08 | 1993-10-22 | Matsushita Electric Ind Co Ltd | Display device and display device using the same |
US5377030A (en) * | 1992-03-30 | 1994-12-27 | Sony Corporation | Method for testing active matrix liquid crystal by measuring voltage due to charge in a supplemental capacitor |
US5426447A (en) * | 1992-11-04 | 1995-06-20 | Yuen Foong Yu H.K. Co., Ltd. | Data driving circuit for LCD display |
-
1993
- 1993-01-05 US US08/001,127 patent/US5510807A/en not_active Expired - Lifetime
- 1993-06-16 JP JP5181831A patent/JP2855053B2/en not_active Expired - Lifetime
-
1994
- 1994-01-04 DK DK94902981.3T patent/DK0678210T3/en active
- 1994-01-04 ES ES94902981T patent/ES2109664T3/en not_active Expired - Lifetime
- 1994-01-04 DE DE69406267T patent/DE69406267T2/en not_active Expired - Lifetime
- 1994-01-04 MY MYPI94000007A patent/MY110588A/en unknown
- 1994-01-04 RU RU95115553A patent/RU2126177C1/en active IP Right Revival
- 1994-01-04 CN CN94190875A patent/CN1063561C/en not_active Expired - Lifetime
- 1994-01-04 BR BR9406255A patent/BR9406255A/en not_active IP Right Cessation
- 1994-01-04 KR KR1019950702774A patent/KR100296673B1/en not_active IP Right Cessation
- 1994-01-04 WO PCT/GB1994/000003 patent/WO1994016428A1/en active IP Right Grant
- 1994-01-04 EP EP94902981A patent/EP0678210B1/en not_active Expired - Lifetime
- 1994-01-04 CA CA002150454A patent/CA2150454C/en not_active Expired - Lifetime
- 1994-01-04 AT AT94902981T patent/ATE159371T1/en not_active IP Right Cessation
- 1994-01-04 AU AU57129/94A patent/AU672082B2/en not_active Expired
-
1997
- 1997-11-07 GR GR970402949T patent/GR3025307T3/en unknown
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2162984A (en) * | 1984-07-23 | 1986-02-12 | Sharp Kk | Matrix display driver circuits |
EP0186540A1 (en) * | 1984-11-28 | 1986-07-02 | ETAT FRANCAIS représenté par le Ministre des PTT (Centre National d'Etudes des Télécommunications) | Electronic circuit composed of thin-film transistors for controlling a matrix device |
EP0417578A2 (en) * | 1989-09-11 | 1991-03-20 | Deutsche Thomson-Brandt Gmbh | Circuit for driving a liquid crystal display |
WO1992009986A1 (en) * | 1990-12-03 | 1992-06-11 | Thomson S.A. | Logic circuits for an amorphous silicone self-scanned matrix system |
Cited By (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2733852A1 (en) * | 1995-05-01 | 1996-11-08 | Motorola Inc | METHOD AND CIRCUIT FOR CONTROLLING DISPLAY DEVICE |
US6281891B1 (en) | 1995-06-02 | 2001-08-28 | Xerox Corporation | Display with array and multiplexer on substrate and with attached digital-to-analog converter integrated circuit having many outputs |
EP0745967A2 (en) * | 1995-06-02 | 1996-12-04 | Xerox Corporation | Circuit for driving display data lines of an array formed on a substrate |
EP0745967A3 (en) * | 1995-06-02 | 1997-10-15 | Xerox Corp | Circuit for driving display data lines of an array formed on a substrate |
WO1997025706A1 (en) * | 1996-01-11 | 1997-07-17 | Thomson-Lcd | Method for addressing a flat screen using pixel precharging, driver for carrying out the method, and use thereof in large screens |
FR2743658A1 (en) * | 1996-01-11 | 1997-07-18 | Thomson Lcd | METHOD FOR ADDRESSING A FLAT SCREEN USING A PRECHARGE OF THE PIXELS CONTROL CIRCUIT ALLOWING THE IMPLEMENTATION OF THE METHOD AND ITS APPLICATION TO LARGE DIMENSION SCREENS |
KR100445675B1 (en) * | 1996-01-11 | 2004-12-08 | 딸르 아비오닉스 엘쎄데 | Method for addrfssing a flat screen using pixel precharging, driver for carrying out the method, and use thereof in large screens |
US6359608B1 (en) | 1996-01-11 | 2002-03-19 | Thomson Lcd | Method and apparatus for driving flat screen displays using pixel precharging |
EP0809229A2 (en) * | 1996-05-23 | 1997-11-26 | Motorola, Inc. | Drive device for scanning a monolithic integrated LED array |
EP0809228A2 (en) * | 1996-05-23 | 1997-11-26 | Motorola, Inc. | Drive device and method for scanning a monolithic integrated led array |
EP0809229A3 (en) * | 1996-05-23 | 1997-12-03 | Motorola, Inc. | Drive device for scanning a monolithic integrated LED array |
EP0809228A3 (en) * | 1996-05-23 | 1997-12-03 | Motorola, Inc. | Drive device and method for scanning a monolithic integrated led array |
KR100320668B1 (en) * | 1997-03-03 | 2002-05-09 | 니시무로 타이죠 | Flat panel display |
GB2325329A (en) * | 1997-05-17 | 1998-11-18 | Lg Electronics Inc | Digital-type liquid crystal display panel driving circuit |
DE19825276B4 (en) * | 1997-07-10 | 2011-09-15 | Lg Display Co., Ltd. | liquid-crystal display |
US6333729B1 (en) | 1997-07-10 | 2001-12-25 | Lg Electronics Inc. | Liquid crystal display |
GB2327137B (en) * | 1997-07-10 | 2000-02-09 | Lg Electronics Inc | Liquid crystal display |
GB2327137A (en) * | 1997-07-10 | 1999-01-13 | Lg Electronics Inc | Liquid crystal display |
US6307532B1 (en) | 1997-07-16 | 2001-10-23 | Seiko Epson Corporation | Liquid crystal apparatus, driving method thereof, and projection-type display apparatus and electronic equipment using the same |
US6545657B2 (en) * | 1997-07-16 | 2003-04-08 | Seiko Epson Corporation | Liquid crystal apparatus, driving method thereof, and projection-type display apparatus and electronic equipment using the same |
KR100548799B1 (en) * | 1997-10-01 | 2006-03-23 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor display device and method of driving the same |
KR100430100B1 (en) * | 1999-03-06 | 2004-05-03 | 엘지.필립스 엘시디 주식회사 | Driving Method of Liquid Crystal Display |
US6924784B1 (en) | 1999-05-21 | 2005-08-02 | Lg. Philips Lcd Co., Ltd. | Method and system of driving data lines and liquid crystal display device using the same |
GB2351177B (en) * | 1999-05-21 | 2002-08-28 | Lg Philips Lcd Co Ltd | Method and system driving data lines and liquid crystal display device using the same |
GB2351177A (en) * | 1999-05-21 | 2000-12-20 | Lg Philips Lcd Co Ltd | Driving data lines in a liquid crystal display |
EP1094438A1 (en) * | 1999-10-21 | 2001-04-25 | Pioneer Corporation | Active matrix display apparatus and driving method therefor |
KR100408002B1 (en) * | 2001-12-29 | 2003-12-01 | 엘지.필립스 엘시디 주식회사 | circuit for driving liquid crystal display device |
Also Published As
Publication number | Publication date |
---|---|
DK0678210T3 (en) | 1998-05-18 |
GR3025307T3 (en) | 1998-02-27 |
KR960700494A (en) | 1996-01-20 |
RU2126177C1 (en) | 1999-02-10 |
ES2109664T3 (en) | 1998-01-16 |
AU5712994A (en) | 1994-08-15 |
KR100296673B1 (en) | 2001-10-24 |
EP0678210B1 (en) | 1997-10-15 |
US5510807A (en) | 1996-04-23 |
JPH07104703A (en) | 1995-04-21 |
CA2150454C (en) | 2003-03-18 |
CA2150454A1 (en) | 1994-07-21 |
BR9406255A (en) | 1996-01-09 |
DE69406267D1 (en) | 1997-11-20 |
MY110588A (en) | 1998-08-29 |
AU672082B2 (en) | 1996-09-19 |
JP2855053B2 (en) | 1999-02-10 |
DE69406267T2 (en) | 1998-02-12 |
EP0678210A1 (en) | 1995-10-25 |
CN1063561C (en) | 2001-03-21 |
ATE159371T1 (en) | 1997-11-15 |
CN1116454A (en) | 1996-02-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
AU672082B2 (en) | A data driver circuit for use with an LCD display | |
AU667597B2 (en) | Data driving circuit for LCD display | |
KR100686312B1 (en) | Liquid-crystal display apparatus | |
US5648793A (en) | Driving system for active matrix liquid crystal display | |
US6268841B1 (en) | Data line driver for a matrix display and a matrix display | |
US20080150852A1 (en) | Active Matrix Display Devices | |
GB2324191A (en) | Driver circuit for TFT-LCD | |
WO2020244342A1 (en) | Display panel and driving method therefor, and display apparatus | |
US20090251629A1 (en) | Liquid crystal display module | |
JP4219991B2 (en) | Active matrix liquid crystal display | |
EP1410374B1 (en) | Display driver apparatus and driving method | |
US7773084B2 (en) | Image display device, image display panel, panel drive device, and method of driving image display panel | |
JPH10326090A (en) | Active matrix display device | |
JPH0950263A (en) | Active matrix display device and driving method therefor | |
KR20060061835A (en) | Active matrix display devices | |
KR20040087933A (en) | Display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 94190875.5 Country of ref document: CN |
|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AT AU BB BG BR BY CA CH CN CZ DE DK ES FI GB HU JP KP KR KZ LK LU LV MG MN MW NL NO NZ PL PT RO RU SD SE SK UA UZ VN |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): AT BE CH DE DK ES FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN ML MR NE SN TD TG |
|
DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 2150454 Country of ref document: CA |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1019950702774 Country of ref document: KR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1994902981 Country of ref document: EP |
|
WWP | Wipo information: published in national office |
Ref document number: 1994902981 Country of ref document: EP |
|
REG | Reference to national code |
Ref country code: DE Ref legal event code: 8642 |
|
WWG | Wipo information: grant in national office |
Ref document number: 1994902981 Country of ref document: EP |