WO1996021273A3 - Two-transistor zero-power electrically-alterable non-volatile latch - Google Patents

Two-transistor zero-power electrically-alterable non-volatile latch Download PDF

Info

Publication number
WO1996021273A3
WO1996021273A3 PCT/US1996/000306 US9600306W WO9621273A3 WO 1996021273 A3 WO1996021273 A3 WO 1996021273A3 US 9600306 W US9600306 W US 9600306W WO 9621273 A3 WO9621273 A3 WO 9621273A3
Authority
WO
WIPO (PCT)
Prior art keywords
channel mos
mos transistor
node
source
control gate
Prior art date
Application number
PCT/US1996/000306
Other languages
French (fr)
Other versions
WO1996021273A2 (en
Inventor
Vikram Kowshik
Original Assignee
Actel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Actel Corp filed Critical Actel Corp
Priority to JP8521270A priority Critical patent/JPH10510124A/en
Priority to EP96907003A priority patent/EP0801844A2/en
Publication of WO1996021273A2 publication Critical patent/WO1996021273A2/en
Publication of WO1996021273A3 publication Critical patent/WO1996021273A3/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22Modifications for ensuring a predetermined initial state when the supply voltage has been applied
    • H03K17/24Storing the actual state when the supply voltage fails
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356008Bistable circuits ensuring a predetermined initial state when the supply voltage has been applied; storing the actual state when the supply voltage fails
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

A two-transistor, zero-power, electrically-alterable non-volatile latch element comprises an input node, an output node, and an erase node. A P-Channel MOS transistor has a source connected to a source of first electrical potential, a drain connected to the output node, a control gate connected to the input node, and a floating gate capacitively coupled to the control gate. An N-Channel MOS transistor has a source connected to a source of second electrical potential lower than the first electrical potential, a drain connected to the output node, a control gate connected to the input node, and a floating gate capacitively coupled to the control gate and electrically connected to the floating gate of the P-Channel MOS transistor. The floating gates of the P-Channel MOS transistor and the N-Channel MOS transistor are capacitively coupled to the erase node via a tunnel dielectric.
PCT/US1996/000306 1995-01-06 1996-01-04 Two-transistor zero-power electrically-alterable non-volatile latch WO1996021273A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP8521270A JPH10510124A (en) 1995-01-06 1996-01-04 Two-transistor power-saving electrically rewritable nonvolatile latch element
EP96907003A EP0801844A2 (en) 1995-01-06 1996-01-04 Two-transistor zero-power electrically-alterable non-volatile latch

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/369,760 US5587603A (en) 1995-01-06 1995-01-06 Two-transistor zero-power electrically-alterable non-volatile latch
US08/369,760 1995-01-06

Publications (2)

Publication Number Publication Date
WO1996021273A2 WO1996021273A2 (en) 1996-07-11
WO1996021273A3 true WO1996021273A3 (en) 1996-09-12

Family

ID=23456803

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1996/000306 WO1996021273A2 (en) 1995-01-06 1996-01-04 Two-transistor zero-power electrically-alterable non-volatile latch

Country Status (5)

Country Link
US (1) US5587603A (en)
EP (1) EP0801844A2 (en)
JP (1) JPH10510124A (en)
CA (1) CA2198359A1 (en)
WO (1) WO1996021273A2 (en)

Families Citing this family (75)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3666973B2 (en) * 1996-03-07 2005-06-29 ローム株式会社 Semiconductor device and method for manufacturing semiconductor device
DE69613983T2 (en) * 1996-10-30 2002-04-04 St Microelectronics Srl Voltage comparator with at least one insulating layer MOS transistor and analog-digital converter equipped with it
US6404006B2 (en) 1998-12-01 2002-06-11 Vantis Corporation EEPROM cell with tunneling across entire separated channels
US6144580A (en) 1998-12-11 2000-11-07 Cypress Semiconductor Corp. Non-volatile inverter latch
US6294810B1 (en) 1998-12-22 2001-09-25 Vantis Corporation EEPROM cell with tunneling at separate edge and channel regions
US6294811B1 (en) 1999-02-05 2001-09-25 Vantis Corporation Two transistor EEPROM cell
US6100560A (en) * 1999-03-26 2000-08-08 Cypress Semiconductor Corp. Nonvolatile cell
US6172392B1 (en) 1999-03-29 2001-01-09 Vantis Corporation Boron doped silicon capacitor plate
US6307773B1 (en) 2000-07-28 2001-10-23 National Semiconductor Corporation Non-volatile latch with program strength verification
US6356478B1 (en) * 2000-12-21 2002-03-12 Actel Corporation Flash based control for field programmable gate array
EP1436815B1 (en) * 2001-09-18 2010-03-03 Kilopass Technology, Inc. Semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric
US6798693B2 (en) * 2001-09-18 2004-09-28 Kilopass Technologies, Inc. Semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric
US6766960B2 (en) * 2001-10-17 2004-07-27 Kilopass Technologies, Inc. Smart card having memory using a breakdown phenomena in an ultra-thin dielectric
US6700151B2 (en) * 2001-10-17 2004-03-02 Kilopass Technologies, Inc. Reprogrammable non-volatile memory using a breakdown phenomena in an ultra-thin dielectric
US6639840B1 (en) 2002-01-03 2003-10-28 Fairchild Semiconductor Corporation Non-volatile latch circuit that has minimal control circuitry
US6940751B2 (en) * 2002-04-26 2005-09-06 Kilopass Technologies, Inc. High density semiconductor memory cell and memory array using a single transistor and having variable gate oxide breakdown
US6898116B2 (en) * 2002-04-26 2005-05-24 Kilopass Technologies, Inc. High density semiconductor memory cell and memory array using a single transistor having a buried N+ connection
US6992925B2 (en) * 2002-04-26 2006-01-31 Kilopass Technologies, Inc. High density semiconductor memory cell and memory array using a single transistor and having counter-doped poly and buried diffusion wordline
US6777757B2 (en) * 2002-04-26 2004-08-17 Kilopass Technologies, Inc. High density semiconductor memory cell and memory array using a single transistor
US6650143B1 (en) 2002-07-08 2003-11-18 Kilopass Technologies, Inc. Field programmable gate array based upon transistor gate oxide breakdown
US7031209B2 (en) * 2002-09-26 2006-04-18 Kilopass Technology, Inc. Methods and circuits for testing programmability of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric
US7042772B2 (en) * 2002-09-26 2006-05-09 Kilopass Technology, Inc. Methods and circuits for programming of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric
US6791891B1 (en) 2003-04-02 2004-09-14 Kilopass Technologies, Inc. Method of testing the thin oxide of a semiconductor memory cell that uses breakdown voltage
US7088135B2 (en) * 2003-04-10 2006-08-08 Stmicroelectronics S.R.L. Nonvolatile switch, in particular for high-density nonvolatile programmable-logic devices
US6924664B2 (en) * 2003-08-15 2005-08-02 Kilopass Technologies, Inc. Field programmable gate array
US6972986B2 (en) * 2004-02-03 2005-12-06 Kilopass Technologies, Inc. Combination field programmable gate array allowing dynamic reprogrammability and non-votatile programmability based upon transistor gate oxide breakdown
US7064973B2 (en) * 2004-02-03 2006-06-20 Klp International, Ltd. Combination field programmable gate array allowing dynamic reprogrammability
US8735297B2 (en) 2004-05-06 2014-05-27 Sidense Corporation Reverse optical proximity correction method
US7755162B2 (en) 2004-05-06 2010-07-13 Sidense Corp. Anti-fuse memory cell
US9123572B2 (en) 2004-05-06 2015-09-01 Sidense Corporation Anti-fuse memory cell
US7402855B2 (en) * 2004-05-06 2008-07-22 Sidense Corp. Split-channel antifuse array architecture
US7164290B2 (en) 2004-06-10 2007-01-16 Klp International, Ltd. Field programmable gate array logic unit and its cluster
US7135886B2 (en) 2004-09-20 2006-11-14 Klp International, Ltd. Field programmable gate arrays using both volatile and nonvolatile memory cell properties and their control
US7099189B1 (en) * 2004-10-05 2006-08-29 Actel Corporation SRAM cell controlled by non-volatile memory cell
US7193436B2 (en) * 2005-04-18 2007-03-20 Klp International Ltd. Fast processing path using field programmable gate array logic units
US7368789B1 (en) 2005-06-13 2008-05-06 Actel Corporation Non-volatile programmable memory cell and array for programmable logic array
US7768056B1 (en) * 2005-06-13 2010-08-03 Actel Corporation Isolated-nitride-region non-volatile memory cell and fabrication method
US7538379B1 (en) 2005-06-15 2009-05-26 Actel Corporation Non-volatile two-transistor programmable logic cell and array layout
US7285818B2 (en) * 2005-06-15 2007-10-23 Actel Corporation Non-volatile two-transistor programmable logic cell and array layout
WO2008057371A2 (en) * 2006-11-01 2008-05-15 Gumbo Logic, Inc Trap-charge non-volatile switch connector for programmable logic
US7719895B2 (en) * 2007-03-05 2010-05-18 Gtronix, Inc. Always-evaluated zero standby-current programmable non-volatile memory
US7859240B1 (en) 2007-05-22 2010-12-28 Cypress Semiconductor Corporation Circuit and method for preventing reverse current flow into a voltage regulator from an output thereof
US7835179B1 (en) 2007-09-20 2010-11-16 Venkatraman Prabhakar Non-volatile latch with low voltage operation
US7816947B1 (en) * 2008-03-31 2010-10-19 Man Wang Method and apparatus for providing a non-volatile programmable transistor
US7839681B2 (en) * 2008-12-12 2010-11-23 Actel Corporation Push-pull FPGA cell
US7929345B2 (en) * 2008-12-23 2011-04-19 Actel Corporation Push-pull memory cell configured for simultaneous programming of n-channel and p-channel non-volatile transistors
US8120955B2 (en) * 2009-02-13 2012-02-21 Actel Corporation Array and control method for flash based FPGA cell
US8269204B2 (en) 2009-07-02 2012-09-18 Actel Corporation Back to back resistive random access memory cells
US8958245B2 (en) 2010-06-17 2015-02-17 Ememory Technology Inc. Logic-based multiple time programming memory cell compatible with generic CMOS processes
US9042174B2 (en) 2010-06-17 2015-05-26 Ememory Technology Inc. Non-volatile memory cell
US8355282B2 (en) * 2010-06-17 2013-01-15 Ememory Technology Inc. Logic-based multiple time programming memory cell
JP2013114729A (en) 2011-11-30 2013-06-10 Toshiba Corp Nonvolatile programmable switch
KR102420014B1 (en) 2015-09-18 2022-07-12 삼성전자주식회사 Non-volatile inverter
US10270451B2 (en) 2015-12-17 2019-04-23 Microsemi SoC Corporation Low leakage ReRAM FPGA configuration cell
US10147485B2 (en) 2016-09-29 2018-12-04 Microsemi Soc Corp. Circuits and methods for preventing over-programming of ReRAM-based memory cells
CN110036484B (en) 2016-12-09 2021-04-30 美高森美SoC公司 Resistive random access memory cell
TWI824467B (en) 2016-12-14 2023-12-01 成真股份有限公司 Logic drive based on standard commodity fpga ic chips
US11625523B2 (en) 2016-12-14 2023-04-11 iCometrue Company Ltd. Logic drive based on standard commodity FPGA IC chips
US10447274B2 (en) 2017-07-11 2019-10-15 iCometrue Company Ltd. Logic drive based on standard commodity FPGA IC chips using non-volatile memory cells
US10957679B2 (en) 2017-08-08 2021-03-23 iCometrue Company Ltd. Logic drive based on standardized commodity programmable logic semiconductor IC chips
US10522224B2 (en) 2017-08-11 2019-12-31 Microsemi Soc Corp. Circuitry and methods for programming resistive random access memory devices
US10630296B2 (en) 2017-09-12 2020-04-21 iCometrue Company Ltd. Logic drive with brain-like elasticity and integrality based on standard commodity FPGA IC chips using non-volatile memory cells
US10608642B2 (en) 2018-02-01 2020-03-31 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips comprising non-volatile radom access memory cells
US10623000B2 (en) 2018-02-14 2020-04-14 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips
US10608638B2 (en) 2018-05-24 2020-03-31 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips
US10892011B2 (en) 2018-09-11 2021-01-12 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
US11309334B2 (en) 2018-09-11 2022-04-19 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
US10937762B2 (en) 2018-10-04 2021-03-02 iCometrue Company Ltd. Logic drive based on multichip package using interconnection bridge
US11616046B2 (en) 2018-11-02 2023-03-28 iCometrue Company Ltd. Logic drive based on chip scale package comprising standardized commodity programmable logic IC chip and memory IC chip
US11211334B2 (en) 2018-11-18 2021-12-28 iCometrue Company Ltd. Logic drive based on chip scale package comprising standardized commodity programmable logic IC chip and memory IC chip
US10985154B2 (en) 2019-07-02 2021-04-20 iCometrue Company Ltd. Logic drive based on multichip package comprising standard commodity FPGA IC chip with cryptography circuits
US11227838B2 (en) 2019-07-02 2022-01-18 iCometrue Company Ltd. Logic drive based on multichip package comprising standard commodity FPGA IC chip with cooperating or supporting circuits
US11887930B2 (en) 2019-08-05 2024-01-30 iCometrue Company Ltd. Vertical interconnect elevator based on through silicon vias
US11637056B2 (en) 2019-09-20 2023-04-25 iCometrue Company Ltd. 3D chip package based on through-silicon-via interconnection elevator
US11600526B2 (en) 2020-01-22 2023-03-07 iCometrue Company Ltd. Chip package based on through-silicon-via connector and silicon interconnection bridge

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0053878A2 (en) * 1980-12-08 1982-06-16 Kabushiki Kaisha Toshiba Semiconductor memory device
US4829203A (en) * 1988-04-20 1989-05-09 Texas Instruments Incorporated Integrated programmable bit circuit with minimal power requirement
US4885719A (en) * 1987-08-19 1989-12-05 Ict International Cmos Technology, Inc. Improved logic cell array using CMOS E2 PROM cells
EP0515039A2 (en) * 1991-05-10 1992-11-25 Altera Corporation A complementary low power non-volatile reconfigurable eecell

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4375086A (en) * 1980-05-15 1983-02-22 Ncr Corporation Volatile/non-volatile dynamic RAM system
US4495427A (en) * 1980-12-05 1985-01-22 Rca Corporation Programmable logic gates and networks
JPS59111370A (en) * 1982-12-16 1984-06-27 Seiko Instr & Electronics Ltd Nonvolatile semiconductor memory
US4617479B1 (en) * 1984-05-03 1993-09-21 Altera Semiconductor Corp. Programmable logic array device using eprom technology
US4742492A (en) * 1985-09-27 1988-05-03 Texas Instruments Incorporated EEPROM memory cell having improved breakdown characteristics and driving circuitry therefor
JPS63211767A (en) * 1987-02-27 1988-09-02 Toshiba Corp Semiconductor storage device
US4851361A (en) * 1988-02-04 1989-07-25 Atmel Corporation Fabrication process for EEPROMS with high voltage transistors
US4822753A (en) * 1988-05-09 1989-04-18 Motorola, Inc. Method for making a w/tin contact
US5343063A (en) * 1990-12-18 1994-08-30 Sundisk Corporation Dense vertical programmable read only memory cell structure and processes for making them
US5247478A (en) * 1992-03-06 1993-09-21 Altera Corporation Programmable transfer-devices
US5424985A (en) * 1993-06-30 1995-06-13 Sgs-Thomson Microelectronics, Inc. Compensating delay element for clock generation in a memory device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0053878A2 (en) * 1980-12-08 1982-06-16 Kabushiki Kaisha Toshiba Semiconductor memory device
US4885719A (en) * 1987-08-19 1989-12-05 Ict International Cmos Technology, Inc. Improved logic cell array using CMOS E2 PROM cells
US4829203A (en) * 1988-04-20 1989-05-09 Texas Instruments Incorporated Integrated programmable bit circuit with minimal power requirement
EP0515039A2 (en) * 1991-05-10 1992-11-25 Altera Corporation A complementary low power non-volatile reconfigurable eecell

Also Published As

Publication number Publication date
US5587603A (en) 1996-12-24
JPH10510124A (en) 1998-09-29
EP0801844A2 (en) 1997-10-22
WO1996021273A2 (en) 1996-07-11
CA2198359A1 (en) 1996-07-11

Similar Documents

Publication Publication Date Title
WO1996021273A3 (en) Two-transistor zero-power electrically-alterable non-volatile latch
US6137723A (en) Memory device having erasable Frohmann-Bentchkowsky EPROM cells that use a well-to-floating gate coupled voltage during erasure
US6044017A (en) Flash memory device
US5245570A (en) Floating gate non-volatile memory blocks and select transistors
TW286406B (en) Non-volatile electrically erasable memory with PMOS transistor NAND gate structure
US4368524A (en) Semiconductor device
US4866307A (en) Integrated programmable bit circuit using single-level poly construction
TW287321B (en) A PMOS flash memory cell with hot electron injection programming and tunnelling erasing
IT9021321A1 (en) DEVICE TO OBTAIN THE CANCELLATION OF BLOCKS IN A FLASH TYPE ELECTRICALLY PROGRAMMABLE READ ONLY (EPROM) MEMORY
TW285777B (en) PMOS flash EEPROM cell with single poly
KR930003154A (en) Nonvolatile Semiconductor Memory
TW363229B (en) PMOS single-poly non-volatile memory structure
ATE196036T1 (en) NON-VOLATILE PMOS MEMORY DEVICE WITH A SINGLE POLYSILICON LAYER
US5848013A (en) Row decoding circuit for semiconductor non-volatile electrically programmable memory and corresponding method
KR940022564A (en) Nonvolatile Semiconductor Memory Eliminates Insulation Strength Requirements
KR910008732A (en) EEPROM Cell with Three Transistors
KR960702157A (en) Semiconductor devices
ES2174480T3 (en) MEMORY OF SEMICONDUCTORS WITH MEMORY CELLS OF TWO NON-VOLATILE TRANSISTORS.
US6130840A (en) Memory cell having an erasable Frohmann-Bentchkowsky memory transistor
EP0302779B1 (en) Non-volatile shadow storage cell with improved level shifting circuit and reduced tunnel device count for improved reliability
US4858186A (en) A circuit for providing a load for the charging of an EPROM cell
JPS5534348A (en) Semiconductor memory device
GB2349275A (en) Eeprom cell with tunneling across entire separated channels
JPS56103536A (en) Mis output circuit
KR970003255A (en) Nonvolatile memory device

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): CA JP

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): AT BE CH DE DK ES FR GB GR IE IT LU MC NL PT SE

AK Designated states

Kind code of ref document: A3

Designated state(s): CA JP

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): AT BE CH DE DK ES FR GB GR IE IT LU MC NL PT SE

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
WWE Wipo information: entry into national phase

Ref document number: 1996907003

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 2198359

Country of ref document: CA

WWP Wipo information: published in national office

Ref document number: 1996907003

Country of ref document: EP

WWW Wipo information: withdrawn in national office

Ref document number: 1996907003

Country of ref document: EP