WO1996023308A1 - Improvements in an apparatus and method of use of radiofrequency identification tags - Google Patents
Improvements in an apparatus and method of use of radiofrequency identification tags Download PDFInfo
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- WO1996023308A1 WO1996023308A1 PCT/US1996/000853 US9600853W WO9623308A1 WO 1996023308 A1 WO1996023308 A1 WO 1996023308A1 US 9600853 W US9600853 W US 9600853W WO 9623308 A1 WO9623308 A1 WO 9623308A1
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- rfid tag
- remote
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/18—Auxiliary circuits, e.g. for writing into memory
Definitions
- the invention relates to radiofrequency identification devices used to tag or identify objects, and in particular to radiofrequency identification devices that may be transiently programmed, remotely self-calibrated for synchronization, remotely powered during data communication, and implemented using a high frequency isolated monolithic rectifier.
- a radiofrequency identification device or tag (hereinafter referred to throughout this specification as an "RFID tag”) is a device which can be attached or associated with another object, which the RFID tag is then used to identify when queried remotely by an interrogating circuit.
- the RFID tag is thus preprogrammed, or programmable after association with the object to return a signal to the interrogating circuit to provide selected information concerning the attached object which is within the zone of the interrogating circuit. More simply, a small electronic tag is attached to an object and the tag is read by a reader. New data can be added to the tag by a programmer, and the data received from the tag can either be read from a display screen, stored or later down-loaded to a personal computer, or linked directly to a computer system.
- RFID tags have an advantage over bar codes and bar code readers which perform similar functions in that the RFID tag may be imbedded within the object and still be read as long as the interlying material between the RFID tag and the reader is not conductive. Therefore, line of sight is not required for an RFID tag, which is required in any type of bar code reader. This allows the RFID tag to function in very difficult environments. Further, the RFID tag has the capacity for having digital data being added after it is attached to the object, has a greater data capacity and can be read at distances far greater than those achievable through optical bar code readers. To date, the cost of RFID tags, however, has limited the market penetration of the device because of the high cost associated with such RFID tags.
- U.S. Patent 5,117,756 (1992) adjusts an internal oscillator by comparing its output to a control signal.
- a precision calibration pulse is applied to the timing circuit which counts the output cycles of a variable frequency oscillator during the period of the pulse. This count is stored and compared to the reference count to produce an error count. The error count is combined with a previously stored control signal to produce a new control signal that drives the output of the oscillator to a new frequency.
- Goffin 's calibration circuit is used for a calibrated time delay circuit for delayed ignition of explosive products.
- the application is to minimize the effects of rock blasting on nearby structures by reducing peak-to-peak amplitude of frequency of ground vibration produced by the blast by timing the ignition of the plurality of explosive charges.
- Goffin achieves this with an onboard calibration pulse derived from a time reference and then calibrates the detonation timing circuitry to it in order to compensate for fluctuations, ambient temperature, humidity and pressure that may cause a variation in the local oscillator rate.
- Goffin is not concerned with a remote communication circuit, but rather with calibration of a plurality of detonator circuits with each other, all connected by hard wiring.
- 2,501,883 (1950) also generally describes a circuit which adjusts an internal oscillator by comparing its output to a control signal.
- Weaver's object is to provide a local beat frequency and proper frequency relationship to a carrier.
- Weaver seeks to keep a local oscillator adjusted to generate a wave having substantially the same frequency relationship to the received carrier as existed before a carrier fade commenced. Weaver achieves this by combining a wave derived from the received carrier with a locally generated reference wave to produce a controlling voltage whose magnitude and polarity are determined by the vector sum or difference of the combined waves.
- a reactance tube is connected to control the frequency generated by the oscillator.
- the grid of the reactance tube is coupled to two biasing circuits, which are in turn driven by the controlling voltage.
- Information transmitted to an RFID tag is decoded either by detecting the variation in the amplitude (AM) or frequency or equivalently the phase shift or time delay (FM) of the earner signal, depending upon the communication protocol which has been chosen as the standard. Changes in the amplitude of the carrier signal are economically detected by conventional RFID tag receivers, but are susceptible to noise interference. In the transmission of digital information, the loss of just a single bit of data can, if inappropriate, cause catastrophic consequences.
- AM amplitude
- FM phase shift or time delay
- Detection of a change of frequency is less susceptible to noise interference but requires that the RFID tag receiver be capable of detecting changes in the carrier signal as against a calibrated standard.
- R-FID tag receivers typically rely on some type of internally tuned circuit to compare the incoming signal to the standard in order to detect the frequency variation.
- the RFID tag receiver is depended upon the incoming carrier signal as a reference itself, as is almost always the case with R-FID tags, it is inherently impossible to detect changes in the incoming signal using standard FM techniques.
- Bit and Frame Synchronization It is further well known that in every communication protocol some means is required to determine which bit is the first data bit in a digital data transmission. This determination process becomes more difficult in wireless devices. Since the transmitting device may be at the extreme end of an operating range, noise and signal dropout make reliable detection of digital data difficult, as well as validation of synchronization at both the bit and data frame levels.
- Wireless devices typically move into and out of range quickly. Therefore, it is an advantage if the bit synchronization is achieved in a minimum of time so that the wireless device can start looking for the frame synchronization as soon as possible. Typically, the ability of the wireless device to do this makes a critical difference in whether the communication is successful or not.
- a violation of the "normal" data protocol is used to identify the beginning of a data frame.
- Milheiser, U.S. Patent 4,730,188 teaches that using Manchester encoding defines a protocol that has a change of state every bit time.
- the data frame includes a frame marker which contains a preamble with a specific bit pattern followed by a violation of the Manchester bit timing protocol in which the rate of change of state is decreased to 1 1/2 bit times for 3 bit intervals, followed by the identification of the data in which the bit rate is restored.
- This type of bit synchronization is usable in Milheiser s application where the tag transmits to a reader, but the RFD) tag does not receive coded data. Even in Milheiser's application, some disadvantages exist.
- phase lock loop Since Milheiser must first achieve bit synchronization, the use of phase lock loop is necessary, which uses feedback of a received frequency transition to adjust a rate to become synchronized. If the protocol violation occurs at that moment in time, the phase lock loop will attempt to synchronize to a rate 1/3 lower. The result is that the bit synchronization is delayed in a frame which could have been read but is not.
- a unique data value is assigned as a frame marker, which unique value is then prohibited from being used as a data pattern.
- This approach allows for all or any part of the data frame to be used for a bit synchronization.
- the unique data pattern must not be a pattern which the user would ever want to use in the data since it is prohibited to prevent ambiguity. If the unique data pattern is required, an alias is created which is then translated back to the prohibited value at a later time. This alias creation and retranslation is an awkward solution in most applications.
- Lee looks for repetitive parity violation on a periodic basis in order to establish timing.
- the drawback is in cases where there is signal fade which is common with RFID tag devices, an insufficient number of synchronization parity violations may have been received in order to reliably establish the pattern, or that the pattern may be unreliably transmitted thereby leading to substantial errors in synchronization.
- R-FID systems transmit a carrier signal and then divide down the carrier frequency on the tag to use the signal as an internal clock.
- the information stored on the tag is then sequentially transmitted from the tag.
- a tag which operates in this manner is a read-only tag.
- the information in the tag must be entered during the manufacturing of the tag by making direct electrical contact to external connectors, or by having a battery or charged capacitor physically connected to the tag.
- Remote programming or wireless programming without any physical contact to the tag being made can only be accomplished if power and information are both supplied simultaneously to the tag. Programming the tag requires substantially more power than simply reading the tag.
- Prior art methods for remote programming rely on AM modulating the signal or FM modulating the frequency to communicate with the tag. Again AM is susceptible to interference through noise and FM requires significant sensing or detection circuitry to be built within the tag.
- the transmitted coded digital instruction is composed of a sequence of synchronization pulses having a predetermined period and data pulses which are inserted between the successive synchronization pulses at predetermined positions dependent upon whether data pulses represent a 0 or 1 bit.
- the receiving circuit distinguishes between the 0 and 1 bits by detecting the length of the interval between the leading edge of a synchronization pulse and the leading edge of an adjacent data pulse and determines the existence of noise, if more than one data pulse is detected between successive synchronization pulses.
- each data word which is sent is constant regardless of the numbers of l's and 0's in the word so that the detection of more than one data pulse between successive synchronization pulses of a constant period is interpreted as being noise.
- Kobayashi thus uses pulse delay in order to distinguish between binary 0's and l's from a periodic timing pulse.
- Stobbe et al. "Portable Field-Programmable Detection Microchip, " U.S. Patent 5,218,343 (1993), shows a system for transmitting both power and information to a remote circuit using external charging capacitors, an internal oscillator, an AM signal from the chip, and a period variation to distinguish between binary 0's and l's.
- the RFID tag chip in Stobbe is provided with a charging capacitor capable of storing electrical energy from the RF signal so that the microchip in the tag can be powered during pulse pauses of the RF signal.
- the microchip includes a memory circuit for storing the identification code of the microchip in a code generator that is coupled to the memory circuit for generating an RF signal that is modulated with the identification data.
- a switching element detunes a resonant circuit in the microchip when the identification data is transmitted back to the read/write device.
- the resonant circuit serves to field program the memory circuit of the microchip and the tag by receiving pulse/pause modulation signals (PPM) of the RF carrier signal to allow the identification code of the tag to be altered.
- PPM pulse/pause modulation signals
- Stobbe describes a mixing of commands and data by AM modulation.
- the carrier signals are rectified through the use of on-chip transistors which are typically slow, there being no need for fast response times.
- a conventional full wave bridge rectifier using 4 diodes as depicted in Figure 9 is typically not used in an RFID tag because the parasitic junctions formed in a conventional monolithic integrated circuit, by which such a diode bridge would be made, cause the structure to be inoperable in the application of an RFID tag.
- Figure 10 is a cross section of a typical integrated circuit layout for a rectifier bridge as shown in Figure 9. Junctions 86 in the circuitry of Figure 10 become forward biased when applying an AC signal on contacts 88 and 90 corresponding to the same junctions referenced in the schematic of Figure 9.
- MOS transistors must be scaled in order to operate at such speeds or a high speed bipolar device such as using a biCMOS process. Both types of transistor technology require a much higher cost to manufacture and the parasitic capacitance in such devices have a substantially greater effect as the frequency of operation is increased.
- the invention is a method of programming a radiofrequency identification device comprising providing an antifuse in a memory cell coupled to a bit line in the radiofrequency identification device.
- a stray capacitance on the bit line is charged.
- the stray capacitance is selectively discharged through the antifuse to draw a high peak current from the charged stray capacitance to program the antifuse.
- the antifuse is programmed at high speed and low power.
- Charging the stray capacitance comprises charging the capacitance to a voltage exceeding the antifuse programming voltage. Typically charging the stray capacitance on the bit line charges the capacitance with approximately 60 to 100 microwatts of power or less.
- the selective discharging of the antifuse is performed in one embodiment by coupling the antifuse through a gated transistor to ground.
- the gated transistor has a maximum saturation current capacity.
- the antifuse has a programming time defined for a predetermined time duration.
- the stray capacitance on the bit line is charged to a power level such that the saturation current is achieved through the antifuse and transistor during the programming time of the antifuse.
- the invention is a method of programming an antifuse having a minimum programming time at high speed and low power comprising charging a bit line coupled to the antifuse to a predetermined voltage and thus stored predetermined power level.
- the bit line has a chargeable capacitance.
- the bit line is discharged through the antifuse at high speed substantially equal to the minimum programming time required by the antifuse to generate a voltage and current spike through the antifuse sufficient to program the antifuse while utilizing low average power.
- the invention is also a method for self-calibrating remote RFID tag circuitry comprising receiving an external signal having a characterizing parameter and receiving an internal signal having the chara ⁇ erizing parameter.
- the characterizing parameters of the external and internal signals are compared.
- An error signal indicative of the difference in the characterizing parameters in the compared external and internal signals is generated.
- a correction signal is generated which when applied to the remote circuit compensates the internal signal to allow for calibration to the external signal.
- Generating the correction signal comprises generating an oscillator correction signal to adjust the internal signal to within a predetermined tolerance of the external signal.
- generating the compensation signal comprises generating a correction factor for use in operation of the remote RFID tag circuit where the error in the characteristic parameter between the external and internal signals remains substantially constant during times of operational interest of the remote RFID tag circuit.
- the invention includes a method wherein operational characteristics of the remote RFID tag circuit change over time periods greater than those time periods of operational interest of the remote RFID tag circuit.
- the method further comprises repeating the steps of receiving the external/internal signals, comparing the characteristic parameters, generating an error signal and generating a correction signal to update the compensation signal as the e ⁇ or signal changes slowly over time.
- generating the correction signal comprises generating a signal to select a compensating RC time constant to be coupled to the oscillator.
- the invention is also defined as an apparatus for self-calibrating a remote RFID tag circuit comprising a comparator coupled to an external signal and an internal signal which is to be calibrated with respect to the external signal.
- the comparator generates an error signal indicative of the difference in a characteristic parameter of the external and internal signals.
- a processing circuit is coupled to the comparator and is responsive to the error signal to generate a compensation signal which when applied to the remote RFID tag circuit allows for calibration of the internal signal from the remote R-FID tag circuit to be calibrated to the external signal received by the remote circuit.
- the remote RFID tag circuit is provided with reliable economic calibration for communication.
- the apparatus further comprises a memory coupled to the processing circuit for storing the compensation signal to maintain calibration of the remote RFID tag circuit.
- the apparatus further comprises a oscillator in the remote circuit for generating the internal signal and an RC network having a plurality of selectable RC values.
- the compensation signal from the processing circuit selects one of the RC values for coupling to the oscillator in order to maintain a characteristic parameter of the internal signal calibrated within a predetermined tolerance to the external signal.
- the compensation signal generated by the processing circuit is a correction factor indicative of the error between the internal and external signals.
- the correction factor is applied by the processing circuit to operations within the remote RFID tag circuit for maintaining reliable calibration to the external signal.
- the correction signal is proportional to the ratio between the characteristic parameter for the external signal and the internal signal.
- the invention is further defined as a method for providing data communication synchronization comprising checking a communication data stream having a predetermined error correction protocol for an unique data bit pattern, and detennining whether the unique data pattern also violates the error checking protocol. The timing of the unique data pattern is used as a synchronization signal if the error checking protocol is violated. As a result, bit and frame synchronization is achieved anywhere within the data bit stream.
- the unique pattern is a unique pattern which is typical of data normally received. In the illustrated embodiment determining whether an error corre ⁇ ion violation has occurred is a determination of whether a parity error violation has occurred.
- the data stream is organized into words and the unique data pattern comprises at least one word subject to the error corre ⁇ ion protocol.
- the word has a bit length at least equal to a predetermined minimum so that the probability of creating in a normal data stream the unique pattern with error corre ⁇ ion violation is less than a predetermined acceptable minimum.
- the invention is an apparatus for providing a synchronization marker comprising an error correction circuit for receiving a data signal stream.
- a decoder checks the data signal stream for a unique pattern and simultaneous parity error violation.
- the decoder is coupled to the error corre ⁇ ion circuit and disables the error correction output in the event of simultaneous detection of the unique data pattern and error corre ⁇ ion violation to generate a synchronization signal.
- the error corre ⁇ ion circuit is a parity checker.
- the invention is a method of simultaneously powering and communicating data to a wireless remote RFID tag circuit comprising transmitting a carrier signal to the circuit for providing power to the circuit.
- the carrier signal is modulated to reduced levels using pulse widths equal to or less than a predetermined maximum.
- the predetermined maximum is determined by the longest duration for which the carrier signal may be turned off before the remote RFID tag circuit loses stored power to a degree sufficient to make operation of the remote RFID tag circuit unreliable.
- the carrier signal is modulated by pulses having at least two distinguishable pulse widths. The pulse widths are correlated with transmitted information to the remote R-FID tag circuit.
- the carrier signal is modulated by at least three pulses of different pulse widths to communicate binary data and control signals.
- the modulation is at a frequency substantially less than the carrier signal so that the remote circuit is operated at the reduced frequency at lower power.
- the carrier signal is modulated with a duty cycle at or less than a predetermined maximum as determined by the minimum duty cycle by which the remote R-FID tag circuit will still reliably operate.
- the invention is further an improvement in a diode re ⁇ ifier having a plurality of diodes in an RFID tag comprising an insulating material disposed beneath and between each the diode in the rectifier to electrically isolate each diode from each other diode within the re ⁇ ifier to prevent forward biasing of any of the diode junctions at high frequencies.
- the insulating layer comprises an insulating substrate upon which the diode is formed.
- the substrate is sapphire and the diode is formed by a silicon-on-sapphire process.
- the insulating layer is a silicon substrate surface of an integrated circuit having an overlying oxide layer, and the diode is a stacked diode disposed on the oxide layer.
- the stacked diode is preferably a Schottky diode operable at high frequency carrier signals at which the RFID tag is operated.
- Figure 1 is an idealized schematic of a memory cell in which an antifuse is used and programmed in an RFID tag.
- Figure 2 is a timing diagram of the programming method of the invention used in the memory cell of Figure 1.
- Figure 3 is a schematic of a power of a self-calibrating circuit for an RFID tag.
- Figure 4 is a flow diagram illustrating the operation of another embodiment of the invention where the circuit self-calibrates to a carrier signal.
- Figure 5 is a block diagram of a circuit wherein the method of Figure 4 is used.
- Figure 6 is a block diagram of a circuit where a bit and frame synchronization of the invention is used.
- Figure 7 is a wave diagram showing data transmission on a power carrier signal.
- Figure 8 is a wave diagram of an alternative embodiment showing data and control signal transmission on a power carrier signal.
- Figure 9 is a schematic of a conventional full wave bridge re ⁇ ifier.
- Figure 10 is a cross-sectional view of a conventional integrated circuit wherein the bridge circuit of Figure 9 is implemented.
- Figure 11 is a cross-sectional view of a integrated circuit SOS diode for use in the bridge circuit of Figure 9 in an RFID tag.
- Figure 12 is a cross-sectional view of a integrated circuit stacked diode for use in the bridge circuit of Figure 9 in an RFID tag.
- programming of RFID tags was typically implemented through optically (ultraviolet) and electrically erasable programmable technologies that require a voltage or current pulse of a certain value for a specified period to be applied to the RFID tag.
- an optically erasable device must have a minimum of 10 volts applied to the device while supplying a current of the order of 0.5 milliamps for at least 1 millisecond.
- the voltage requirement is typically a minimum of 15 volts for at least 1 millisecond, although current requirements may reach as low as 100 microamps.
- a semiconductor transistor 18 is coupled to antifuse 16 and can be selectively activated to read whether antifuse 16 is in a high or low impedance state, thereby representing a 1 or 0 bit.
- the nodal capacitance of circuit 10 with bit line 14 is represented in the diagram of Figure 1 by an effective stray capacitance 20.
- memory cell 10 is accessed by turning control transistor 18 on by increasing its gate voltage and detecting if current is flowing through bit line 14. If antifuse 16 has not been programmed, and is therefore open circuited or at high impedance, almost no current will flow. If antifuse 16 has been programmed or short circuited or set at very low impedance, a predetermined amount of current will flow through bit line 14.
- bit line 14 is raised to an elevated voltage above the critical voltage required to program antifuse element 16.
- a finite amount of time is required to fully elevate bit line 14 because of the requirement to charge stray capacitance 20.
- This charging time is a fim ⁇ ion of the amount of current being supplied to bit line 14 and amount of stray capacitance 20 associated with bit line 14.
- antifuse 16 has a programming level of 4 volts.
- Vcc the voltage supply
- the maximum current level through control transistor 18 is 1 milliamp
- stray capacitance 20 is 3 picofarads and that current source 12 is capable of supplying up to 10 microamps.
- control transistor 18 can be turned on and antifuse 16 will try to suppo ⁇ the 6 volts applied to it through the voltage supply.
- the voltage across antifuse 16 will, in fa ⁇ , only reach 4 volts before it collapses.
- the time required to program antifuse 16 is, therefore, practically instantaneous, or at least much less than 10 nanoseconds.
- the ele ⁇ rical behavior as shown in Figure 2 would not be considered a benefit.
- the amount of energy available to the integrated circuit within the RFID tag is very limited.
- the power supplied to an RFID tag is supplied remotely through radiofrequency transmission.
- the amount of power required to read an RFID tag is typically 20 microwatts, usually operating at the level 2 volts and 10 microamps.
- the power supply to an R-FID tag would have to be increased to 60 microwatts, namely 6 volts at 10 microamps.
- the memory device were based upon UN or electrically erasable memories, the power levels would need to be increased to 5,000 to 1,500 microwatts respe ⁇ ively. Even these higher numbers for other technologies are misleading since neither UN nor electrically erasable devices can be programmed with transient pulses, but require well defined sustained voltage pulses.
- a reference signal is generated initially in the remote RFID tag receiver by capturing an incoming standard signal and placing it in temporary or permanent storage in the RFID tag circuit. Signals arriving later in time are then compared to the captured standard. Variations from the captured standard are then d ⁇ e ⁇ ed to allow for decoding of the data by either AM or FM techniques.
- FIG. 3 is a simplified block diagram illustrating one means of implementing the invention.
- An oscillator 34 on the RFID tag chip operates approximately at the carrier frequency of the input signal or some multiple thereof.
- an input signal is provided on line 36 and an appropriate chara ⁇ eristic thereof, such as frequency, phase shift, time delay, or the like, is compared in a comparator circuit 38, which has as its other input, the output of oscillator 34.
- the difference in the chara ⁇ eristic parameter between the two is provided on output 40 of comparator 38 and appropriately converted if necessary to digital format by an analog-to-digital converter.
- a corre ⁇ ion command signal is ultimately provided by means of a microprocessor 42 to a memory 44.
- a microprocessor 42 typically, because of the design of oscillator 34 it cannot perform accurately enough because of large variation components or processing of the integrated circuits or other environmental fa ⁇ ors.
- the corre ⁇ ion signal corresponding to the difference signal is stored within memory 44 and then coupled through a decoder 46 to a plurality of switching devices 48, or a resistance ladder coupled to a single capacitance (not shown), each of which switches 48 are coupled to n RC circuits 50.
- Any device or network capable of sele ⁇ ively providing circuit options to oscillator 34 through which oscillator frequency may be varied can be equivalently substituted.
- Each RC circuit 50 corresponds to a different RC delay, which when coupled through one of the devices 48 to oscillator 34, serves to adjust the output of oscillator 34.
- RC delay circuits 50 are thus chosen by microprocessor 42 until the output of comparator 38 indicates that the appropriate difference signal between input signal on line 36 and that output by oscillator 34 falls within an acceptable range.
- the corre ⁇ ion signal is stored within memory 48 for use during all subsequent operation of the RFID tag or at least until it is updated.
- Memory 44 may be provided as a nonvolatile memory to allow the calibration information to be stored permanently so that reconfiguration of the internal oscillator is not required each time the tag is powered up.
- the operation can be clarified by considering an example.
- An initially sele ⁇ ed resistor of 100 kiloohms and a capacitor of 50 picofarads results in a time constant of 5 microseconds for oscillator 34. Due to process variations, the final resistance might actually be instead 130 kiloohms resulting in an actual time constant of 6.5 microseconds, thereby putting oscillator 34 off frequency.
- the time constant of the internal signal must be reduced in order to match the incoming signal in a one-to-one fashion. Therefore, the resistor coupled to the internal oscillator 34 must be trimmed back to 80 kiloohms in order for the RC time constant for the oscillator to equal 4 microseconds.
- Conventional resistor ladder networks allow such a transition within the accuracy required.
- the internal clock pulses from the RFID tag clock are counted at step 52 during a predetermined number of external clock pulses or at least during some arbitrary time period.
- the number internal clock pulses which were counted are then stored in step 54.
- the ratio of the number of intemal-to-external clock pulses is determined at step 56. This ratio becomes a calibration standard. Thereafter deviations from this ratio can be recognized as meaningful data with no attempt made to actually calibrate the RFID tag clock to the external communication standard, but simply to measure and store what is in effect a recalibration ratio.
- FIG. 5 illustrates a block diagram of one circuit which may be used to implement the methodology of Figure 4.
- the internal RFID tag clock is provided to a first counter 58, while the external input signal or external clock signal is provided to a second counter 60.
- Both counters 58 and 60 count the clock signals received during some predetermined time after which the accumulated count is provided to an address and data bus 62 to which a microprocessor 64 and memory 66 are coupled.
- the calculated and stored ratio is then used as a calibration device for the operation of the RFID tag circuitry symbolically denoted in Figure 5 by reference numeral 68.
- the present invention overcomes the disadvantages of bit and frame synchronization described in the prior art se ⁇ ion above, and lends itself to being implemented in an integrated circuit in a manner which does not contain a phase lock loop or necessarily even a microprocessor.
- a unique bit pattern is provided which is a typical data pattern, rather than being a prohibited or even an atypical data pattern.
- Bit and frame synchronization is achieved by violation of an error management scheme such as an error c and corre ⁇ ing (ECC) scheme which utilizes parity or polynomial bits to achieve frame synchronization.
- ECC error c and corre ⁇ ing
- the use of a typical data pattern provides some assurance that the real data will be correctly recognized.
- the unique pattern is an irregular pattern of l's and 0's with an odd parity bit identifying it as the frame marker followed by data with even parity. Bit synchronization can, thus, be achieved anywhere in the bit stream.
- the unique frame marker pattern is efficiently matched to a stored pattern and validated by odd parity with the marking word and even parity with the following data words.
- the broadcast digital information has embedded within it a combination of bits comprising a unique bit pattern.
- the unique bit pattern may be a data pattern in which a particular error management scheme for the parity bit is chosen contrary to the assumed error convention.
- this unique pattern with a parity error is received, it is recognized as a synchronization frame for all the following data and is not treated as an error.
- the chance that the unique pattern with a parity error will occur is so small that incorrect identification in the unique synchronization frame is extremely improbable.
- the communication system in the R-FID tag will then recognize the word as having a parity error, but as also having the unique frame synchronization data pattern. Therefore, the parity error will be ignored.
- the time of receipt of this word is then taken as a synchronization or frame marker.
- the chance of a data pattern assuming the unique data bit pattern and having a parity error is 1 out of 28, or 256 to 1 assuming as a worse case that there is a 50% chance of a data error.
- the data error rate in most systems is much lower, typically one out of 232 after noting multiple replicate transmissions in most RFID tag applications. For an 8 bit word, this probability is probably not high enough for reliable synchronization.
- FIG. 6 is a simplified block diagram of one circuit in which the synchronization protocol can be implemented.
- the input data stream is coupled on line 70 to a conventional parity checker 72 and to decoder 74 which checks the data stream for the unique bit pattern together with the parity violation.
- decoder 74 disables the output of parity checker 72 by means of gate 78 so that no parity error signal is transmitted to the R-FID tag circuits (not shown), and generates a synchronization pulse on its output 76.
- the carrier frequency can be reduced in amplitude or turned off completely for short periods of time as diagrammatically depi ⁇ ed in Figure 7 without causing the RFID tag to lose power. Since the reduction in carrier signal strength is for such a short period of time, the DC power in the integrated circuit within the tag after rectification does not undergo a significant reduction.
- Figure 7 is a wave diagram of a carrier envelope, showing typical data which might be transmitted at a 33 kilohertz baud rate.
- the circuitry within the RFID tag only has to be able to distinguish between a 0.1 and a 0.5 microsecond pulse to be able to reliably identify whether a 1 or 0 is being transmitted.
- the 0.1 microsecond pulse 80 may be used to represent 0's
- the 0.5 microsecond pulse 82 used to represent binary l's. Error redu ⁇ ion can be accomplished through redundancy or pulse repetition.
- the RFID tag remains fully powered because even though the carrier envelope is essentially turned off by the data transmissions, the pulse width is not so great as to cause the chip to power down at the baud rates that RFID tags normally operate. For example, as shown in Figure 7, at 33 kilohertz baud rate, a pulse is transmitted only once each 7.5 microseconds. This leaves approximately a 98 percent duty cycle which allows the power circuitry within the RFID tag to easily recover the small voltage loss during the longest pulse duration 82 which it sees.
- FIG. 8 An alternative scheme is illustrated in Figure 8.
- three different duration pulses are used to represent a marker, a binary 0 and a binary 1.
- the 0J microsecond pulse 80 represents a binary 0, the 0.5 microsecond pulse 82 a binary 1, and the 0.3 microsecond pulse 84 a synchronization, control signal or other identifying marker. All that is required of the RFID tag circuitry is that it is capable of detecting pulse widths have a 0.2 microsecond difference.
- a diode rectifier is formed according to the invention by isolating the diodes from the integrated circuit substrate to insure that a charge is not inadvertently applied to the diode or other circuitry.
- One means of implementing this is to fabricate the diodes in an integrated circuit process with an inter-element isolation such as silicon on sapphire (SOS) such as shown in cross se ⁇ ional view in Figure 11, or more generally by fabrication by silicon on insulator.
- SOS silicon on sapphire
- the a ⁇ ive device such as diode 104 is completely surrounded by an insulator, namely the substrate insulator 106 and the encapsulating passivating insulator 108.
- Metallic conta ⁇ s 110 and 112 are provided to the N-doped region 114 and P-doped region 116, respe ⁇ ively.
- N type silicon layer 124 is then nested within N+ region 120 and appropriately exposed to a metallic conta ⁇ 26 to form a Schottky diode layer at the interface 128 therebetween.
- the heavily doped contact region 120 is similarly opened and provided with an ele ⁇ rical conta ⁇ 130.
- the Schottky diode of Figure 12 could equivalently be substituted with a P-N jun ⁇ ion diode if desired.
- the Schottky diode is preferred because it is a majority carrier device and does not require as high a quality single crystal silicon as that required by a P-N jun ⁇ ion. Additionally, the Schottky diode is much faster and can easily respond to a high frequency carrier signal which is atypical for the conventional integrated circuit diode bridge discussed above in conne ⁇ ion with Figures 9 and 10.
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- Engineering & Computer Science (AREA)
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Near-Field Transmission Systems (AREA)
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Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960705398A KR970702562A (en) | 1995-01-27 | 1996-01-23 | IMPROVEMENTS IN AN APPARATUS AND METHOD OF USE OF RADIOFREQUENCY IDENTIFICATION TAGS |
DE69620504T DE69620504T2 (en) | 1995-01-27 | 1996-01-23 | APPARATUS AND METHOD FOR USING IDENTIFICATION TAGS FOR RADIO FREQUENCIES |
EP96906185A EP0753193B1 (en) | 1995-01-27 | 1996-01-23 | Improvements in an apparatus and method of use of radiofrequency identification tags |
JP8522963A JPH10512993A (en) | 1995-01-27 | 1996-01-23 | Improved apparatus and method for using radio frequency identification tags |
MXPA/A/1996/004356A MXPA96004356A (en) | 1995-01-27 | 1996-09-26 | Improvements in an apparatus and method of use of radiofrequency identification tags |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/379,923 | 1995-01-27 | ||
US08/379,923 US5583819A (en) | 1995-01-27 | 1995-01-27 | Apparatus and method of use of radiofrequency identification tags |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1996023308A1 true WO1996023308A1 (en) | 1996-08-01 |
Family
ID=23499250
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1996/000853 WO1996023308A1 (en) | 1995-01-27 | 1996-01-23 | Improvements in an apparatus and method of use of radiofrequency identification tags |
Country Status (7)
Country | Link |
---|---|
US (1) | US5583819A (en) |
EP (1) | EP0753193B1 (en) |
JP (1) | JPH10512993A (en) |
KR (1) | KR970702562A (en) |
CA (1) | CA2185901A1 (en) |
DE (1) | DE69620504T2 (en) |
WO (1) | WO1996023308A1 (en) |
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Also Published As
Publication number | Publication date |
---|---|
EP0753193A4 (en) | 1999-12-15 |
CA2185901A1 (en) | 1996-08-01 |
EP0753193B1 (en) | 2002-04-10 |
EP0753193A1 (en) | 1997-01-15 |
DE69620504D1 (en) | 2002-05-16 |
MX9604356A (en) | 1997-12-31 |
DE69620504T2 (en) | 2002-11-07 |
JPH10512993A (en) | 1998-12-08 |
US5583819A (en) | 1996-12-10 |
KR970702562A (en) | 1997-05-13 |
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