WO1997019543A1

WO1997019543A1 - Electronic patching system for telecommunications devices

Info

Publication number: WO1997019543A1
Application number: PCT/US1996/018671
Authority: WO
Original assignee: Voelker Technologies, Inc.
Priority date: 1995-11-24
Filing date: 1996-11-22
Publication date: 1997-05-29
Also published as: US5832071A; AU1079597A

Abstract

An electronic patching system includes circuit boards (39, 41, 42), programming source (38), and backplane bus (43). The input/output circuit board (39) includes input connectors (31) having a plurality of incoming telephone/data lines and transformers/isolators (32). The input/output circuit board (41) includes output connector (34) having a plurality of ports and transformers/isolators (36). The circuit board (41) includes a switching matrix (33) and control circuits (37). The switching matrix (33) is operated by the control circuits (37). The programming source (38) operates the control circuits (37) by using a predetermined algorithm. The backplane bus (43) interconnects the circuit boards (39, 41 and 42). The telephone/data line and connecting line to each telephone device may be checked with test signal tester every time the line is used.

Description

Electronic Patching System for Telecommunications Devices

Background of the Invention

The present invention relates to patching systems that connect^* telephones and other telecommunications equipment to telephone and data lines, and more particularly to an electronic system for achieving this purpose.

Telephone service to businesses and institutions having more than approximately 20 telephones (or other telecommunications devices) involves complex wiring connections. Each office must have the ability to access any network or a plurality of different phone lines having telephone number designations that are switched by the telephone utility central office. Typically, each floor of an office building has at least one "patch closet", a small room which houses a patch board. The patch board generally embodies two sets of jack-type connectors, one set comprising the termination of the telephone and data lines from the utility central office, and the other set of connectors comprising the connections to the telephone sets, facsimile machines, modems, and other communications devices in use in the offices on the respective floor (or portion thereof) of the office building. To join the telephone and data lines to the communications devices, a plurality of patch cables are placed manually, each having one end plugged into a selected one of the first set of connectors and the other end likewise plugged into a selected second connector. Each patch cable associates one telephone or telecommunications device with at least one telephone and data line, so that a caller may reach the desired telephone or telecommunications device by dialing the predetermined telephone number that identifies the associated line.

Although this connection arrangement is simple in concept, the patch board connections may become extremely confusing when a large number of telephone and data lines are connected to a larger number of telephone devices. Most businesses are in a constant state of flux, due to personnel movement such as new hires and layoffs, promotions, and lateral movements among various departments. In addition, new equipment such as computers, facsimile machines, modems, and the like require new connections to telephone and data lines. As a result of these changes, a patch board that may have been arranged initially with a logical layout often becomes a confusing jumble of wires. The tangle of wires presents a daunting labor problem: no individual wants to take responsibility for removing a wire (and breaking a connection that may be vital), but new wires are added to connect new equipment and accommodate personnel movement. Moreover, no manager in an organization wants to accept the budget liability for the many man-hours required to trace patch board connections and restore order to the system. An out-of-control patch board system typically leads to over-purchase of equipment, secuπty problems, and too much time wasted connecting equipment and accommodating personnel movement. The problem is multiplied in organizations that have multiple locations, or multiple floors in a single building. Indeed, patch board problems have become the rule, rather than the exception, in medium to large companies. There is currently no system known in the pnor art for resolving patch board connection problems in telecommunications systems. Summary of the Present Invention

The present invention generally comprises an electronic patching system that replaces existing telephone patching systems and overcomes the problems with such systems. The system includes a first plurality of ports that are connected to the terminations of a plurality of telephone and data lines from the utility central office, and a second plurality of ports that are wired to a plurality of telecommunications devices, such as telephone sets, facsimile machines, modems, and the like. Both pluralities of ports are coupled through transformer/isolator devices to inputs of a controlled switching matrix, which selectively connects each of the telecommunications devices to one or more of the telephone and data lines. The controlled switching matrix is operated by a programmable logic array or the like that directs the matrix to establish and maintain the desired connections between the telephone equipment and the telephone lines, computer network lines, and the like. The switching matrix may include a high voltage switch portion to handle analog telephone instruments. An algorithm for controlling the programmable logic array is created using a personal computer or the like, and stored in memory. The algoπthm preferably compπses a database program that provides a graphical user interface on the personal computer display to indicate the desired connection scheme between the telephone devices and telephone lines and computer networks. The device includes a programming connection such as an Ethernet port, and the personal computer is provided with software to convert the database program to instructions for setting the PLA and operating the switching matπx. Electronic patch connection between telephone devices and telephone lines and computer networks not only eliminates the tangled mass of patch cords found in prior art manually connected patch systems, it also offers new features that greatly improve telephone service in an office or institutional setting. The connection scheme of all telephone devices may be displayed on-screen by the personal computer at any time, so that communications management is relieved of the burden of wire tracing through prior art patch boards. Moreover, the^' connection scheme may be easily altered to accommodate personnel movement, changes in telecommunications devices, and office reconfigurations. In addition, the system may be programmed to change the connection scheme in accordance with a timed schedule, so that changes in connections may be made for business hours and after hours functions, weekend and holiday connection schemes, and the like.

Another significant feature of the electronic patching system is a test function for all switched lines. A line test subroutine may be included in the controller, so that the telephone or data line and connecting line to each telephone device may be checked with a test signal every time the line is used. The line testing hardware includes a test pattern generator that emits a predetermined data pattem, which is then connected to the one conductor of the switched line. The data pattern is received through the other conductor of the switched line and compared to the original test pattern. If the comparison is valid, the telephone connection is completed in accordance with the programmed scheme; otherwise, remedial action may be taken. The testing subroutine requires only a few microseconds to complete, so that the user is unaware of the test. Furthermore, a plurality of programmable patch systems may be controlled from a single personal computer, so that large scale connectivity may be directed from a single source. This feature permits a communications manager of a large organization to maintain a real-time mastery of the telecommunications functions of the organizations.

Brief Description of the Drawing

Figure 1 is a block diagram depiction of a typical prior art patch board arrangement for connecting telephone and data lines to telecommunications devices.

Figure 2 is a functional block diagram of the electronically programmable patching system of the present invention for connecting telephone and data lines to telecommunications devices.

Figure 3 is a biock diagram of the major elements of the electronically programmable patching system of the present invention.

Figure 4 is a block diagram of the programmable control system of the electronic patching system of the present invention.

Figure 5 is a flow chart depicting the prograinming steps for controlling the patching connections through the electronic patching system of the present invention.

Figure 6 is a flow chart depicting the operation of the Ethernet firmware of the present invention.

Figure 7 is a functional block diagram of the line tester feature of the electronically programmable patching system of the present invention. Figure 8 is a flow chart depicting the operation of the line tester feature shown in Figure 7.

Description of the Preferred Embodiment

The present invention generally comprises an electronic patching system for connecting a plurality of telephone and data lines from the utility central office to a plurality of telecommunications devices, such as telephone sets, facsimile machines, modems, and the like.

The present invention is designed to replace and supplant prior art manual patching systems and practice, and depicted in Figure 1. Typically, a pnor art patching system includes a patch board 22 provided with a first set of connector jacks 22 and a second set of connector jacks 24. A plurality of incoming telephone lines and data lines from a telecommunications utility or the like are joined to input connectors 21 , which are connected to respective connector jacks 22 by a standard cable connector interface or the like. Each of the telephone and data lines is labeled by an assigned individual telephone number, and accessed by operation of the telephone utility switch, as is well-known in the pnor art. The connector jacks 24 are also wired through a standard connector interface to output connectors 26, which in turn lead to trunk lines and/or two-wire or four-wire connections to telephone and telecommunications devices.

The most prominent feature of a pnor art patch board system compπses a plurality of patch cables 27, with the ends of each patch cable being manually plugged into and connected between a selected connector 23 and a selected connector 24. Each cable 27 thus associates each telephone line (and its assigned telephone number) with one telecommunications device. It is only the correct placement of each patch cable that enables, e.g., a caller to reach a desired individual by dialing a predetermined telephone number. When the number of patch cables grows large, it is extremely difficult to visually determine the existing connection pattern, and the manual effort required to maintain, modify, trace, and add connections becomes an extraordinarily burdensome task. The ongoing labor costs devoted to such systems is a significant expense, and the complexity of the system causes unnecessary telecommunications equipment purchases and duplication.

With regard to Figure 2, the present invention overcomes the difficulties due to patch wiπng complexity in patch board systems by providing an electronic connection arrangement that eliminates the patch winng entirely. A plurality of incoming telephone lines and data lines from a telecommunications utility are joined to input connectors 31, which in turn are connected to transformers/isolators 32. The devices 32 form an isolation barπer between the external telephone system and the electronic system of the invention. The isolated incoming telephone and data lines are connected to individual ports of a switching matrix 33 such as. but not limited to, a 72 x72 switching matπx.

A plurality of trunk lines and data lines extending to telephone instruments and telecommunications devices in the immediate area of the system are joined to output connectors 34, which are wired to transformers/isolators 36. The devices 36 compnse an isolation barπer between the telephones and telecommunications devices and the electronic system of the invention. The isolated lines from devices 36 are connected to individual ports of the switching matrix 33 The matπx 33 preferably includes an orthogonal layout with a plurality of X ports and a plurality of Y ports. The incoming telephone and data lines are connected to the X ports, the trunk lines and data lines from the telephones and telecommunications devices are connected to the Y ports, and the switching matrix 33 provides the desired connection pattern between the X and Y ports.

The system further includes control circuits 37 that direct the switching matrix 33 to establish the desired connection patterns between the X and Y ports thereof. A programming source 38 operates the control circuits 37. using a predetermined algorithm, and it is extremely significant that the programming source 38 permits establishment of connections, alterations, and additions to the connection pattern without any physical change in any wiring of the system.

A preferred arrangement of the electronic programmable patching system of the invention places the input connectors 31 and the transformers/isolators 32 on an input/output circuit board 39. The output connectors 34 and transformers/isolators 36 are placed on another input/output circuit board 42, and the control circuits 37 and switching matrix 33 may be placed on a mother/port circuit board 41. The circuit boards 39, 41, and 42 may be interconnected by a backplane bus 43. as is well-known in the prior art.

The broad concept of the invention is further defined in Figure 3. The electronic patching system 46 described above includes the switching matrix 33, and the connections to the telephone and data lines of the telephone utility, and to the telecommunications devices in the local area surrounding the system 46. The control circuits 37 generally include an Ethernet port 47 (or any equivalent data transfer network), which is connected to an Ethernet controller 48. The system 46 also includes firmware 49 connected to d e Ethernet port 47 and to the switching matrix 33, and a static RAM 51, also connected to the switching matπx 33.

Another significant aspect of the invention is that the programming source 38 may preferably comprise a personal computer 52, such as, but not limited to. a computer running an MS-DOS, Macintosh, UNIX, or other standard operating system. The listing of the connection relationships between each X and Y port of the switching matrix 33 is created in a database program 53 available in the prior art. such as FileMaker Pro or the like, which provides a graphical user interface to facilitate easy input and alteration of connection data. The database document is translated by a converter 54 into an instruction set for the electronic patching system 46, and transmitted thereto through line 56 extending to the Ethernet port 47 thereof. The converter 54 preferably comprises a software routine stored in the personal computer 52. The software routine is considered a portion of the present invention. A hardware converter is also a feasible option.

Thus, die operation of the system as depicted in Figure 3 involves initially connecting the electronic patching system 46 to the telephone lines (and data lines) from the telephone utility, and trunk lines (and data lines) of an office, institution, or other establishment. The communications manager of the establishment then uses the personal computer 52 to run the database program 53 and set forth the desired connection pattern between the telephone lines and data lines and the telephone instruments and telecommunications devices. The database document is translated by converter 54 to an instruction set and downloaded through line 56 and the Ethernet port 47 to the electronic patching system 46. The downloaded instruction set is stored in RAM 51, and fed into the switching matrix 33 to establish die desired connection pattern.

It is significant to note that the connection pattern is not subject to alteration by the telephone utility switching system, or any other external factor or element. The connection pattern thus established remains in effect unless and until a new instruction set is created by the personal computer 52 and downloaded to the system 46. This programming link is preferably secured by password protection or encoding of vanous forms known in the pnor art, and such secuπty may permit the authoπzed use of more than one computer 52 to accomplish the programming With regard to Figure 4, the firmware 49 of the system 46 generally compπses a programmable logic array (PLA) 61, such as a fully programmable gate array (FPGA) presently available commercially. A power-up/reset PROM 62 is connected to the PLA 61 to provide initial instructions on power-up that condition the PLA to accept further downloaded instructions The PLA 61 further includes an input connection 63 for programming, which is obtained through Ethernet port 47, and the PLA 61 is also connected directly to the Ethernet controller 48.

The firmware 49 further includes a high voltage switching matnx 64 which is dπven by the PLA 61 The high voltage switching matπx 64 is connected to analog telephone devices, modems, other and telecommunications devices, so that the high voltages that are typically earned on those lines are isolated from the lower voltages of digital lines. A first-in, first -out (FIFO) RAM 68 is connected through a programming bus 69 to the Ethernet controller 48. and it is also connected through a control line 71 to the PLA 61 Also, the PLA 61 includes an output control line 66 to the mput/output port card, and line 67 to send switch addresses to the matπx 33.

The flow diagram for programming the system is charted generally m Figure 5 Initially, in step 72 data is sent to the Ethernet controller 48 When the controller 48 is tπggered, programming instructions are sent to the FIFO RAM 68. The data is loaded and stored in FIFO RAM 68 until all data has been received. At that point, the PLA directs the data from the RAM 68 to be transmitted senally to the switching matrix to program the switches and establish the desired connection pattern between the telecommunications devices and the telephone and data lines

The flow diagram for operation of the firmware is charted generally in Figure 6 A receive data state is set up when the Ethernet controller 48 is readied by loading address data from the PROM 62 through the PLA 61 to the controller. Programming data from hne 63 is then moved through the PLA 61 into the FIFO RAM 68 The RAM 68 stores the data as 8 bit words which are loaded and counted as stored. These words contain the binary switch settings for each switch When the last data word is received, the word count equals a preset number, and the FIFO RAM is actuated to transmit each word serially to the switch matnx. As each word is read the proper switch is set/reset until ail of the words have been read and ti us all the switches have been addressed. The data does not contain addresses of switches. Rather, the switch addresses are stored in a predetermined sequence in PLA 61. and are read out individually, each associated wit the related sequentially read setting word from the FIFO RAM 68 This process continues until ail words are read, and the routine ends.

All switches in the switch matπx are registered, so that the switch settings are fixed until it is reset or power is lost. Thus the connection pattern that is established by the downloaded instruction set is maintained without any further action by the system. However, a plurality of instruction sets may be written and stored, and downloaded in accordance with a fixed schedule to accommodate differing configurations of telephone connections that are optimized e g . for office hours, non-business hours, weekend and holiday operation, and the like Furthermore, if power is lost and the extant switch settings are lost, the system may be restored by downloading the instruction set that is appropnate for the day and time, and die desired connection pattern may be re-established withm a matter of seconds.

Furthermore, it is apparent that one computer 52 may be employed to dπve a plurality of electronic patching systems 46. Thus one computer operator or communications manager may control the patch connections of a very large number of telephone and data lines and telecommunications devices. The database that stores the connection data may be queπed to provide reports of current status and switching operation, so that the communications manager can determine at any time which telephone and data lines are connected to which telephone devices Telephone number, office number and location, name of office occupant or tenant, busmess hours, and the like may all be stored in associated data fields in the database, and this information is instantly available. The availability of this information is an extraordinary advance over pnor art manually connected patch cable systems. It is noted that all switching is accomplished with solid state switches, and that there are no moving parts to wear out and fail. The system handles standard 2 and 4 wire telephone wire systems, and well as 6 wire systems. Digital and analog telephones are accommodated, as well as data networks such as Ethernet. AppleTalk, token πng, and the like. The data passing through the system of the invention is not processed in any manner, although all signals are amplified to increase maximum line length and reliability.

An additional feature that may be provided by the electronic patching system of the invention compπses a line tester, shown in Figure 7 A test pattern generator 72 is connected to the switch matπx 33, and a test pattern receiver 73 and patter checker 74 receive the output from the matπx 33. The output of the checker 74 is fed to the EPS controller 49, which in turn is connected to the Ethernet interface 47. The EPS controller 49 is also connected to the matrix 33, as noted in Figure 3.

The operation of the line tester is depicted in the flow chart of Figure 8. The test routine may be initiated whenever a line is first used; for example, whenever a telephone instrument is first used, the off-hook signal may trigger the test routine. The address data of d e switch being used is sent to the controller 49, which returns a test command if the line tester feature is operating. The test pattern generator is then actuated to send a predetermined data pattern through the addressed switch, and the data pattern returned down the line is received by device 73 and compared to the original test pattern. If the comparison is favorable, the telephone or data line is labeled as operable (good status), the call (or data transfer) proceeds, and the line test subroutine ends. If the comparison indicates a problem in line quality or transmission, the line is labeled as inoperable (bad status), and the system reprograms the telephone instrument to be connected to another available telephone or data line. The subroutine then ends. The line status data may be transmitted through the Ethernet interface to the host computer when connection therewith is established, so that line fault problems will be reported promptly. It may be appreciated that the line testing subroutine requires only a few microseconds to be completed, and due to the brevity of the routine, that the telephone user (or telecommunications device) is completely unaware of the procedure.

Claims

1. An electronic patching system for connecting a plurality of telephone and data lines to a plurality of telecommunications devices, including: an electronic switching matrix having first and second pluralities of input ports; first means for connecting the plurality of telephone and data lines to said first plurality of input ports of said switching matrix; second means for connecting the plurality of telecommunications devices to said second plurality of input ports of said switching matrix; control means for operating said electronic switching matπx; and, programming means for directing said control means to cause said switching matrix to establish predetermined connections between each of said plurality of telecommunications devices and at least one of the telephone and data lines.

2. The electronic patching system of claim 1, wherein said programming means includes database program means functioning on a computer for generating a database document listing the desired connection pattern between each of said plurality of telephone and data lines and each of said telecommunications devices.

3. The electronic patching system of claim 2, further including converter means for translating said database document into an instruction set, and means for transmitting said instruction set to said control means.

4 The electronic patching system of claim 3, wherein said control means mcludes a programmable logic array connected between said programming means and said switching matrix, said programmable logic array connected to receive said instruction set from said converter means.

5 The electronic patching system of claim 3, wherein said converter means includes a converter program operating on said computer

6. The electronic patching system of claim 5, wherein said means for transmitting said instruction set includes a data transmission line extending from said computer to said control means.

7 The electronic patching system of claim 4, wherein said instruction set includes a plurahty of data words, each data word adapted to direct one connection between one of said first plurality ot input ports and one ot said second plurality of input ports of said switching matπx.

8 The electronic patching system of claim 7, wherein said control means further includes a first-m, first out random access memory connected to said programmable logic array to receive said plurality of data words m a predetermined sequence.

9 The electronic patching system of claim 8, fuπher including means /or transmitting said data words from said first-in. first-out random access memory to said switching array in said predetermined sequence, whereby each of said first plurality of input ports is connected to a respective one of said second plurality of said input ports of said switching matπx

10 The electromc patching system of claim 1 , wherein said switching matπx includes a high voltage portion for connection to analog telecommunications devices, and a low voltage portion for connection to digital telecommunications devices.

11 The electronic patching system of claim 1 , wherein said plurality of telephone lines includes data lines for data transmission

12. The electronic patching system of claim 1 , further including hne tester means for checking the operability of each telecommunications connection made by said switching matπx

13 The electronic patching system of claim 12, wherein said line tester means includes test pattern generator means for generating a predetermined data pattem

14. The electronic patching system of claim 13, fuπher including means for transmitting said predetermined data pattern through said switching matπx to a selected one of any of said telecommunications devices upon initiation of use of said selected one telecommunications device.

15. The electronic patching system of claim 14, further including means for receiving said data pattern from said selected one telecommunications device, and pattem checking means for comparing said predetermined data pattern from said test pattern generator means with said data pattern from said selected one telecommunications device.

16. The electronic patching system of claim 15, wherein said pattern checking means generates a good status signal in response to a favorable comparison of said data patterns, and generates a bad status signal in response to an unfavorable comparison of said data patterns.

17. The electronic patching system of claim 16, wherein said bad status signal is transmitted to said control means, said control means including means to reprogram said switching matrix and remediate the connection generating said bad status signal.

18. A method for improving a patch board having a plurality of patch wires connected individually between a first plurality of connectors linked to a plurahty of telephone and data lines and a second plurality of connectors linked to a plurality of telecommunications devices, including the steps of: removing all of said patch wires; providing an electronically programmable switch matrix having first and second pluralities of ports; connecting said first plurality of ports to said plurality of telephone and data lines and connepting said second plurality of ports to said plurality of telecommunications devices; and programming said electronically programmable switch matrix to establish a desired connection pattem between each of said telephone and data lines and each of said telecommunications devices.

19. A method for interconnecting a plurality of telephone and data lines to a plurality of telecommunications devices in a desired connection pattern, including the steps of: providing an electronically programmable switch matrix having first and second pluralities of ports; connecting said first plurality of ports to said plurality of telephone and data lines and connecting said second plurality of ports to said plurality of telecommunications devices; and programming said electronically programmable switch matπx to establish said desired connection pattern between each of said telephone and data lines and each of said telecommunications devices.