WO1997036381A1 - Apparatus for code tracking in a direct sequence spread spectrum receiver - Google Patents

Apparatus for code tracking in a direct sequence spread spectrum receiver Download PDF

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Publication number
WO1997036381A1
WO1997036381A1 PCT/GB1996/000747 GB9600747W WO9736381A1 WO 1997036381 A1 WO1997036381 A1 WO 1997036381A1 GB 9600747 W GB9600747 W GB 9600747W WO 9736381 A1 WO9736381 A1 WO 9736381A1
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WO
WIPO (PCT)
Prior art keywords
signals
correlator
signal
handling
inphase
Prior art date
Application number
PCT/GB1996/000747
Other languages
French (fr)
Inventor
Anthony Peter Hulbert
David Peter Chandler
Original Assignee
Roke Manor Research Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to GB9502992A priority Critical patent/GB2298110B/en
Priority claimed from GB9502992A external-priority patent/GB2298110B/en
Application filed by Roke Manor Research Limited filed Critical Roke Manor Research Limited
Priority to BR9612584-5A priority patent/BR9612584A/en
Priority to PCT/GB1996/000747 priority patent/WO1997036381A1/en
Priority to US09/155,394 priority patent/US6330273B1/en
Priority to CN96180312.6A priority patent/CN1220061A/en
Priority to CA002250074A priority patent/CA2250074C/en
Priority to DE19681752T priority patent/DE19681752T1/en
Publication of WO1997036381A1 publication Critical patent/WO1997036381A1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B1/707Spread spectrum techniques using direct sequence modulation
    • H04B1/7073Synchronisation aspects
    • H04B1/7085Synchronisation aspects using a code tracking loop, e.g. a delay-locked loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B1/707Spread spectrum techniques using direct sequence modulation
    • H04B1/709Correlator structure

Definitions

  • This relates to receivers for direct sequence spread spectrum and is concerned with code tracking part of the receiving apparatus.
  • the normal implementation of a code tracking device for spread spectrum consists of a so called early prompt late tracking loop and this involves energy detection of the correlated wave r form for a correlation that is performed early, normally half a chip early, and a correlation of energy for a chip that is performed late, normally half a chip late.
  • a timing discrimination curve is then generated by subtracting the early from the late and this is used to close a feedback loop to adjust the time, such that the prompt occurs at the correct time.
  • An aim of the invention is to remove the need to have the early and late correlations taking place at half a chip but specifically, to enable them to be apphed at plus or minus one chip. This results in particular difficulties in the normal implementation, in that at plus or minus one chip for a circuit that is operating at the nominal timing, the correlation falls to zero and therefore energy detection of the signals will tend to be very noisy and thus a normal implementation would lead to a discrimination curve that is itself very noisy and would lead to a very jittery timing loop.
  • the apparatus uses spread spectrum signals which have been Nyquist filtered and therefore it uses signals, the correlation func ions of which still has a good slope on it through the zero points and the basic problems are solved by not perforating energy detection on the measurements taken or the correlations taken at these intervals but rather, coherently compensating them against a phase reference derived from the prompt signal and thereby reducing the effect of the noise and thus enabling a discrimination signal to be derived which is of a similar signal to noise ratio as would obtained in the more conventional plus or minus half a chip early/late situation.
  • apparatus for code tracking in a direct sequence spread spectrum receiver comprising means for receiving a signal, means for converting the received signal into an inphase and quadrature-signal, analogue to digital converter means per converting the inphase and quadrature signals into digital signals, a first correlator for handling prompt signals, a second correlator for handling late signals, a third correlator for handling early signals, estimation means for obtaining estimates of the output signals from the first correlator, first and second multiplying and adding means for multiplying the estimates with the output signals from the second and third correlators respectively and adding the inphase and quadrature channels together, subtraction means for subtracting the result from said first and second multiplying means, and control means arranged to receive the output signal from said subtracting means and generate control signals for the analogue to digital converter means.
  • apparatus for code tracking in a direct sequence spread spectrum receiver comprising means for receiving a signal, converting means for converting the received signal into an inphase and quadrature signal, analogue to digital converter means for converting the inphase and quadrature signals into digital signals, a first complex correlator for handling prompt signals, a second correlator for handling late signals, a third correlator for handling early signals, a frequency phase discrimination means for receiving the signals from said first correlator and generating a signal for controlling said converting means in a manner such that a coherent signal is contained on one signal phase channel, subtractor means for subtracting the output signals from said second and third correlators, and control means connected to said subtractor means for controlling said analogue to digital converters.
  • FIGURE 1 shows a typical correlation function for the output of a correlator
  • FIGURE 2 shows a block diagram of a first embodiment of the invention
  • FIGURE 3 shows a block diagram of a second embodiment of the invention.
  • FIG. 1 a typical correlation function for the output of a correlator is shown, indicating the normal nominal positions for the early, late and prompt correlations, as well as the new proposed positions for the early and late positions, the prompt positions obviously being the same.
  • signal input generation means 2 shown as an antenna feeds a frequency converter means 4, which generates I and Q. signals which feed into a pair of analogue to digital converters 6, 8.
  • the correlator comprising units 10, 12, 14, 16 is for the prompt position, thus the I sample signal of the output of the converter 6 is multiplied by the prompt code in the multiplier 10 and is accumulated in the accumulator 14, and si ⁇ iilarly for multiplier 12, and accumulator 16 for the Q_ channel.
  • the outputs for the prompt signal pass on to other circuitry used as familiar to those in art for demodulation purposes.
  • the outputs are also fed. to estimation means 18, 20 which essentially in this embodiment serve as filters to enhance the signal to noise ratio of the measurement of this position.
  • the output of subtractor means 50 is fed to loop filter means 52 and used to control a clock generator 54 for the sampling of the converters 6, 8 in order to advance or retard the timing of the sampling in such a way to cause the prompt signal to coincide with correlation at the peak of the correlation function.
  • the sampling may initially take place at a higher rate -than one sample per chip and the generation of samples at one sample per chip may be formed through interpolator means and the timings of the samples generated through the interpolator means can be established through setting up the correct interpolator coefficients and the selection of these can also be controlled from the output of the filter means 52.
  • the outputs of estimates 18, 20 are so controlled as to normalise them so that they are constant amplitude and that they embody only the phase information of that estimate.
  • a local code generator 56 controls the multipliers 10, 12, 22, 24, 36, 58 by way of the circuit 38 which generates the early/late/prompt signal.
  • a further implementation is shown in Figure 3.
  • the signal generation means 60 is an antenna.
  • a frequency converter 62 feeds the I and Q_ channels via analogue to digital converters 64, 66.
  • the multipUer 68 and accumulator 72 together form a correlator and similarly the multipUer 70 and the accumulator 74 form a further correlator.
  • the outputs from the correlators feed into frequency phase discrimination means 76 which generates a frequency control signal in the manner familiar to those versed in the art which feeds back to the frequency converter 62 to control the phase of the conversion in such a way that the coherent signal is aU contained on the I channel.
  • frequency phase discrimination means 76 which generates a frequency control signal in the manner familiar to those versed in the art which feeds back to the frequency converter 62 to control the phase of the conversion in such a way that the coherent signal is aU contained on the I channel.
  • a single multipUer 78 and single accumulator 80 only which generates the early signal, and similarly for the late signal a multipUer 82 and an accumulator 84 only is provided.
  • the outputs from the accumulators 80, 84 are subtracted in subtraction means 86, which feeds the loop filter 88 for controUing the clock generator means 90.
  • a local code generator 92 generates early/late/prompt signals by way of the circuit 94 for controlling the multipUers 68, 70, 78, 82.
  • connection to the frequency converters may be made via cables.

Abstract

Inphase and quadrature signals are applied to first, second and third correlators, the first correlator being arranged to generate prompt signals, the second correlator being arranged to generate late signals and the third correlator being arranged to generate early signals. The output from the first correlator is passed to estimation means and signals generated from the estimation means are multiplied with the outputs from the first and second correlators in respect of each channel. The inphase and quadrature channel signals generated from the second and third correlators are added together and the sum of signals are then subtracted to generate a signal for controlling a loop filter and clock generation means controls the analogue to digital converters.

Description

APPARATUS FOR CODE TRACKING IN A DIRECT SEQUENCE SPREAD SPECTRUM RECEIVER
This relates to receivers for direct sequence spread spectrum and is concerned with code tracking part of the receiving apparatus.
The normal implementation of a code tracking device for spread spectrum consists of a so called early prompt late tracking loop and this involves energy detection of the correlated wave r form for a correlation that is performed early, normally half a chip early, and a correlation of energy for a chip that is performed late, normally half a chip late. A timing discrimination curve is then generated by subtracting the early from the late and this is used to close a feedback loop to adjust the time, such that the prompt occurs at the correct time.
An aim of the invention is to remove the need to have the early and late correlations taking place at half a chip but specifically, to enable them to be apphed at plus or minus one chip. This results in particular difficulties in the normal implementation, in that at plus or minus one chip for a circuit that is operating at the nominal timing, the correlation falls to zero and therefore energy detection of the signals will tend to be very noisy and thus a normal implementation would lead to a discrimination curve that is itself very noisy and would lead to a very jittery timing loop.
The apparatus uses spread spectrum signals which have been Nyquist filtered and therefore it uses signals, the correlation func ions of which still has a good slope on it through the zero points and the basic problems are solved by not perforating energy detection on the measurements taken or the correlations taken at these intervals but rather, coherently compensating them against a phase reference derived from the prompt signal and thereby reducing the effect of the noise and thus enabling a discrimination signal to be derived which is of a similar signal to noise ratio as would obtained in the more conventional plus or minus half a chip early/late situation.
According to one embodiment of the present invention there is provided apparatus for code tracking in a direct sequence spread spectrum receiver, comprising means for receiving a signal, means for converting the received signal into an inphase and quadrature-signal, analogue to digital converter means per converting the inphase and quadrature signals into digital signals, a first correlator for handling prompt signals, a second correlator for handling late signals, a third correlator for handling early signals, estimation means for obtaining estimates of the output signals from the first correlator, first and second multiplying and adding means for multiplying the estimates with the output signals from the second and third correlators respectively and adding the inphase and quadrature channels together, subtraction means for subtracting the result from said first and second multiplying means, and control means arranged to receive the output signal from said subtracting means and generate control signals for the analogue to digital converter means. According to another embodiment of the present invention there is provided apparatus for code tracking in a direct sequence spread spectrum receiver, comprising means for receiving a signal, converting means for converting the received signal into an inphase and quadrature signal, analogue to digital converter means for converting the inphase and quadrature signals into digital signals, a first complex correlator for handling prompt signals, a second correlator for handling late signals, a third correlator for handling early signals, a frequency phase discrimination means for receiving the signals from said first correlator and generating a signal for controlling said converting means in a manner such that a coherent signal is contained on one signal phase channel, subtractor means for subtracting the output signals from said second and third correlators, and control means connected to said subtractor means for controlling said analogue to digital converters.
Various embodiments of the present invention will now be described with reference to the accompanying drawings wherein ;
FIGURE 1 shows a typical correlation function for the output of a correlator,
FIGURE 2 shows a block diagram of a first embodiment of the invention, and,
FIGURE 3 shows a block diagram of a second embodiment of the invention.
Referring to Figure 1 a typical correlation function for the output of a correlator is shown, indicating the normal nominal positions for the early, late and prompt correlations, as well as the new proposed positions for the early and late positions, the prompt positions obviously being the same.
Referring to Figure 2, signal input generation means 2 shown as an antenna feeds a frequency converter means 4, which generates I and Q. signals which feed into a pair of analogue to digital converters 6, 8. The output of these feed into three half complex correlators. The correlator comprising units 10, 12, 14, 16 is for the prompt position, thus the I sample signal of the output of the converter 6 is multiplied by the prompt code in the multiplier 10 and is accumulated in the accumulator 14, and siπiilarly for multiplier 12, and accumulator 16 for the Q_ channel. The outputs for the prompt signal pass on to other circuitry used as familiar to those in art for demodulation purposes. The outputs are also fed. to estimation means 18, 20 which essentially in this embodiment serve as filters to enhance the signal to noise ratio of the measurement of this position.
Similar operations are performed in the late correlator pair, consisting of multiplier 22 and accumulator 26 for the I channel and multipHer 24 and accumulator 28 for the Q_ channel, however the outputs of these are multiplied by the estimates derived from the prompt channel in multipliers 30, 32 and added together in the adder 34.
Similarly, for the early channel similar operations are performed by the multiplier 36 and the accumulator 40, the multiplier 38 and accumulator 42. The output from the accumulators 40, 42 are also multiplied by the estimates by the multiples 44, 46, the outputs of which are added by the adder 48. The outputs of the adders 34, 48 are then subtracted in subtracting means 50. It will be appreciated that these operations can be performed in a different order and in fact two multipliers can be saved if the subtractions are performed prior to the multiplications however, this en bodiment better explains the principle.
The output of subtractor means 50 is fed to loop filter means 52 and used to control a clock generator 54 for the sampling of the converters 6, 8 in order to advance or retard the timing of the sampling in such a way to cause the prompt signal to coincide with correlation at the peak of the correlation function. It will be appreciated that additional embodiments of this invention are possible, for example, the sampling may initially take place at a higher rate -than one sample per chip and the generation of samples at one sample per chip may be formed through interpolator means and the timings of the samples generated through the interpolator means can be established through setting up the correct interpolator coefficients and the selection of these can also be controlled from the output of the filter means 52. It will also be appreciated that under some circumstances there may be an improvement if the outputs of estimates 18, 20 are so controlled as to normalise them so that they are constant amplitude and that they embody only the phase information of that estimate.
A local code generator 56 controls the multipliers 10, 12, 22, 24, 36, 58 by way of the circuit 38 which generates the early/late/prompt signal. A further implementation is shown in Figure 3. Referring to Figure 3 the signal generation means 60 is an antenna. A frequency converter 62 feeds the I and Q_ channels via analogue to digital converters 64, 66. As before, the multipUer 68 and accumulator 72 together form a correlator and similarly the multipUer 70 and the accumulator 74 form a further correlator. The outputs from the correlators feed into frequency phase discrimination means 76 which generates a frequency control signal in the manner familiar to those versed in the art which feeds back to the frequency converter 62 to control the phase of the conversion in such a way that the coherent signal is aU contained on the I channel. In this way, for the early and the late signals, it becomes unnecessary to correlate on the Q. channel and thus, a single multipUer 78 and single accumulator 80 only is provided which generates the early signal, and similarly for the late signal a multipUer 82 and an accumulator 84 only is provided. The outputs from the accumulators 80, 84 are subtracted in subtraction means 86, which feeds the loop filter 88 for controUing the clock generator means 90.
A local code generator 92 generates early/late/prompt signals by way of the circuit 94 for controlling the multipUers 68, 70, 78, 82.
It will be reacUly appreciated by those skilled in the art that alternative arrangements fuUy within the scope of the invention. For example, connection to the frequency converters may be made via cables.

Claims

1. Apparatus for code tracking in a direct sequence spread spectrum receiver, comprising means for receiving a signal, means for converting the received signal into an inphase and quadrature signal, analogue to digital converter means per converting for inphase and quadrature signals into digital signals, a first correlator for handling prompt signals, a second correlator for handling late signals, a third correlator for handling early signals, estimation means for obtaining estimates of the output signals from the first correlator, first and second multiplying and adding means for multiplying the estimates with the output signals from the second and third correlators respectively and adding the inphase and quadrature channels together, subtraction means for subtracting the result from said first and second multiplying means, and control means arranged to receive the output signals from said subtracting means and generate control signals for the analogue to digital converter means.
2. Apparatus as claimed in Claim 1, wherein each correlator comprises a multiplier and an accumulator for handling the inphase signals, and a multiplier and accumulator for handling the quadrature signals.
3. Apparatus as claimed in Claim 1 or Claim 2, wherein the control means comprises a loop filter and clock generator.
4. Apparatus as claimed in Claim 2 or Claim 3 , wherein the multipliers in each correlator are controlled by a code generator and means for generating early/late/prompt signal codes.
5. Apparatus for code tracking in a direct sequence spread spectrum receiver, comprising means for receiving a signal, converting means for converting the received signal into an inphase and quadrature signal, analogue to digital converter means for converting the inphase and quadrature signals into digital signals, a first correlator for handling prompt signals, a second correlator for handling late signals, a third correlator for handling early signals, a frequency phase discrimination means for receiving the signals from said first correlator and generating a signal for controlling said converting means in a manner such that a coherent signal is contained on one signal phase channel, subtractor means for subtracting the output signals from said second and third correlators, and control means connected to said subtractor means for controlling said analogue to digital converters.
6. Apparatus as claimed in Claim 5, wherein the first correlator comprises a multipUer and accumulator for each signal channel.
7. Apparatus as claimed in Claim 6, wherein, the second and third correlators comprise a multipUer and accumulator for each signal channel.
8. Apparatus as claimed in any of the preceding Claims 5 to 7, wherein the control means comprises a loop filter and clock generator.
9. Apparatus as claimed in Claim 7 or Claim 8, wherein, the multipliers in each correlator are controlled by a code generator and means for generating early/late/ prompt signals.
10. Apparatus substantially as herein before described with reference to Figures 1, 2 and 3 of the accompanying drawings.
PCT/GB1996/000747 1995-02-16 1996-03-28 Apparatus for code tracking in a direct sequence spread spectrum receiver WO1997036381A1 (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
GB9502992A GB2298110B (en) 1995-02-16 1995-02-16 Apparatus for providing code tracking in a direct sequence spread spectrum receiver
BR9612584-5A BR9612584A (en) 1995-02-16 1996-03-28 Apparatus for tracking code in a direct sequence diffuse spectrum receiver
PCT/GB1996/000747 WO1997036381A1 (en) 1995-02-16 1996-03-28 Apparatus for code tracking in a direct sequence spread spectrum receiver
US09/155,394 US6330273B1 (en) 1996-03-28 1996-03-28 Apparatus for code tracking in a direct sequence spread spectrum receiver
CN96180312.6A CN1220061A (en) 1995-02-16 1996-03-28 Apparatus for code tracking in direct sequence spread spectrum receiver
CA002250074A CA2250074C (en) 1995-02-16 1996-03-28 Apparatus for code tracking in a direct sequence spread spectrum receiver
DE19681752T DE19681752T1 (en) 1995-02-16 1996-03-28 Device for code tracking in a direct sequence spread spectrum receiver

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
GB9502992A GB2298110B (en) 1995-02-16 1995-02-16 Apparatus for providing code tracking in a direct sequence spread spectrum receiver
BR9612584-5A BR9612584A (en) 1995-02-16 1996-03-28 Apparatus for tracking code in a direct sequence diffuse spectrum receiver
PCT/GB1996/000747 WO1997036381A1 (en) 1995-02-16 1996-03-28 Apparatus for code tracking in a direct sequence spread spectrum receiver
CN96180312.6A CN1220061A (en) 1995-02-16 1996-03-28 Apparatus for code tracking in direct sequence spread spectrum receiver
CA002250074A CA2250074C (en) 1995-02-16 1996-03-28 Apparatus for code tracking in a direct sequence spread spectrum receiver

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WO1997036381A1 true WO1997036381A1 (en) 1997-10-02

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Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19953350A1 (en) 1999-11-05 2001-05-23 Infineon Technologies Ag Device for fine synchronization of code signals

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5347536A (en) * 1993-03-17 1994-09-13 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Multipath noise reduction for spread spectrum signals
US5402450A (en) * 1992-01-22 1995-03-28 Trimble Navigation Signal timing synchronizer
US5414729A (en) * 1992-01-24 1995-05-09 Novatel Communications Ltd. Pseudorandom noise ranging receiver which compensates for multipath distortion by making use of multiple correlator time delay spacing

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5402450A (en) * 1992-01-22 1995-03-28 Trimble Navigation Signal timing synchronizer
US5414729A (en) * 1992-01-24 1995-05-09 Novatel Communications Ltd. Pseudorandom noise ranging receiver which compensates for multipath distortion by making use of multiple correlator time delay spacing
US5347536A (en) * 1993-03-17 1994-09-13 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Multipath noise reduction for spread spectrum signals

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