WO1997041604A1 - Lightly doped drain (ldd) mosfet - Google Patents

Lightly doped drain (ldd) mosfet Download PDF

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Publication number
WO1997041604A1
WO1997041604A1 PCT/DE1997/000719 DE9700719W WO9741604A1 WO 1997041604 A1 WO1997041604 A1 WO 1997041604A1 DE 9700719 W DE9700719 W DE 9700719W WO 9741604 A1 WO9741604 A1 WO 9741604A1
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WO
WIPO (PCT)
Prior art keywords
zone
drain
drift
deflection
semiconductor component
Prior art date
Application number
PCT/DE1997/000719
Other languages
German (de)
French (fr)
Inventor
Jenö Tihanyi
Original Assignee
Siemens Aktiengesellschaft
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Publication of WO1997041604A1 publication Critical patent/WO1997041604A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7836—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a significant overlap between the lightly doped extension and the gate electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7831—Field effect transistors with field effect produced by an insulated gate with multiple gate structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1075—Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1083—Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current

Definitions

  • the present invention relates to a semiconductor component which can be controlled by a field effect and comprises a semiconductor body of the first conductivity type with a source zone and a drain zone of the second conductivity type, with a drift zone of the second conductivity type lying between the source zone and the drain zone, which is less doped than that
  • Source zone and the drain zone with a gate electrode which is insulated from the surface of the semiconductor body and covers the entire width of the drift zone, the part of the drift zone lying between the gate electrode and the drain zone forming a drift path for the charge carriers.
  • LDD-MOSFET lightly doped drain
  • the field effect transistor should also have a structure that can be integrated with little effort.
  • the object is achieved in that at least one deflection area is provided in the area of the drift section, by means of which the current path of the charge carriers can be laid in depth.
  • This simple but very effective means shifts the current path of the electrons in the drain zone from the surface to the depth. As a result, the electrons are decelerated and lose kinetic energy as a result of this deceleration, which leads to a reduction in the field strength.
  • the deflection area is designed as a deflection zone of the first conduction type embedded in the drift zone. This deflection zone is then typically connected laterally to the insulation diffusion zone which is present in every MOS-FET.
  • a deflection electrode which is insulated from the surface of the semiconductor body and which is at a more negative potential than the drain potential is provided as the deflection region.
  • This deflection electrode is typically arranged under a drain-side SiO 2 spacer and preferably consists of doped polysilicon.
  • the cross section of the drift path perpendicular to the drift direction, starting from the gate electrode in the direction of the drain zone, contains an increasing number of dopant atoms.
  • the drift path can have a substantially constant width. The doping Concentration in the drift section then increases from the gate electrode to the drain zone.
  • a further zone of the first conductivity type which interrupts the drift zone and is at least partially covered by the gate electrode, is expediently arranged with the doping concentration at least as high, but preferably higher, than that of the semiconductor body.
  • the semiconductor component can be constructed symmetrically, that is to say with the same structure of the source zone and drain zone, or asymmetrically.
  • FIG. 1 shows a section through a semiconductor component according to the prior art
  • FIG. 2 shows a section through a semiconductor component with a deflection zone
  • FIG. 3 shows a section through a semiconductor component with a deflection zone and alternatively designed lightly doped drain
  • FIG. 4 shows a section Section through a semiconductor component with a deflection electrode.
  • the semiconductor body of the semiconductor component is designated by 1 in all four figures.
  • This semiconductor body 1 here consists of weakly p-doped silicon.
  • the field effect transistor is delimited, for example, by a heavily p-doped isolation diffusion zone or isolation zone 14.
  • a source zone 4 and a drain zone 5 with strong n-conductivity are arranged in the semiconductor body 1. Between the source zone 4 and the drain zone 5 there is a weakly n-doped drift zone 6 (lightly doped drain).
  • the surface of the semiconductor substrate is one of Si0 2 Insulating layer 3 covered.
  • a gate electrode 9 is arranged on the insulating layer 3, which here consists of doped polycrystalline silicon.
  • the weakly n-doped drift zone 6 is interrupted in the vicinity of the source zone 4 by a heavily p-doped further zone 8.
  • Zone 8 and source zone 4 can be produced by double ion implantation. This zone 8 is not absolutely necessary for the function of the field effect transistor if one does not completely block the current-carrying channel lying between the source zone 4 and the drain zone 5.
  • the drift zone 6 forms a drift path 7 between the gate electrode 9 and the drain zone 5, for the electrons emanating from the source zone 4.
  • this current path 13 is laid in depth by a deflection zone 10, which is laterally connected to the insulating diffusion zone 14, so that the electrons are braked and the formation of hot electrons is significantly reduced.
  • FIGS. 2 and 3 show different embodiments of the drift zones 6.
  • the lightly-doped-drain-doping profile (LDD) shown in FIG. 2 is produced here using the so-called SiO 2 spacer technique. It serves to reduce the field strength peaks at the drain edge.
  • the weak ⁇ More n-doping (IO 13 - IO 14 per cm 2 ) is implanted before the spacer formation, the stronger n * -doping afterwards.
  • FIG. 3 shows an alternative embodiment in which the lightly-doped drain channels lie below the n + -doped drain zone.
  • FIG. 4 shows an exemplary embodiment in which an LDD doping profile has likewise been produced using SiO 2 spacer technology and a deflection electrode 11 made of doped polysilicon is integrated under the SiO 2 spacer and has the same potential as the source zone. It is therefore connected to the source electrode 16.
  • the current path 13 is laid in depth.
  • the LDD-MOSFETs shown in all four figures are constructed symmetrically, i.e.
  • the source zone and drain zone have the same structure.

Abstract

The invention relates to a MOS transistor structure which displaces the current path in the drain zone from the surface to deep within. In the embodiment according to the invention a deflection zone is arranged in the drain region below the drain spacer. In another embodiment, a deflection electrode instead of a deflection zone is incorporated in the drain spacer.

Description

Beschreibungdescription
LDD-MOSFETLDD MOSFET
Die vorliegende Erfindung betrifft ein durch Feldeffekt steuerbares Halbleiterbauelement bestehend aus einem Halb¬ leiterkörper vom ersten Leitungstyp mit einer Sourcezone und einer Drainzone vom zweiten Leitungstyp, mit einer zwischen der Sourcezone und der Drainzone liegenden Driftzone vom zweiten Leitungstyp, die schwächer dotiert ist als dieThe present invention relates to a semiconductor component which can be controlled by a field effect and comprises a semiconductor body of the first conductivity type with a source zone and a drain zone of the second conductivity type, with a drift zone of the second conductivity type lying between the source zone and the drain zone, which is less doped than that
Sourcezone und die Drainzone, mit einer gegen die Oberfläche des Halbleiterkörpers isolierten Gate-Elektrode, die die Driftzone auf ihrer gesamten Breite überdeckt, wobei der zwi¬ schen der Gate-Elektrode und der Drainzone liegende Teil der Driftzone eine Driftstrecke für die Ladungsträger bildet.Source zone and the drain zone, with a gate electrode which is insulated from the surface of the semiconductor body and covers the entire width of the drift zone, the part of the drift zone lying between the gate electrode and the drain zone forming a drift path for the charge carriers.
Ein solcher Feldeffekttransistor ist zum Beispiel in der EP- B-0011879 beschrieben worden und unter dem Namen LDD-MOSFET (LDD="lightly doped drain") bekannt geworden. Feldeffekttran- sistoren dieser Art sind mittlerweile für Betriebsspannungen oberhalb 100 Volt ausgelegt. Im Zuge der fortschreitenden Miniaturisierung treten bei solchen lateralen MOS- Transistoren größere Stabilitätsprobleme auf, da es vermehrt zur Bildung von heißen Elektronen ( "Hot-Electrons" ) aufgrund der hohen Feldstärken im Drainbereich kommt. Bei hohen elektrischen Feldstärken treten Abweichungen vom ohmschen Gesetz auf, d.h. die Geschwindigkeit der Ladungsträger ist nicht mehr proportional zur elektrischen Feldstärke. Der Begriff "heiße Elektronen" bedeutet, daß die kinetische Energie der Elektronen deutlich von der thermischen Energie der Gitterschwingungen abweicht. In dieser Situation erfolgt sehr rasch ein Energieausgleich zwischen den Elektronen und dem Gitter. Mit anderen Worten: Die Elektronengeschwindigkeit nimmt nicht mehr zu; sie erreicht die Sättigungsdriftge- schwindigkeit.Such a field effect transistor has been described, for example, in EP-B-0011879 and has become known under the name LDD-MOSFET (LDD = "lightly doped drain"). Field effect transistors of this type are now designed for operating voltages above 100 volts. In the course of advancing miniaturization, greater stability problems arise with such lateral MOS transistors, since hot electrons ("hot electrons") are increasingly formed due to the high field strengths in the drain region. At high electric field strengths deviations from Ohm's law occur, i.e. the speed of the charge carriers is no longer proportional to the electric field strength. The term "hot electrons" means that the kinetic energy of the electrons deviates significantly from the thermal energy of the lattice vibrations. In this situation, an energy balance between the electrons and the grid occurs very quickly. In other words: the electron speed no longer increases; it reaches the saturation drift speed.
Aufgabe der vorliegenden Erfindung ist es daher, einen Feld¬ effekttransistor gemäß der eingangs genannten Art so weiter- • zubilden, daß er bei höheren Betriebsspannungen einsetzbar ist und daß bei ihm die Feldstärke im Drainbereich deutlich reduziert werden kann, um die Entstehung von heißen Elektronen zu vermeiden. Der Feldeffekttransistor soll außerdem eine ohne großen Aufwand integrierbare Struktur aufweisen.It is therefore an object of the present invention to further develop a field effect transistor according to the type mentioned at the beginning • Form that it can be used at higher operating voltages and that the field strength in the drain area can be significantly reduced in order to avoid the formation of hot electrons. The field effect transistor should also have a structure that can be integrated with little effort.
Gemäß der vorliegenden Erfindung wird die Aufgabe dadurch ge¬ löst, daß im Bereich der Driftstrecke zumindest ein Ablenkbe- reich vorgesehen ist, mit der der Strompfad der Ladungsträger in die Tiefe verlegbar ist. Durch dieses einfache aber sehr wirksame Mittel wird der Strompfad der Elektronen in der Drainzone aus der Oberfläche in die Tiefe verlagert. Dadurch werden die Elektronen abgebremst und verlieren durch diese Abbremsung an kinetischer Energie, was zur Reduktion der Feldstärke führt.According to the present invention, the object is achieved in that at least one deflection area is provided in the area of the drift section, by means of which the current path of the charge carriers can be laid in depth. This simple but very effective means shifts the current path of the electrons in the drain zone from the surface to the depth. As a result, the electrons are decelerated and lose kinetic energy as a result of this deceleration, which leads to a reduction in the field strength.
In einer bevorzugten Ausführung der Erfindung ist der Ablenk¬ bereich als eine in die Driftzone eingebettete Ablenkzone vom ersten Leitungstyp ausgebildet. Diese Ablenkzone ist dann ty¬ pischerweise mit der Isolierdiffusionszone seitlich verbun¬ den, welche bei jedem MOS-FET vorhanden ist.In a preferred embodiment of the invention, the deflection area is designed as a deflection zone of the first conduction type embedded in the drift zone. This deflection zone is then typically connected laterally to the insulation diffusion zone which is present in every MOS-FET.
In einer anderen Ausführung der vorliegenden Erfindung ist als Ablenkbereich eine gegen die Oberfläche des Halbleiter¬ körpers isolierte Ablenkelektrode vorgesehen, die auf negati¬ verem Potential als das Drainpotential liegt. Diese Ablenk¬ elektrode ist typischerweise unter einem drainseitigen Si02- Spacer angeordnet und besteht vorzugsweise aus dotiertem Polysilicium..In another embodiment of the present invention, a deflection electrode which is insulated from the surface of the semiconductor body and which is at a more negative potential than the drain potential is provided as the deflection region. This deflection electrode is typically arranged under a drain-side SiO 2 spacer and preferably consists of doped polysilicon.
Bei allen Ausführungen der vorliegenden Erfindung ist es zweckmäßig, daß der Querschnitt der Driftstrecke senkrecht zur Driftrichtung ausgehend von der Gate-Elektrode in Rich- tung zur Drainzone eine zunehmende Anzahl von Dotierstoffato¬ men enthält. In einer Ausführung kann dabei die Driftstrecke eine im wesentlichen konstante Breite haben. Die Dotierungs- konzentration in der Driftstrecke erhöht sich dann von der Gate-Elektrode zur Drainzone.In all embodiments of the present invention, it is expedient that the cross section of the drift path perpendicular to the drift direction, starting from the gate electrode in the direction of the drain zone, contains an increasing number of dopant atoms. In one embodiment, the drift path can have a substantially constant width. The doping Concentration in the drift section then increases from the gate electrode to the drain zone.
Zweckmäßigerweise ist unter der Gate-Elektrode eine die Driftzone unterbrechende, von der Gate-Elektrode mindestens teilweise überdeckte weitere Zone vom ersten Leitungstyp mit mindestens gleichhoher, vorzugsweise aber höherer Dotierungs¬ konzentration wie der Halbleiterkörper angeordnet.A further zone of the first conductivity type, which interrupts the drift zone and is at least partially covered by the gate electrode, is expediently arranged with the doping concentration at least as high, but preferably higher, than that of the semiconductor body.
Das Halbleiterbauelement kann symmetrisch, also mit gleicher Struktur von Sourcezone und Drainzone, oder asymmetrisch auf¬ gebaut sein.The semiconductor component can be constructed symmetrically, that is to say with the same structure of the source zone and drain zone, or asymmetrically.
Die Erfindung ist in der Zeichnung beispielsweise veranschau- licht und im folgenden im einzelnen anhand der Zeichnung be¬ schrieben. Es zeigen:The invention is illustrated in the drawing, for example, and described in detail below with reference to the drawing. Show it:
Figur 1 einen Schnitt durch ein Halbleiterbauelement nach dem Stand der Technik, Figur 2 einen Schnitt durch ein Halbleiterbauelement mit ei¬ ner Ablenkungszone, Figur 3 einen Schnitt durch ein Halbleiterbauelement mit ei¬ ner Abienkungszone und alternativ ausgeführten Lightly-Doped-Drain, Figur 4 einen Schnitt durch ein Halbleiterbauelement mit ei¬ ner Ablenkelektrode.1 shows a section through a semiconductor component according to the prior art, FIG. 2 shows a section through a semiconductor component with a deflection zone, FIG. 3 shows a section through a semiconductor component with a deflection zone and alternatively designed lightly doped drain, FIG. 4 shows a section Section through a semiconductor component with a deflection electrode.
In allen vier Figuren ist der Halbleiterkörper des Halblei¬ terbauelements mit 1 bezeichnet. Dieser Halbleiterkörper 1 besteht hier aus schwach p-dotiertem Silicium. Der Feldef¬ fekttransistor wird durch zum Beispiel eine stark p-dotierte Isolierdiffusionszone oder Isolationszone 14 begrenzt. Im Halbleiterkörper 1 ist eine Sourcezone 4 und eine Drainzone 5 mit starker n-Leitfähigkeit angeordnet. Zwischen der Sourcezone 4 und der Drainzone 5 liegt eine schwach n- dotierte Driftzone 6 (lightly doped drain) . Die Oberfläche des Halbleitersubstrats wird von einer aus Si02 bestehenden Isolierschicht 3 bedeckt. In der Nähe der Sourcezone 4 ist auf der Isolierschicht 3 eine Gate-Elektrode 9 angeordnet, die hier aus dotiertem polykristallinem Silicium besteht.The semiconductor body of the semiconductor component is designated by 1 in all four figures. This semiconductor body 1 here consists of weakly p-doped silicon. The field effect transistor is delimited, for example, by a heavily p-doped isolation diffusion zone or isolation zone 14. A source zone 4 and a drain zone 5 with strong n-conductivity are arranged in the semiconductor body 1. Between the source zone 4 and the drain zone 5 there is a weakly n-doped drift zone 6 (lightly doped drain). The surface of the semiconductor substrate is one of Si0 2 Insulating layer 3 covered. In the vicinity of the source zone 4, a gate electrode 9 is arranged on the insulating layer 3, which here consists of doped polycrystalline silicon.
Die schwach n-dotierte Driftzone 6 ist in der Nähe der Sour¬ cezone 4 durch eine stark p-dotierte weitere Zone 8 unterbro¬ chen. Die Zone 8 und die Sourcezone 4 können durch Doppel¬ ionenimplantation hergestellt werden. Für die Funktion des Feldeffekttransistors ist diese Zone 8 nicht unbedingt erfor- derlich, wenn man auf eine vollständige Sperrung des zwischen Sourcezone 4 und Drainzone 5 liegenden, stromführenden Kanals verzichtet.The weakly n-doped drift zone 6 is interrupted in the vicinity of the source zone 4 by a heavily p-doped further zone 8. Zone 8 and source zone 4 can be produced by double ion implantation. This zone 8 is not absolutely necessary for the function of the field effect transistor if one does not completely block the current-carrying channel lying between the source zone 4 and the drain zone 5.
Die Driftzone 6 bildet zwischen der Gate-Elektrode 9 und der Drainzone 5 eine Driftstrecke 7, für die von der Sourcezone 4 ausgehenden Elektronen.The drift zone 6 forms a drift path 7 between the gate electrode 9 and the drain zone 5, for the electrons emanating from the source zone 4.
Wird an die Drainelektrode 15 und die Sourceelektrode 16 eine Spannung angelegt, so beginnt abhängig von der Größe der an die Gate-Elektrode 9 gelegten Steuerspannung ein Strom von der Sourcezone 4 an die Drainzone 5 zu fließen. Die Ladungs¬ träger nehmen dabei die durch die Pfeile angedeuteten Strompfade 13 zur Drainzone 5. Es ist evident, daß der Strompfad 13 in Figur 1 nur an der Oberfläche verläuft (Stand der Technik) .If a voltage is applied to the drain electrode 15 and the source electrode 16, a current begins to flow from the source zone 4 to the drain zone 5 depending on the size of the control voltage applied to the gate electrode 9. The charge carriers take the current paths 13 to the drain zone 5 indicated by the arrows. It is evident that the current path 13 in FIG. 1 runs only on the surface (prior art).
Wie in Figur 2 dargestellt ist, wird dieser Strompfad 13 durch eine Ablenkzone 10, die mit der Isolierdiffusionszone 14 seitlich verbunden ist, in die Tiefe verlegt, so daß die Elektronen abgebremst werden und die Bildung von heißen Elek¬ tronen deutlich vermindert wird.As shown in FIG. 2, this current path 13 is laid in depth by a deflection zone 10, which is laterally connected to the insulating diffusion zone 14, so that the electrons are braked and the formation of hot electrons is significantly reduced.
Die Figuren 2 und 3 zeigen dabei unterschiedliche Ausfüh¬ rungsformen der Driftzonen 6. Das in Figur 2 dargestellte Lightly-Doped-Drain-Dotierprofil (LDD) ist hier in der soge¬ nannten Si02-Spacer-Technik hergestellt. Sie dient zur Redu¬ zierung der Feldstärkespitzen an der Drainkante. Die schwä- ■ chere n-Dotierung (IO13 - IO14 pro cm2) wird vor der Spacer- Bildung, die stärkere n*-Dotierung danach implantiert.FIGS. 2 and 3 show different embodiments of the drift zones 6. The lightly-doped-drain-doping profile (LDD) shown in FIG. 2 is produced here using the so-called SiO 2 spacer technique. It serves to reduce the field strength peaks at the drain edge. The weak ■ More n-doping (IO 13 - IO 14 per cm 2 ) is implanted before the spacer formation, the stronger n * -doping afterwards.
Figur 3 zeigt eine alternative Ausführung, bei der die Lightly-Doped-Drainkanäle unterhalb der n+-dotierten Drain¬ zone liegen.FIG. 3 shows an alternative embodiment in which the lightly-doped drain channels lie below the n + -doped drain zone.
Die Figur 4 schließlich zeigt ein Ausführungsbeispiel, bei dem ebenfalls in Si02-Spacer-Technik ein LDD-Dotierprofil hergestellt worden ist und unter den Si02-Spacer eine Ablenk¬ elektrode 11 aus dotiertem Polysilicium integriert ist, die auf dem selben Potential liegt wie die Sourcezone. Sie ist demnach mit der Sourceelektrode 16 verbunden. Auch hier wird der Strompfad 13 in die Tiefe verlegt.Finally, FIG. 4 shows an exemplary embodiment in which an LDD doping profile has likewise been produced using SiO 2 spacer technology and a deflection electrode 11 made of doped polysilicon is integrated under the SiO 2 spacer and has the same potential as the source zone. It is therefore connected to the source electrode 16. Here, too, the current path 13 is laid in depth.
Die in allen vier Figuren gezeigten LDD-MOSFET's sind symmetrisch aufgebaut, d.h. Sourcezone und Drainzone weisen dieselbe Struktur auf.The LDD-MOSFETs shown in all four figures are constructed symmetrically, i.e. The source zone and drain zone have the same structure.
Alle vier Figuren zeigen lediglich Ausschnitte aus größer strukturierten Halbleiterkörpern. All four figures only show excerpts from larger structured semiconductor bodies.

Claims

' Patentansprüche 'Claims
1. Durch Feldeffekt steuerbares Halbleiterbauelement beste¬ hend aus einem Halbleiterkörper (1) vom ersten Leitungstyp a) mit einer Sourcezone (4) und einer Drainzone (5) vom zwei¬ ten Leitungstyp, b) mit einer zwischen der Sourcezone (4) und der Drainzone1. Semiconductor component controllable by field effect consisting of a semiconductor body (1) of the first conduction type a) with a source zone (4) and a drain zone (5) of the second conduction type, b) with one between the source zone (4) and the Drain zone
(5) liegenden Driftzone (6) vom zweiten Leitungstyp, die schwächer dotiert ist, als die Sourcezone (4) und die Drainzone (5) , c) mit einer gegen die Oberfläche (2) des Halbleiterkörpers(5) lying drift zone (6) of the second conductivity type, which is less heavily doped than the source zone (4) and the drain zone (5), c) with one against the surface (2) of the semiconductor body
(1) isolierten Gate-Elektrode (9), die die Driftzone (6) auf ihrer gesamten Breite überdeckt, wobei der zwischen der Gate-Elektrode (9) und der Drainzone (5) liegende Teil der Driftzone (6) eine Driftstrecke (7) für die Ladungs¬ träger bildet, d a d u r c h g e k e n n z e i c h n e t, daß d) im Bereich der Driftstrecke (7) zumindest ein Ablenk¬ bereich vorgesehen ist, mit der der Strompfad (13) der La- dungsträger in die Tiefe verlegbar ist.(1) insulated gate electrode (9) which covers the entire width of the drift zone (6), the part of the drift zone (6) lying between the gate electrode (9) and the drain zone (5) having a drift path (7 ) for the charge carriers, characterized in that d) in the area of the drift section (7) there is at least one deflection area with which the current path (13) of the charge carriers can be laid in depth.
2. Halbleiterbauelement nach Anspruch 1, d a d u r c h g e k e n n z e i c h n e t, daß als Ablenkbereich eine in die Driftzone (6) eingebettete Ablenkzone (10) vom ersten Leitungstyp vorgesehen ist.2. The semiconductor component as claimed in claim 1, so that a deflection zone (10) of the first conduction type embedded in the drift zone (6) is provided as the deflection region.
3. Halbleiterbauelement nach Anspruch 1, d a d u r c h g e k e n n z e i c h n e t, daß als Ablenkbereich eine gegen die Oberfläche (2) des Halb- leiterkörpers (1) isolierte Ablenkelektrode (11) vorgesehen ist, die auf negativerem Potential als das Drainpotential liegt .3. The semiconductor component as claimed in claim 1, so that a deflection electrode (11) which is isolated from the surface (2) of the semiconductor body (1) and is at a more negative potential than the drain potential is provided as the deflection region.
4. Halbleiterbauelement nach Anspruch 3, d a d u r c h g e k e n n z e i c h n e t, daß die Ablenkelektrode (11) unter einem drainseitigen Si02- Spacer (12) angeordnet ist. 4. Semiconductor component according to claim 3, characterized in that the deflection electrode (11) is arranged under a drain-side Si0 2 spacer (12).
5. Halbleiterbauelement nach Anspruch 3 oder 4, d a d u r c h g e k e n n z e i c h n e t, daß die Ablenkelektrode (11) und/oder die Gate-Elektrode (9) aus dotiertem Polysilicium oder Metall besteht.5. Semiconductor component according to claim 3 or 4, that the deflection electrode (11) and / or the gate electrode (9) consists of doped polysilicon or metal.
6. Halbleiterbauelement nach einem der Ansprüche 1 bis 5, d a d u r c h g e k e n n z e i c h n e t, daß der Querschnitt der Driftstrecke (7) senkrecht zur Drift- richtung ausgehend von der Gate-Elektrode (9) in Richtung zur Drainzone (6) eine zunehmende Anzahl von Dotierstoffatomen enthält.6. Semiconductor component according to one of claims 1 to 5, so that the cross section of the drift path (7) perpendicular to the drift direction from the gate electrode (9) towards the drain zone (6) contains an increasing number of dopant atoms.
7. Halbleiterbauelement nach Anspruch 6, d a d u r c h g e k e n n z e i c h n e t, daß die Driftstrecke (7) eine im wesentlichen konstante Breite hat und das sich ihre Dotierungskonzentration von der Gate-Elektrode (9) zur Drainzone (5) hin erhöht.7. The semiconductor device according to claim 6, d a d u r c h g e k e n n z e i c h n e t that the drift path (7) has a substantially constant width and that its doping concentration increases from the gate electrode (9) to the drain zone (5).
8. Halbleiterbauelement nach einem der Ansprüche 1 bis 7, g e k e n n z e i c h n e t d u r c h eine die Driftzone (6) unterbrechende, von der Gate-Elektrode (9) mindestens teilweise überdeckte weitere Zone (8) vom ersten Leitungstyp mit mindestens gleich hoher Dotierungskonzentration wie der Halbleiterkörper.8. Semiconductor component according to one of claims 1 to 7, g e k e n n z e i c h n e t d u r c h a drift zone (6) interrupting, by the gate electrode (9) at least partially covered further zone (8) of the first conductivity type with at least the same doping concentration as the semiconductor body.
9. Halbleiterbauelement nach einem der Ansprüche 1 bis 7, d a d u r c h g e k e n n z e i c h n e t, daß die Source- und Drainseite gleiche Struktur haben (symmetrisch) . 9. Semiconductor component according to one of claims 1 to 7, d a d u r c h g e k e n n z e i c h n e t that the source and drain side have the same structure (symmetrical).
PCT/DE1997/000719 1996-04-29 1997-04-09 Lightly doped drain (ldd) mosfet WO1997041604A1 (en)

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