WO1998041933A1 - Method for implementing an associative memory based on a digital trie structure - Google Patents
Method for implementing an associative memory based on a digital trie structure Download PDFInfo
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- WO1998041933A1 WO1998041933A1 PCT/FI1998/000192 FI9800192W WO9841933A1 WO 1998041933 A1 WO1998041933 A1 WO 1998041933A1 FI 9800192 W FI9800192 W FI 9800192W WO 9841933 A1 WO9841933 A1 WO 9841933A1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/90—Details of database functions independent of the retrieved data types
- G06F16/901—Indexing; Data structures therefor; Storage structures
- G06F16/9027—Trees
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S707/00—Data processing: database and file management or data structures
- Y10S707/953—Organization of data
- Y10S707/956—Hierarchical
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S707/00—Data processing: database and file management or data structures
- Y10S707/99941—Database schema or data structure
- Y10S707/99942—Manipulating data structure, e.g. compression, compaction, compilation
Definitions
- the present invention generally relates to implementation of an associative memory, particularly to implementation of an associative memory based on a digital trie structure.
- the solution in accordance with the invention is intended for use primarily in connection with central memory databases, and it can be used in conjunction with all memories based on a digital trie structure.
- digital trie The prior art unidimensional directory structure termed digital trie (the word “trie” is derived from the English word “retrieval”) is the underlying basis of the principle of the present invention.
- Digital tries can be implemented in two types: bucket tries, and tries having no buckets.
- a digital bucket trie structure is a tree-shaped structure composed of two types of nodes: buckets and trie nodes.
- a bucket is a data structure containing a number of data units or a number of pointers to data units or a number of search key/pointer pairs (the number may include only one data unit, one pointer or one key/pointer pair).
- a trie node is an array guiding the retrieval, having a size of two by the power of k (2 k ) elements. If an element in a trie node is in use, it refers either to a trie node at the next level in the directory tree or to a bucket. In other cases, the element is free (empty).
- Search in the database proceeds by examining the search key (which in the case of a subscriber database in a mobile telephone network or a telephone exchange, for instance, is typically the binary numeral corresponding to the telephone number of the subscriber) k bits at a time.
- the bits to be searched are selected in such a way that at the root level of the structure (in the first trie node), k leftmost bits are searched; at the second level of the structure, k bits next to the leftmost bits are searched, etc.
- the bits to be searched are interpreted as an unsigned binary integer that is employed directly to index the element array contained in the trie node, the index indicating a given element in the array. If the element indicated by the index is free, the search will terminate as unsuccessful.
- the routine branches off in the trie node either to a trie node at the next level or to a bucket. If the element refers to a bucket containing a key, the key stored therein is compared with the search key. The entire search key is thus compared only after the search has encountered a bucket. Where the keys are equal, the search is successful, and the desired data unit is obtained at the storage address indicated by the pointer of the bucket. Where the keys differ, the search terminates as unsuccessful.
- a bucketless trie structure has no buckets, but reference to a data unit is effected from a trie node at the lowest level of a tree-shaped hierarchy, called a leaf node. Unlike buckets, the leaf nodes in a bucketless structure cannot contain data units but only pointers to data units. Also a bucket structure has leaf nodes, and hence trie nodes containing at least one pointer to a bucket (bucket structure) or to a data unit (bucketless structure) are leaf nodes. The other nodes in the trie are internal nodes. Trie nodes may thus be either internal nodes or leaf nodes.
- Buckets are denoted with references A, B, C, D...H...M, N, O and P. Thus a bucket is a node that does not point to a lower level in the tree.
- Trie nodes are denoted with references IN1...IN5 and elements in the trie node with reference NE in Figure 1.
- a pointer is stored in each bucket to that storage location in the database SD at which the actual data, e.g. the telephone number of the pertinent subscriber and other information relating to that subscriber, is to be found.
- the actual subscriber data may be stored in the database for instance as a sequential file of the type shown in the figure.
- the search is performed on the basis of the search key of record H, for example, by first extracting from the search key the two leftmost bits (01) and interpreting them, which delivers the second element of node IN1 , containing a pointer to node IN3 at the next level. At this level, the two next bits (11) are extracted from the search key, thus yielding the fourth element of that node, pointing to record H.
- a bucket may contain (besides a search key) an actual data file (also called by the more generic term data unit).
- the data relating to subscriber A Figure 1 may be located in bucket A, the data relating to subscriber B in bucket B, etc.
- a key-pointer pair is stored in the bucket, and in the second embodiment a key and actual data are stored, even though the key is not indispensable.
- the search key may also be multidimensional. In other words, it may comprise a number of attributes (for example the family name and one or more forenames of a subscriber).
- a multidimensional trie structure is disclosed in international application No. PCT/FI95/00319 (published under number WO 95/34155).
- address computation is performed in such a way that a given predetermined number of bits at a time is selected from each dimension independently of the other dimensions.
- a fixed limit independent of the other dimensions is set for each dimension in any individual node of the trie structure, by predetermining the number of search key bits to be searched in each dimension.
- the memory circuit requirement can be curbed when the distribution of the values of the search keys is known in advance, in which case the structure can be implemented in a static form.
- the size of the nodes must vary dynamically as the key distribution changes. When the key distribution is uniform, the node size may be increased to make the structure flatter.
- the node size can be maintained small, which will enable locally a more uniform key distribution and thereby smaller storage space occupancy.
- Dynamic changes in node size presuppose implementation of address computation in such a way that in each node of the tree-shaped hierarchy constituted by the digital trie structure, a node-specific number of bits is selected from the bit string constituted by the search keys employed.
- the choice between a fixed node size and a dynamically changing node size is dependent for example on for what kind of application the memory is intended, for example what the number of retrievals, insertions and deletions to be made in the database is and what the proportions of these operations are.
- memories based on the digital trie structure are nevertheless at- tended by the problem of how the empty space inevitably created in the structure can be modelled in such a way that storage space occupancy will be as low as possible and memory efficiency (speed of memory operations) as good as possible.
- the first of these discloses a structure employing buckets and the second a structure not employing buckets.
- the basic idea of the invention is to compress such nodes in a digital trie structure that provide only a single path downward in a tree-shaped hierarchy.
- the data needed to proceed in the structure and for reorganization of nodes is stored in such a compressed node, without any storage space being required for (an) element array(s).
- the empty space present in the trie structure can be modelled in such a way that storage space occupancy in the structure will remain small with uniform as well as non- uniform key distributions.
- the solution enables the number of memory references requiring computation time to be minimized, thus making the efficiency (speed) of the memory as good as possible.
- each chain made up by successive compressed nodes is replaced with a single collecting node. This enables elimination of chains made up by successive compressed nodes as a result of limited word length. Elimination of chains will further improve memory efficiency and curb the need for storage space.
- the solution in accordance with the invention also ensures effective performance of set operations, as the structure is an order-preserving digital trie.
- Figure 1 illustrates the use of a unidimensional digital trie structure in the maintenance of subscriber data in a telephone exchange
- Figure 2 shows a multidimensional trie structure
- Figure 3 shows a memory structure in accordance with the invention
- Figure 4 illustrates implementation of address computation in the memory of the invention
- Figure 5 illustrates the structure of a trie node of the memory when the memory employs dynamic node size
- Figures 6a and 6b illustrate the principle of forming a compressed node
- Figures 7a and 7b show an example of the maintenance of the memory struc- ture
- Figure 8 illustrates the structure of a compressed node employed in the memory
- Figure 9a illustrates the limitation posed by the word length employed on combining the nodes
- Figure 9b shows the structure of a collecting node to be formed from the node chain of Figure 9a
- Figure 10 shows the memory arrangement in accordance with the invention on block diagram level.
- the trie structure has a multidimensional (generally n-dimensionai) implementation.
- a multidimensional structure is otherwise fully similar to the unidimensional structure described at the beginning, but the element array contained in the trie node is multidimensional.
- Figure 2 exemplifies a two-dimensional 2 2 *2 1 structure, in which one dimension in the element array comprises four elements and the other dimension two elements. Buckets pointed to from the elements in the trie node are indicated with circles in the figure.
- the size of the trie node in the direction of each dimension is 2 ki ele- ments, and the total number of elements S in the trie node is also a power of two:
- n integers (n>2), each of which may have a value in the range ⁇ 0,1...2 k
- the predetermined fixed parameter is the total length of the search key in each dimension. If for example one dimension of the search key has 256 attributes (such as first names) at most, the total length of the search key is 8 bits.
- Figure 3 shows an example of a node N10 used in the directory structure of the memory in accordance with the invention, employing a three- dimensional search key.
- the linearization is an arithmetic operation that can be performed on arrays of all sizes. Hence, it is ir- relevant whether the trie nodes or their element arrays are considered to be unidimensional or multidimensional, as multidimensional arrays are linearized in any case to be unidimensional.
- the elements in the array are numbered starting from zero (as shown in Figure 3), the number of the last element being one less than the product of the sizes of all dimensions.
- the number of an element is the sum of the products of each coordinate (for example in the three- dimensional case, the x, y and z coordinates) and the sizes of the dimensions preceding it. The number thus computed is employed directly to index the unidimensional array.
- the element number VA n is calculated in accordance with the above with the formula: where xe ⁇ 0,1,2,3 ⁇ , ye ⁇ 0,1 ⁇ and ze ⁇ 0,1, 2,3,4,5,6,7 ⁇ .
- the (n-dimensioned) element array of a trie node of an n- dimensional trie structure is linearized, in accordance with the above the size of each dimension is 2 ⁇ where k, is the number of bits to be searched at a time in the dimension concerned. If a coordinate in accordance with the dimension is denoted by reference a, (je ⁇ 0,1,2...n ⁇ ), the linearization can be written out as
- the linearization can be carried out by performing a multiplication in accordance with formula (3); yet it is expedient to perform the linearization by forming from the search key bits a bit string by known methods, the corresponding numeral indicating the element whose content provides the basis for proceeding in the directory tree.
- bit interleaving is a more efficient (rapid) method than the multiplication in accordance with formula (3), since when bit interleaving is used multiplications will be converted to additions and bit shifts, which are faster to perform.
- the most common way to implement bit interleaving is the 'z ordering'.
- Another possible bit interleaving method is the line ordering. In the present invention, it is advantageous to use line ordering, as it affords the most efficient address computation in memory searches, but any known bit interleaving method may be employed, as long as the same method is employed in all nodes of the structure.
- Figure 4 illustrates an example of address computation performed in the trie structure in accordance with the invention.
- the memory employs dynamically changing node sizes and that the space is three-dimensional (dimensions x, y and z).
- the search keys are listed one below another in the figure.
- the indexing bits of a unidimensional element array are shown in frames denoted by continuous lines.
- the leftmost bit in search key a y and the leftmost bit in search key a z are the leftmost bit in search key a y and the leftmost bit in search key a z .
- z ordering the order of the bits is always as presently shown, in other words, the first bit of the first dimension is first extracted, thereafter the first bit of the second dimension, thereafter the first bit of the third dimension, etc.
- the second bits are extracted from the different dimensions, starting from the first dimension. In this way, the following node-specific element array indices are obtained: 0 (node N1), 11 (node N2), 110 (node N3), 10 (node N4), 1010 (node N5), 10 (node N6) and 1100 (node N7).
- bit interleaving method such as line ordering
- the frames denoted by broken lines and the arrows pertaining to them illustrate the forming of an element array index in node N5, the memory employing bit interleaving with line ordering.
- line ordering all bits of each dimension are extracted at a time.
- the minimum number of bits to be extracted from the search keys of the different dimensions is first calculated in the node. This is obtained by dividing the number of bits searched in the node by the number of the dimensions and by truncating the obtained result to the closest integer.
- the number of bits to be searched in node N5 is four and the number of dimensions three, which gives a minimum number of one (that is, at least one bit must be extracted from the search key of each dimension). Thereafter it is still to be calculated how many additional bits must be extracted from the search keys of the different dimensions.
- the result 1 thus means that one additional bit is to be extracted. Extraction of additional bits is always started from the first searched dimension. In this exemplary case, one additional bit is thus extracted from the search key of dimension z. If the result had been two, one additional bit from the search key of dimension z and one additional bit from the search key of dimension x would have been extracted.
- bit string 1001 is obtained as the element array index of node N5; this bit string is depicted in the lower portion of Figure 4.
- FIG. 5 illustrates the structure of an ordinary trie node when dynamically changing node size is employed. In its minimum con- figuration, the node thus comprises only two parts: a field indicating the number of bits to be searched in the node (reference 51) and an element array (reference 52), the number of elements in the array corresponding to a power of two. For proceeding in the directory tree, in addition to the number of bits to be searched the type of each node must be known.
- This data can be stored in the directory structure for example in each node or in the pointer of the parent of the node.
- information can be encoded in the pointer on whether a zero pointer (an empty element) is concerned or whether the pointer points to an ordinary trie node, a bucket or a compressed trie node (which will be described hereinbelow).
- the encoding may be for example of the type shown in the figure.
- information on whether the pointer points to an uncompressed node, a compressed node or a data unit is stored.
- the node does not necessarily contain but an element array.
- compressed nodes are formed from the nodes of the trie structure in certain cases. If an ordinary trie node has only one child, this means that only one path downward in the tree passes through said trie node.
- a trie node containing only a single pointer (path downward) is replaced with a compressed node in which the number of bits searched in said path and the computed array index value are disclosed.
- compression also means that at least two child nodes are always maintained for ordinary (uncompressed) trie nodes in the memory structure, that is, an individual (ordinary) trie node has pointers to at least two different lower-level nodes (child nodes).
- a compressed node replaces one or more successive internal nodes, each of which has one child, and hence the above- stated one child cannot be a bucket (or a leaf in a structure that has no buckets). Hence, a child node must be an ordinary trie node in order for compression to be possible.
- the memory in accordance with the invention thus comprises two types of trie nodes: ordinary trie nodes containing an element array in accordance with Figure 5, and compressed nodes that will be described in the following.
- Figures 6a and 6b illustrate the principle of forming a compressed node. For simplicity, all nodes are presumed to have a size of two elements.
- FIGS 7a and 7b show a local maintenance example when data units and associated keys are deleted from a database.
- Figure 7a shows an initial situation in which the memory structure comprises trie nodes N111...N113 and buckets L2...L4. Thereafter bucket L2 and the pointer/record contained therein is deleted from the memory, as a result of which nodes N111 and N112 can be replaced with a compressed node CN, in which the index of the pointer contained in the node and the number of bits searched in the path replaced by the compressed node are disclosed.
- the compressed node is in principle similar to an ordinary trie node, but instead of the entire large-size element array with only one pointer being stored, the index of the pointer concerned and the number of bits searched in the path are stored.
- This creates the compressed node CN in accordance with Figure 7b, in which the number of bits searched in said path (3) and the index corresponding to said pointer (101 5 when bit interleaving with line ordering is used) are disclosed.
- a compressed node thus has a virtual array replacing the information contained in the one or more node arrays existing in the path. If the compressed node replaces several ordinary trie nodes, the number of searched bits indicated in the compressed node is equal to the sum of the numbers of bits searched in the replaced nodes.
- Figure 8 illustrates the structure of a compressed node.
- the mini- mum configuration of the node comprises 3 parts: field 120 indicating the number of searched bits, field 121 storing the value of the array index, and field 122 storing a pointer to a child node.
- the compressed node is in need of this data in order for the search to proceed with the correct value at the compressed node as well, and in order for the restructuring of the node to be pos- sible in connection with changes in the memory structure. (Without information on the number of searched bits, the array index value cannot be calculated from the search key, and on the other hand without the array index value the calculated value could not be compared to the value stored in the node.)
- a collision occurs in the compressed node in connection with an insertion, i.e. the compressed node will have a new pointer, it is studied which bit in order distinguishes the index of the initial pointer and the index of the new pointer. Accordingly, a structure replacing the initial compressed node is created, in which the new compressed node comprises the index bit number insofar as there are common bits. In addition, one or more trie nodes are created in the structure at points corresponding to those bits in which the indices differ from one another.
- the compressed node is preceded by one or more compressed nodes or a chain of trie nodes providing only a single path, it is advantageous in view of storage space requirement and memory efficiency to further combine said nodes. Moreover, in view of memory efficiency it is advantageous to carry out the combination of nodes in such a way that only in the compressed node that is the last (lowest) in the chain the number of searched bits is smaller than the word length in the computer used. In other words, nodes are combined in such a way that the number of searched bits will be as large as possible in each compressed node. For example, three successive com- pressed nodes in which the numbers of searched bits are 5, 10 and 15 can be combined into one compressed node in which the number of searched bits is 30.
- the search path or part thereof is replaced with a chain made up by several successive compressed nodes, in which the number of searched bits is the same as the word bit number, for example 32 in the Intel architecture, except for the last node where the number of bits is smaller than or equal to the word bit number.
- FIG. 9a Such a situation is depicted in Figure 9a, showing three successive compressed nodes CN1...CN3.
- the numbers of bits searched in the nodes are denoted by references b, b' and b" and the values of the array indices contained in the nodes with i, i' and i", respectively.
- the number of searched bits has a maximum value (providing that a 32- bit computer architecture is used). It is advantageous to form from a chain of several successive compressed nodes resulting from limited word length a single node collecting such compressed nodes.
- This collecting node is formed in such a way that the pointer of the collecting node is set to point to the child of the compressed node that is last in said chain, the sum of the numbers of bits searched in the compressed nodes in the chain is set as the number of bits B searched in the collecting node, and the array indices (i.e. search words) produced by bit interleaving are inserted in the list or table T of the node in the order in which they appear in the successive compressed nodes.
- the collecting node will be a node CN4 as shown in Figure 9b, comprising three parts: field 130 containing a pointer to said lower-level node, field 131 containing the number of searched bits B (the above sum), and list or table T containing in succession the array indices produced by bit interleaving.
- This third part thus has a varying size.
- the number of indices is three, since the example of Figure 9a comprises three successive nodes.
- the number of elements (i.e., indices) EN in table T is obtained from the number of searched bits B as follows:
- nodes containing one child will also be created in conjunction with uniform key distributions when the n-dimension of the structure is sufficiently large.
- a bucket cannot be preceded by a compressed node, but the parent node of a bucket is always either an ordinary trie node or an empty element.
- a compressed node cannot point to a bucket, but it always points either to another compressed node or to an ordinary trie node.
- An empty element means that if the total number of records is smaller that the number of pointers/records that the bucket can accommodate, a tree-shaped structure is not needed yet, but one bucket will suffice in the structure (in which case said node is conceptually preceded by an empty element). It is advantageous to proceed in this way at the initial phase of starting up the memory. It is thus worth-while starting building up the tree-shaped structure only when this is necessary.
- the retrievals, insertions and deletions to be carried out in the memory are performed in a manner known per se.
- the memory may also employ functional updating implemented by known methods by copying the path from root to buckets.
- the above-described compres- sion principle also relates to a bucketless trie structure.
- the equivalent of a bucket is a data unit (to which a leaf node in the bucketless structure points).
- Figure 10 shows a memory in accordance with the invention on block diagram level.
- Each dimension has a dedicated input register, and hence there is a total of n input registers.
- the search key of each dimension is stored in these input registers, denoted by references Rv-.R,-, each key in a register of its own.
- the input registers are connected to a register TR in which the above-described search word is formed in accordance with the bit interleaving method employed.
- the register TR is connected via adder S to the address input of memory MEM.
- the output of the memory in turn is connected to address register AR the output of which in turn is connected to adder S. Initially the bits selected from each register are read into the common register TR in the correct order.
- the initial address of the first trie node is first stored in the address register AR, and the address obtained as an offset address from register TR is added to the initial address in adder S.
- the resulting address is supplied to the address input of the memory MEM, and the data output of the memory provides the initial address of the next trie node, the address being written into the address register AR over the previous address stored therein.
- the next selected bits are again loaded from the input registers into the common register TR in the correct order, and the array address thus obtained is added to the initial address of the relevant array (i.e., trie node), obtained from the address register AR.
- This address is again supplied to the address input of the memory MEM, the data output of the memory thereafter providing the initial address of the next node.
- the above-described procedure is repeated until the desired point has been accessed and recordal can be performed or the desired record read.
- Control logic CL attends to the compression and to the correct number of bits being extracted from the registers in each node. If dynamically changing node sizes are employed in the memory, the control logic also at- tends to maintenance of node sizes.
- the rapidity of the address computation can be influenced by the type of hardware configuration chosen. Since progress is by way of the above- stated bit manipulations, address computation can be accelerated by shifting from use of one processor to a multiprocessor environment in which parallel processing is carried out. An alternative implementation to the multiprocessor environment is an ASIC circuit.
- Com- pression may, for example, be implemented in part of the memory only. The structure may also be implemented for keys of variable length. As was already stated at the beginning, the solution can be applied regardless of whether fixed or changing node size is employed in the memory.
- a bucket is a data structure that may also contain another trie structure.
- several directory structures in accordance with the present invention can be linked in succession in such a way that another directory structure (that is, another trie structure) is stored in a bucket, or a pointer contained in a bucket or a leaf points to another directory structure. Reference from a bucket or a leaf is made directly to the root node of the next directory structure.
- a bucket contains at least one element so that the type of an individual element is selected from a group comprising a data unit, a pointer to a stored data unit, a pointer to another directory structure and another directory structure.
- the detailed implementation of buckets is dependent on the application. In many cases, all elements in buckets may be of the same type, being e.g. either a data unit or a pointer to a data unit.
- the bucket may contain element pairs in such a way that all pairs in the bucket are either pointer to data unit/pointer to directory structure pairs or data unit/pointer to a directory structure pairs or data unit/directory structure pairs. In such a case, for example, the prefix of the character string may be stored in the data unit and the search may be continued from the directory structure that is the pair of the data unit.
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EP98908123A EP0976066A1 (en) | 1997-03-14 | 1998-03-04 | Method for implementing an associative memory based on a digital trie structure |
AU66240/98A AU6624098A (en) | 1997-03-14 | 1998-03-04 | Method for implementing an associative memory based on a digital trie structure |
US09/389,574 US6505206B1 (en) | 1997-03-14 | 1999-09-03 | Method for implementing an associative memory based on a digital trie structure |
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FI971067A FI102426B1 (en) | 1997-03-14 | 1997-03-14 | Method for implementing memory |
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Also Published As
Publication number | Publication date |
---|---|
FI102426B (en) | 1998-11-30 |
WO1998041933A8 (en) | 1999-06-03 |
EP0976066A1 (en) | 2000-02-02 |
AU6624098A (en) | 1998-10-12 |
US6505206B1 (en) | 2003-01-07 |
FI971067A (en) | 1998-09-15 |
FI971067A0 (en) | 1997-03-14 |
FI102426B1 (en) | 1998-11-30 |
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