WO1998057458A1

WO1998057458A1 - Methods and apparatus for line switching, correlating data streams and clock regeneration

Info

Publication number: WO1998057458A1
Application number: PCT/NZ1998/000080
Authority: WO
Inventors: Arnim Holger Littek; James Stephen Worthington; Michael Pot; Simon Peacock
Original assignee: Digi-Tech Research And Development Limited
Priority date: 1997-06-10
Filing date: 1998-06-10
Publication date: 1998-12-17
Also published as: AU7943098A

Abstract

A method of correlating data streams by generating tags based upon the data contained within blocks of the data streams and correlating the tags to align the data streams. There is further disclosed a method for selecting the most reliable data stream by generating tags associated with blocks of data that represent the quality of the data and/or line conditions and selecting the data stream having the tag with the best value. Historical tag values may also be used to control switching. There is also disclosed a method of generating an outgoing clock signal derived from switched time shifted incoming data streams. In the method timing signals are obtained from first and second data streams and relatively time shifted to align the timing signals. In this way either the first timing signals or time delayed second timing signals can alternately be used to generate an outgoing clock signal. Apparatus for implementing the methods is also disclosed.

Description

METHODS AND APPARATUS FOR LINE SWITCHING, CORRELATING DATA STREAMS AND CLOCK REGENERATION

The Technical Field

The present invention relates to a method and apparatus for correlating data streams, a method and apparatus for switching data streams and a method and apparatus for generating a common outgoing clock signal derived from two or more time displaced data streams. More particularly, but not exclusively, the present invention relates to a method and apparatus for switching data streams to maintain optimum output data accuracy, by selecting the data stream that is most likely to carry the correct data.

Background of the Invention

In a number of applications dual data paths are provided to maintain a continuous data link between two points at a required level of reliability. For example, foreign exchange traders need to receive the most up-to- date market information and ensure that any orders transmitted to a service provider are conveyed accurately, with minimal chance of service interruption. To ensure this, dual data paths are provided between a dealer and service provider to ensure continuous and reliable connection. An operator may monitor the data flowing on both lines and if there is a fault on one line manually switch to the other line. Such a system is rather crude in simply monitoring the presence of data rather than the quality of data transmitted.

In other applications, the line condition of two data paths may be monitored and data from the line having the best line condition may be output. Again, this approach has the drawback that data selection is simply made on the basis of line condition and not on the quality of the data received.

In some systems data returned via one of the data paths must be synchronised to the clock recovered from the incoming data stream. It may take different amounts of time for data sent along two incoming data paths to reach a subscriber. There will also be a certain amount of jitter in each clock recovered from each incoming data stream. When data paths are switched in such a situation there may be a cumulated temporal displacement in the recovered clock signal used to transmit the return data. This may cause the return data to be rejected by the telecommunications network resulting in reinitialisation of the communication links.

Disclosure of the Invention

It is an object of the present invention to overcome these problems or to at least provide the public with a useful choice.

According to a first aspect of the invention there is provided a method of correlating first and second data streams comprising: generating tags based upon and associated with blocks of the data streams; and correlating the tags of the data streams so as to align the first and second data streams.

Preferably the tags are positioned relative to their associated blocks. Preferably the tags are inserted into the respective data streams following respective blocks of the received data streams. The tags for each data stream are preferably based upon data within a block and inserted after the respective block. The first and second data streams are preferably from a common source and sent via two different data paths.

There is further provided an apparatus for correlating first and second data streams comprising: means for generating tags based upon data contained in blocks of the data streams; means for associating the tags with respective blocks of the data streams; means for correlating the tags of the data streams so as to correlate the first and second data streams. According to a further aspect there is provided a method of switching between first and second data streams comprising: receiving first and second data streams; generating tags associated with blocks of the first and second data streams indicative of the quality of the data and/or the line conditions upon which the data is conveyed; and selecting a data stream to output based upon the values of the tags associated with respective corresponding blocks. The selection of data streams may also be based upon an historical analysis of the values of the tags over time, or other information such as inherent error rates for the types of connection or lines used.

There is also provided a switch comprising: encoders for generating tags indicative of the quality of the data and/or the line conditions upon which the data is conveyed; and switching means for selectively outputting the first or second data stream in dependence upon the values of the tags associated with respective corresponding blocks.

According to a further aspect of the invention there is provided a method of generating a clock signal to synchronise data to be sent to a synchronised network based on first and second time shifted data streams of regular continuous frames received from the synchronised network; said method comprising: deriving first and second timing signals from the first and second data streams respectively; relatively time shifting the second timing signals so as to align the first and second timing signals; and alternately selecting the first timing signals or the time shifted second timing signals to generate an outgoing clock signal.

There is also provided a clock regenerating system for generating an outgoing clock signal comprising: detecting means for extracting first and second timing signals from first and second data streams; shift means for relatively shifting the second timing signals relative to first timing signals; and comparator means for comparing the first timing signals of the first data stream and the relatively time shifted second timing signals of the second data stream and controlling the shifting means to align the first timing signals and the relatively time shifted second timing signals.

For the E1 protocol, the timing signals are preferably the frame alignment signals of alternate frames of each data stream. The outgoing clock signal is preferably generated by a phase locked loop responsive to the first or second time shifted timing signals. Where further data streams are received from the network, the time shifted timing signals of each data stream may be delayed with respect to the timing signals of the first data stream to align the further timing signals with the first timing signals. During disruption to one data stream the delay applied between the timing signals preferably remains fixed.

Brief Description of the Drawings

The invention will now be described by way of example with reference to the accompanying drawings in which:

Figure 1 : shows a configuration in which a network supplies data via two data paths to a subscriber.

Figure 2: shows a configuration in which one network is connected to another network via dual data paths.

Figure 3: shows a configuration in which one subscriber is connected to another subscriber via different data paths.

Figure 4: shows an RF connection between a broadcaster and a receiver employing diverse antennas. Figure 5: shows a bidirectional RF link employing diverse receiving antennas on either side.

Figure 6: shows a configuration employing one land line data path and one radio data path.

Figure 7: shows a configuration in which two users are connected via dual data paths.

Figure 8: shows a block diagram of equipment used at either end to correlate data streams.

Figure 9: shows a number of frames of data formatted according to the ITU-T E1 protocol.

Figure 10: shows the E1 protocol after being formatted according to the tag protocol.

Figure 1 1 : illustrates correlation between data streams.

Figure 1 2: shows schematically a two-way link between a user and a telecommunications provider.

Figure 1 3: illustrates time displacement between two data streams.

Figure 14: shows a block diagram of a clock regenerating circuit.

Figure 1 5: shows an alternative implementation for correlating data streams.

Best mode for carrying out the invention

The following is a description of a system which receives two data streams formatted according to the E1 protocol. It will be appreciated that when other protocols are employed not all aspects of the invention will be required (e.g. HDLC may not require the clock regenerating technique). It will also be appreciated that these methods may be used to combine more than two feeds to provide better redundancy and a more reliable output.

Figures 1 to 6 show a number of configurations in which the present invention may be employed in which like integers in each drawing have been given the same numbers. In the configuration shown in figure 1 , node 1 of network 2 is connected to subscriber 3 by data paths 4 and 5. This configuration increases the reliability of the connection from node 1 to subscriber 3 compared to that provided by a single data path. Splitter/switches 6 and 7 are provided at either end of the link to split the outgoing data stream and select one of the incoming data streams.

The configuration of figure 2 is similar to that of figure 1 except that node

1 is connected to node 8 of a second network. Such a configuration may be used to increase the reliability of a network where alternate routing does not exist.

Figure 3 shows a configuration in which subscriber 9 is connected by data links 10 and 1 1 provided by different telecommunications providers. In this case a user may maximise connection diversity by using circuits from two different circuit providers.

Figure 4 shows a configuration in which information from a broadcaster

1 2 is transmitted via an RF transmitter 1 3 and received by antennas 14 and 1 5 which supply two data streams to switch 16 which selects one data stream as output 17. Antenna 13 may be broadcasting, for example, programming to be supplied to a cable network, in which case it may be imperative that continuity of the feed be maintained. Should an aircraft, for example, fly over one of antenna 14 or 1 5 one link may be broken. In this situation switch 1 6 must switch to the feed providing the highest quality data to provide continuous programming at output 17.

Figure 5 shows a configuration employing bidirectional RF links. Data from network 18 is sent via switch 1 9 to antenna 20 which transmits to antennas 23 and 24. The two signals from antenna 23 and 24 are supplied to switch 26 which selects the signal having the highest quality to be provided to subscriber 27. Data transmitted from subscriber 27 passes via switch 26 to antenna 25 and is transmitted to antenna 21 and 22. Switch 1 9 selects the highest quality data from antenna 21 or 22 to be provided to network 18.

Figure 6 shows a configuration in which a splitter/switch 30 routes one data stream via land line 31 and the other data stream via RF link 32 to splitter/switch 33.

Referring now to figure 7, a particular configuration is shown in which a subscriber 40 is connected to subscriber 41 via data paths 42 and 43 via modems 44 to 47 and splitter/switches 48 and 49. Data sent from subscriber 40 is split by splitter/switch 48 so as to send identical data streams via data links 42 and 43 to splitter/switch 49. Splitter/switch 49 selects the data stream received from datalink 42 or 43 having the highest quality and provides this to subscriber 41 .

Figure 8 is a block diagram of splitter/switch 48 or 49. The operation of the splitter/switch will be described in more detail in conjunction with figures 9 to 1 1 . Figure 9 shows four frames of data F1 to F4 formatted according to ITU-T E1 protocol. Frame F1 comprises thirty-two 8 bit code words C1 to C32. Code word C1 is used for transmitting frame alignment and other information. Code word C-| contains a data bit Si that may carry error checking data. A frame alignment code word is sent in every alternate frame. Within every frame containing a frame alignment code word the bit Sj may be used to transmit a cyclic redundancy code (CRC). A four bit CRC is generated for every eight frames and transmitted using the Si bit of alternate frames.

The cyclic redundancy code transmitted is the cyclic redundancy code calculated for the preceding eight frames. At the receiving end the transmitted cyclic redundancy code is compared with the cyclic redundancy code calculated for the corresponding eight data frames as actually received. This enables a receiver to monitor to some extent the accuracy of data-transmission. However, simply transmitting a 4 bit CRC for every 2,048 bits of data does not in itself allow determination of the accuracy of data transmission to a high level.

Data links 42 and 43 may be of different types (land line or RF links) and/or there may be temporal delays between data transmission on link 42 and link 43. Accordingly, although the frames may be transmitted from splitter/switch 48 at the same time, there will normally be a different delay between first and second data streams received via link 42 and link 43 at splitter/switch 49.

In order to align frames of data received via links 42 and 43 (fig 7) representative hash tags are created to enable correlation. For each frame a hash tag CRC_n in the form of another cyclic redundancy code is generated based upon the data of frame F_n (see figure 10). It will be appreciated that the hash tag CRC_n need not be a CRC but may be any data segment generated on the basis of the data contained in an associated data block. In this example, data from lines 50 and 51 is used to generate the hash tags by encoders 52 and 53. Encoders 52 and 53 may be programmable gate arrays which can be designed to format received data into tags, automatically generating a cyclic redundancy code for each frame.

The output of encoders 52 and 53 is input into adjustable length buffers 54 and 55. Frame alignment control means 56 compares only the hash tags (CRC₀ - CRC2 etc ) between frames (see figure 1 1 ) so as to align first and second data streams. As the data streams in this example are sent at 2 Mbps, comparing only the cyclic redundancy codes reduces the required operating speed of frame alignment control means 56. As the CRCs are based upon the data of associated frames, the CRCs are sufficiently unique to enable accurate alignment of data streams. Increased accuracy can be obtained by comparing a larger number of pairs of hash tags and/or using knowledge of the data content and structure. The frame alignment control alters the speed at which data is clocked through each adjustable length buffer 54, 55 to ensure that the frame selection switch receives the correlation and line quality information in order to select the most suitable data.

It will be appreciated that the hash tags do not necessarily need to be inserted in the data streams. They may for example be stored in parallel buffers which are clocked with the respective data streams. All that is required is that there is some association between the hash tag and data block.

At the same time as encoders 52 and 53 insert hash tags into the first and second data streams, tags M1 , M2 etc are also inserted which are measures of goodness of the respective channels. The M tags may be based upon:

i) Line condition as measured by the translation of the line code from the inputs 50,51 .

ii) The state of E1 decoder synchronisation (AIS, FA, MFA).

iii) The quality of data based upon CRCs included in the E1 protocol (i.e. for a particular submultiframe does the CRC received match the CRC calculated for the frame received - i.e. the CRC4 sum).

iv) HDB3 code errors

In a typical application the weighting given to each parameter may be in order of decreasing importance, as follows:

i) loss of line ii) AIS - (Alarm indicator signal) iii) FA - (Frame alignment error) iv) MFA - (multiframe alignment error) v) CRC4 Sum error vi) HDB3 code error Switch 57 compares the M field values for the correlated frames and uses this information to assist in selecting the best data channel to supply data to output 58.

Switch 57 may operate in a number of modes. In a balanced mode equal weighting may be given to each channel. Accordingly, the channel which normally supplies the output may be determined on the basis of the channel having the best historical M value, on average. The average M value may be calculated over a limited number of frames (e.g. 1000 frames) with historical average M values (i.e. M values for each 1000 frames) being averaged over a much larger number of frames (e.g. 1 million frames). The average M value may simply represent the percentage of occasions upon which the channel concerned is selected.

The switching algorithm may include hysteresis to ensure that the switch is not constantly switching back and forth. Accordingly, the switch may only switch to the other channel if a greatly superior M value is detected or the M value is slightly superior for a number of frames.

As the characteristics of different systems may vary greatly it may be appropriate to employ more advanced switching techniques, such as the use of a neural network, to control switching between data streams based upon weightings developed for each parameter over time.

The switch/splitter may also operate in primary/secondary mode where the primary channel is preferred unless specific error indications illustrate a specific frame or submultiframe should be substituted from an unerrored secondary channel.

Switching in both modes may be dependent upon the historical accuracy of each channel. One channel may be selected if it has the greatest historical accuracy unless the accuracy of that channel is below a certain level for a certain frame or frames and the accuracy of the other channel is sufficiently better for that frame or frames. The particular algorithm used may be varied depending upon the particular application.

It will be appreciated that operation of splitter/switch 57 may be under microprocessor control with historical data and algorithms stored in memory.

It will also be appreciated that switching between channels may be performed either on a frame by frame basis or a submultiframe basis.

Any checking done by submultiframe CRCs such as used in the E1 protocols can only provide error information permitting substitution of submultiframes. Error detection done on line code levels would best be done at an individual bit level, but cannot be done until after alignment, which permits no substitution at levels smaller than a single frame.

Data to be sent in the other direction is supplied to input line 59 and is split by splitter 60 into identical data streams output via lines 61 and 62.

When switching between data streams a problem arises when data is to be transmitted back to a synchronous network. Referring to figure 1 2 a network 70 includes a reference clock 71 which is the reference used to format signals transmitted via communication paths 72 and 73. Where data is to be transmitted back to the network, splitter/switch 74 must extract a clock signal to be supplied to multiplexer 75 to enable it to synchronise data to be transmitted back to network 70 via path 76.

As shown in figure 1 3 there may be a large temporal displacement t between first and second data streams A and B. There will also be a certain amount of jitter in the clock signals extracted from streams A and

B. Simply switching from channel 72 to channel 73 would result in sudden displacement of timing information supplied to multiplexer 75.

If a data path is interrupted and restarted the delay applied before interruption is initially applied. If the delay becomes too great (i.e. the difference is too great to allow data switching) an alarm may be activated for that channel. An operator can then bring the line down and up again to re-establish that data path.

Further, as network 70 might only be able to deal with jitter of a few bits, the cumulative effect of gaining or losing a number of bits may result in reinitialisation of the link, thus losing data carrying capacity for a period of time.

To overcome this problem a clock regenerating circuit as shown in figure 14 may be employed. From the first data stream supplied via line 80 the frame alignment signal is extracted as it occurs in every second frame and output by detector 82. Likewise, the frame alignment signal of the second data stream on line 81 is extracted and output by detector 83. The frame alignment signal from the first data stream is provided directly to line 84. The frame alignment signal for the second data stream passes through variable delay 85 and the delayed frame alignment signal is output on line 86. It will be appreciated that relative time shifting of the signals is all that is required, although this will usually be a delay.

Correlation means 87 compares the frame alignment signals on lines 84 and 86 and adjusts the delay of delay means 85 so that the frame alignment signals output on lines 84 and 86 are correlated. Switch 88 selects the frame alignment signal on line 84 or line 86 to be used for clock regeneration based upon the quality of the clock signal from each line, which may be a different line to the line which supplies data (i.e. one line may supply the clock signal and the other may supply the data). As it is desirable to minimise switching between lines providing the clock source it may be that switching between lines to obtain the most accurate data may be more frequent than switching between lines to switch the clock source. The frame alignment signal selected is supplied via line 89 to phase locked loop 90. The frame alignment signal from line 89 is input to multiplier 91 , the output of which is filtered by filter 92 and supplied to voltage controller oscillator 93. The output of voltage controller oscillator 93 is the regenerated clock signal which is applied via line 94 to synchronise outgoing data. The output of the voltage controlled oscillator 93 is divided by divider 95 and input to the second input of multiplier 91 . Where frame alignment signals are extracted from data streams formatted according to the E1 protocol the divider will divide by 51 2 (i.e. one frame alignment signal every 51 2 bits). The value will of course vary according to the protocol employed.

Figure 15 shows an alternative system for correlating data streams. In this system a first data stream is supplied to line 100 and a second data stream is applied to 101 . The second data stream passes through a variable delay buffer 102, where it is known that the second data stream is delayed with respect to the first data stream. The output 103 of variable delay buffer 102 and the first data stream are applied to cross correlator 104. Cross correlator 104 compares the input data streams from lines 100 and 103 in a bitwise manner and adjusts the delay of variable delay buffer 102 until the first data stream and delayed second data stream are aligned.

The splitter/combiner may include a fail safe mechanism so that should there be a power failure or system failure a chosen line is permanently selected as the default line. This line may be permanently selected or it may be the line having the highest historical accuracy. A certain degree of hysteresis may be provided to avoid frequent changing of the default line. The splitter/switch may be microprocessor controlled and include communication means to enable it to be remotely controlled and managed. Local and remote alarms may also be included.

It will thus be seen that the present invention provides a cost effective and efficient means of correlating data streams transmitted at a high rate. The invention also provides a method of ensuring accuracy of data in a dual channel system by selecting channels based on data quality. The invention also provides an effective clock regeneration method for regenerating a clock from multiple data channels received from a synchronous network.

Although the present invention has been described in relation to a system employing two data paths it will be appreciated that any desired number of data paths may be employed and the claims should be interpreted as including systems utilising 3 or more data paths. Where 3 or more data paths are used majority voting may be employed to control switching between data paths.

It will be appreciated that the present invention may be utilised over any type of communication link including land line, RF, optical or sonic links. It will also be appreciated that the correlation method may have application outside the specific embodiment herein described.

Where in the foregoing description reference has been made to integers or components having known equivalents then such equivalents are herein incorporated as if individually set forth.

Although this invention has been described by way of example it is to be appreciated that improvements and/or modifications may be made thereto without departing from the scope of the present invention as defined in the appended claims.

Claims

CLAIMS:

1 . An apparatus for correlating first and second data streams comprising: means for generating tags based upon data contained in blocks of the data streams; means for associating the tags with respective blocks of the data streams; means for correlating the tags of the data streams so as to correlate the first and second data streams.

2. An apparatus as claimed in claim 1 wherein the means for associating the tags positions the tags in the data streams adjacent their associated blocks.

3. An apparatus as claimed in claim 2 wherein the means for associating the tags inserts the tags into the respective data streams following respective blocks of the data streams.

4. An apparatus as claimed in any one of the preceding claims wherein the tags are based upon the data contained within associated blocks.

5. An apparatus as claimed in claim 4 wherein the tags are in the form of cyclic redundancy codes.

6. An apparatus as claimed in any one of the preceding claims including: encoders for receiving each data stream and for generating tags associated with respective data blocks; adjustable length buffers for receiving the outputs of the encoders; and alignment control means for correlating the tags and controlling the output of the buffers to align the data streams.

7. An apparatus as claimed in claim 6 including a switch which receives outputs from the buffers and selectively outputs one of the data streams.

8. A method of correlating first and second data streams comprising: generating tags based upon and associated with blocks of the data streams; and correlating the tags of the data streams so as to align the first and second data streams.

9. A method as claimed in claim 8 wherein the tags are positioned relative to their associated blocks.

10. A method as claimed in claim 8 or claim 9 wherein the tags are inserted into the respective data streams following respective blocks of the data streams.

1 1 . A method as claimed in any one of claims 8 to 10 wherein the tags of each data stream are based upon data within a block and inserted after the respective block.

1 2. A method as claimed in any one of claims 8 to 1 1 wherein the first and second data streams are sent from a common source via different data paths.

13. A method of switching between first and second data streams comprising: receiving first and second data streams; generating tags associated with blocks of the first and second data streams indicative of the quality of the data and/or the line conditions upon which the data is conveyed; and selecting a data stream to output based upon the values of the tags associated with respective corresponding blocks.

14. A method as claimed in claim 1 3 wherein the tags are indicative of the quality of the data contained within the respective blocks.

5. A method as claimed in claim 1 3 or claim 14 wherein the tags are indicative of the quality of the line conditions for the line upon which the data is conveyed.

6. A method as claimed in any one of claims 1 3 to 1 5 wherein the selection of a data stream is based upon an historical analysis of the values of the tags over time.

1 7. A method as claimed in claim 1 6 wherein the selection of data streams is based upon an historical analysis of the average values of the tags over time.

18. A method as claimed in claim 1 3 or claim 14 wherein the measure of data quality is at least partially based upon cyclic redundancy or other check codes included in the data streams according to the protocol under which the data streams are encoded.

1 9. A method as claimed in any of claims 1 3 to 1 8 wherein the tags are at least partially based upon the state of decoder synchronisation.

20. A method as claimed in any one of claims 1 3 to 1 9 wherein the tags are at least partially based upon coding error data.

21 . A method as claimed in any one of claims 1 3 to 20 wherein one data stream is selected unless the tags of the other data stream are of a markedly better measure of quality than the tags for the selected channel.

22. A method as claimed in any one of claims 13 to 20 wherein the second data stream will not be selected unless the tags for that data stream are markedly better than those for the first data stream or the tags for the second data stream have been better than the tags for the first data stream for a predetermined period.

23. A switch comprising: encoders for generating tags indicative of the quality of the data and/or the line conditions upon which the data is conveyed; and switching means for selectively outputting the first or second data stream in dependence upon the values of the tags associated with respective corresponding blocks.

24. A switch as claimed in claim 23 wherein the encoders generate tags based upon the quality of the data of the associated blocks.

25. A switch as claimed in claim 23 or claim 24 wherein the encoder generates tags in dependence upon the line conditions for the line upon which the data is conveyed.

26. An apparatus as claimed in claim 23 wherein the encoding means generates tags in dependence upon the state of coder synchronisation.

27. A switch as claimed in any one of claims 23 to 26 wherein the encoders generate tags in dependence upon coding errors of the data streams.

28. A switch as claimed in any one of claims 23 to 27 wherein the switching means selects a preferred data stream unless the value of the tag for a block of data is markedly better for another data stream or the values of the tags for an another data stream have been better for a predetermined period of time.

29. A switch as claimed in any one of claims 23 to 27 wherein the switching means selects the output data stream based upon historical average values of the tags.

30. A switch as claimed in any one of claims 23 to 29 wherein said switching means incorporates hysteresis means which limits switching until the tags of an alternate data stream have been of a better value for a predetermined time, unless the tag of an alternate stream is markedly superior for a particular data block.

1 . A method of generating a clock signal to synchronise data to be sent to a synchronised network based on first and second time shifted data streams of regular continuous frames received from the synchronised network; said method comprising: deriving first and second timing signals from the first and second data streams respectively; relatively time shifting the second timing signals so as to align the first and second timing signals; and alternatively selecting the first timing signals or the time shifted second timing signals to generate an outgoing clock signal.

32. A method as claimed in claim 31 wherein the relative time shifting is a delay of the second timing signals.

33. A method as claimed in claim 31 or claim 32 wherein the timing signals are frame alignment signals of the data streams.

34. A method as claimed in any one of claims 31 to 33 wherein, where one or more further data stream is employed, relatively time shifting the timing signals of the or each further data stream so as to align the or each further timing signals with the first timing signals and selecting one of the first, second or further timing signals to generate an outgoing clock signal.

35. A method as claimed in any one of claims to 31 to 34 wherein, during interruption of one of said first and second data streams, the relative time shift between data streams is stored and used as the initial time shift between data streams when the lost data stream is restored.

36. A clock regenerating system for generating an outgoing clock signal comprising: detecting means for extracting first and second timing signals from first and second data streams; shift means for relatively shifting the second timing signals relative to first timing signals; and comparator means for comparing the first timing signals of the first data stream and the relatively time shifted second timing signals of the second data stream and controlling the shifting means to align the first timing signals and the relatively time shifted second timing signals.

37. An apparatus as claimed in claim 36 further including switching means for selectively outputting the first timing signals or the relatively time shifted second timing signals.

38. An apparatus as claimed in claim 38 including a phase locked loop which receives timing signals from the switching means and outputs a clock signal to synchronise data to be sent to a synchronised network.

39. An apparatus as claimed in any one of claims 36 to 38 wherein the comparator means includes memory means for storing the relative time shift between the first and second timing signals and storing this value when one or both of the first and or second timing signals are absent.

40. An apparatus comprising an apparatus as claimed in any one of claims 36 to 39 in combination with an apparatus as claimed in any one of claims 1 to 7.

41 . An apparatus comprising an apparatus as claimed in any one of claims 36 to 39 in combination with a switch as claimed in any one of claims 23 to 30.

42. An apparatus comprising an apparatus as claimed in any one of claims 1 to 7 and a switch as claimed in any one of claims 23 to 30.