WO1999010916A3 - Copper electroless deposition on a titanium-containing surface - Google Patents

Copper electroless deposition on a titanium-containing surface Download PDF

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Publication number
WO1999010916A3
WO1999010916A3 PCT/US1998/017276 US9817276W WO9910916A3 WO 1999010916 A3 WO1999010916 A3 WO 1999010916A3 US 9817276 W US9817276 W US 9817276W WO 9910916 A3 WO9910916 A3 WO 9910916A3
Authority
WO
WIPO (PCT)
Prior art keywords
titanium
containing surface
electroless deposition
copper electroless
copper
Prior art date
Application number
PCT/US1998/017276
Other languages
French (fr)
Other versions
WO1999010916A2 (en
Inventor
Karl Robinson
Ted Taylor
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to AU91103/98A priority Critical patent/AU9110398A/en
Priority to KR1020007001830A priority patent/KR100578676B1/en
Priority to JP2000508134A priority patent/JP3388230B2/en
Publication of WO1999010916A2 publication Critical patent/WO1999010916A2/en
Publication of WO1999010916A3 publication Critical patent/WO1999010916A3/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76885By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/903Catalyst aided deposition
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/945Special, e.g. metal
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/976Temporary protective layer

Abstract

A method for depositing copper on a titanium-containing surface of a substrate is provided. The method includes forming a patterned catalyst material on the substrate, such that the titanium-containing surface is exposed in selected regions. The catalyst material has an oxidation half-reaction potential having a magnitude that is greater than a magnitude of a reduction half-reaction potential of titanium dioxide. Copper is then deposited from an electroless solution onto the exposed regions of the titanium-containing surface.
PCT/US1998/017276 1997-08-22 1998-08-20 Copper electroless deposition on a titanium-containing surface WO1999010916A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
AU91103/98A AU9110398A (en) 1997-08-22 1998-08-20 Copper electroless deposition on a titanium-containing surface
KR1020007001830A KR100578676B1 (en) 1997-08-22 1998-08-20 Copper electroless deposition on a titanium-containing surface
JP2000508134A JP3388230B2 (en) 1997-08-22 1998-08-20 Electroless copper plating on titanium-containing surface

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/916,219 1997-08-22
US08/916,219 US6054173A (en) 1997-08-22 1997-08-22 Copper electroless deposition on a titanium-containing surface

Publications (2)

Publication Number Publication Date
WO1999010916A2 WO1999010916A2 (en) 1999-03-04
WO1999010916A3 true WO1999010916A3 (en) 1999-08-05

Family

ID=25436897

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1998/017276 WO1999010916A2 (en) 1997-08-22 1998-08-20 Copper electroless deposition on a titanium-containing surface

Country Status (5)

Country Link
US (4) US6054173A (en)
JP (1) JP3388230B2 (en)
KR (1) KR100578676B1 (en)
AU (1) AU9110398A (en)
WO (1) WO1999010916A2 (en)

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US6054173A (en) 1997-08-22 2000-04-25 Micron Technology, Inc. Copper electroless deposition on a titanium-containing surface
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US6380083B1 (en) * 1998-08-28 2002-04-30 Agere Systems Guardian Corp. Process for semiconductor device fabrication having copper interconnects
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US7262130B1 (en) * 2000-01-18 2007-08-28 Micron Technology, Inc. Methods for making integrated-circuit wiring from copper, silver, gold, and other metals
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Also Published As

Publication number Publication date
AU9110398A (en) 1999-03-16
JP2001514334A (en) 2001-09-11
US6054172A (en) 2000-04-25
KR20010023201A (en) 2001-03-26
JP3388230B2 (en) 2003-03-17
US6054173A (en) 2000-04-25
WO1999010916A2 (en) 1999-03-04
US6126989A (en) 2000-10-03
US6326303B1 (en) 2001-12-04
KR100578676B1 (en) 2006-05-12

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