WO1999021230A1 - Field effect semiconductor component - Google Patents
Field effect semiconductor component Download PDFInfo
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- WO1999021230A1 WO1999021230A1 PCT/DE1998/003001 DE9803001W WO9921230A1 WO 1999021230 A1 WO1999021230 A1 WO 1999021230A1 DE 9803001 W DE9803001 W DE 9803001W WO 9921230 A1 WO9921230 A1 WO 9921230A1
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- electrode
- semiconductor component
- gate
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- electrical semiconductor
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 64
- 230000005669 field effect Effects 0.000 title description 8
- 239000004020 conductor Substances 0.000 claims description 5
- 230000000295 complement effect Effects 0.000 claims description 2
- 230000008901 benefit Effects 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41758—Source or drain electrodes for field effect devices for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular
Definitions
- the invention relates to an electrical semiconductor component with electrodes that form the source and drain, and at least one gate electrode with a gate width.
- the invention further relates to an electrical circuit which contains at least one electrical semiconductor component, the semiconductor component having electrodes which form source and drain and at least one gate electrode.
- Such an electrical semiconductor component can be, for example, a field effect transistor with an insulating layer (OSFET / MISFET) or with a barrier layer (junction FET).
- OSFET / MISFET insulating layer
- junction FET barrier layer
- the gate electrode serves as a control electrode, which controls the resistance in a current channel between the source and the drain.
- the output signal is usually tapped at the drain.
- a fourth connection is sometimes also present, for example to the semiconductor die, that is to say the substrate on which the current channel is located. This connection is called bulk.
- Such a further connection is provided in particular in the case of integrated ones
- Circuits in which several transistors are on one chip are arranged.
- the designation of the components depends on the number of connections.
- Semiconductor components with three connections (source, gate, drain) are used as triodes, semiconductor components with four connections (source, gate 1, gate 2, drain) as tetrodes and semiconductor components with five connections (source, gate 1, gate 2, gate 3, Drain) referred to as a pentode.
- an additional connection to the bulk does not lead to a change in the name of the semiconductor component.
- this object is achieved in that the gate electrode is curved at least in sections in the direction of an electrode, and in that the surface of the one electrode is smaller than half the product of the width of the one electrode and the gate width.
- the invention therefore provides for one or more deliberately deformed gate electrodes to be used instead of the known straight-line gate electrodes.
- This deformation is caused by a curvature.
- Curvature in the direction of an electrode is referred to here if the gate electrode is convexly shaped at least in sections with respect to the one electrode.
- Such curvature can be done in any way. In particular, the curvature can be approximated by a polygon.
- One electrode can be formed by the source or the drain.
- the invention also provides for the electrode to be designed in such a way that it has a deliberately smaller surface.
- the benchmark for reducing the surface area of one electrode is the product of its width and the gate width.
- the width is the smallest dimension of the one electrode within the Structure level in which it is located. In the case of a circular electrode, this is the diameter.
- the term gate width here means the extension of the gate electrode perpendicular to the current direction in the gate channel. In the case of a circular " electrode, in which there is a radial current flow, and an annular gate electrode, this is the circumference of the gate electrode.
- the electrical semiconductor component such that the surface of the one electrode is at most 35% of the product of the width of the one electrode and the gate width.
- the invention further provides to build a generic electrical circuit so that it contains an electrical semiconductor component, which is characterized in that the gate electrode is curved at least in sections towards an electrode, and that the surface of one electrode is smaller than half of the product of the width of one electrode and the gate width.
- a particularly low capacitance can be achieved in that the gate electrode is curved so much that the one
- Electrode is at least partially surrounded by the gate electrode.
- a capacitance that is both low and precisely determinable can be achieved in that the gate electrode has the shape of an arc at least in sections.
- a "isolation structure below or above the free ends of the gate electrode is arranged.
- Stray capacities can also be avoided if the gate electrode has a ring shape.
- the one electrode To further reduce the capacitance between the one electrode and the gate electrode, it is furthermore expedient for the one electrode to have smaller surface dimensions than the gate electrode.
- drain or the source is divided into a plurality of surface pieces, the surface pieces being connected to one another by conductor tracks. This results in an electrical parallel connection.
- the semiconductor component is characterized in that the conductor tracks are arranged in a structural plane located below or above the drain or the source.
- the one electrode can have any shape.
- a particularly low capacitance between the one electrode and the gate electrode can expediently be achieved in that the one electrode Has point symmetry.
- Such a point symmetry can advantageously be achieved in that the one electrode has a circular shape.
- a capacitance which is both small and precisely defined can be achieved in that the one electrode has the shape of a polygon.
- a polygon is understood here to mean a flat structure with at least three corners.
- the one electrode is expedient for the one electrode to be arranged in the center of the gate electrode.
- a further advantageous embodiment of the invention is characterized in that the one electrode is at least partially surrounded by the gate electrode and that the gate electrode is at least partially surrounded by another electrode.
- the other electrode has a U-shape.
- both the gate electrode and the source are arranged inside the drain, or that the gate electrode and the drain are arranged inside the source. These arrangements have the additional advantage that the influence of external interference fields is effectively shielded.
- Another advantageous embodiment of the invention is characterized in that the one electrode has a shape complementary to the gate electrode.
- the arrangements shown also achieve advantageous shielding from external electromagnetic fields. These arrangements have the additional advantage that a particularly small and precisely definable capacity is achieved at the same time.
- the electrical semiconductor component In order to expand the possible uses of the electrical semiconductor component, it is advantageous for it to have at least two gate electrodes.
- An undesirable mutual influence of the gate electrodes can advantageously be avoided by arranging the gate electrodes concentrically.
- a preferred embodiment of the invention provides that one electrode is designed in such a way that it has a deliberately smaller area than the other electrode.
- One electrode can be formed by the source or the drain.
- a particularly advantageous embodiment of the semiconductor component according to the invention is characterized in that the surface of one electrode is at most 25% of the surface of the other electrode.
- a particularly strong reduction in capacity can be achieved in that the surface of one electrode is at most 15% of the surface of the other electrode.
- At least one electrode has the smallest possible width. It is even more advantageous if both electrodes have the smallest possible width.
- An area of less than 10 ⁇ m is preferred
- Fig.l is a plan view of a first embodiment of a semiconductor device according to the invention.
- FIG. 3 shows a plan view of a further embodiment of a semiconductor component according to the invention.
- the two semiconductor components shown in FIG. 1 are two field effect transistor triodes, which are connected to one another in parallel on a structure level not shown in the drawing.
- the drain 20 lies in the center of the source 10 and the gate 30.
- the distance from the drain edge to the center line of the gate 30 is denoted by d DG .
- N k individual components must be connected in parallel.
- N k of the required components applies: N> w G / w k .
- the total drainage area is:
- the total drain area A DG with the same total gate width is less than half the drain area A D1 of the linear structure shown below with reference to FIG. 2.
- the inner radius of the source 10 is 2 r D , because the distance between the source 10 and the drain 20 is not greater than the radius of the drain 20. Since the source 10 has the same width as the drain 20, the outer radius of the source 10 : 4 r D.
- the area ratio between the drain 20 and the source 10 is thus 1 to 12.
- the component shown in FIG. 2 belongs to the prior art. It has a linear structure.
- the gate electrode 130 is arranged between the drain 120 and the source 110.
- the gate electrode 150 is located between the drain 120 and the source 140.
- the total gate width w G is composed of the width w G / 2 of the individual gates.
- the four quadrants A, B, C and D in FIG. 3 show top views of two different embodiments of the semiconductor component according to the invention, the quadrants A and B corresponding to a first embodiment and the quadrants C and D corresponding to a second embodiment.
- Each of the four quadrants A, B, C, and D corresponds to a semiconductor component according to the invention.
- a higher output power is achieved by connecting several semiconductor components in parallel.
- andelt h it is field effect transistor tetrode.
- the illustrated in quadrants A and B embodiment is located between the source 210 and drain 220, a flat extended, not shown power line channel, "in which two gate electrodes are arranged 230 and 240th
- the connecting lines 260 and 270 leading to the gate electrodes 230 and 240 are located at a higher structural level of the semiconductor component.
- the connecting lines 260 and 270 leading to the gate electrodes 330 and 340 are in turn located at a higher structural level of the semiconductor component.
- connection of the gate electrodes 230, 240, 330 and 340 to the .Tlschluß ein 260 and 270 and the drains 220, 320 and the sources 210, 310 with the leads leading to them is via contact holes 380.
- These contact holes are electrically conductive Material filled so that connections are possible through different structural levels.
- the free ends of the gate electrodes 330 and 340 lie on an insulation layer 390.
- Figs. 1 and 3 embodiments have been shown of f he indungswashen semiconductor component, on which an electrode is formed by the drain.
- the one electrode it is also possible for the one electrode to be formed by the source.
- Using the drain as the first electrode has the advantage that distortion or attenuation of the output signal can be avoided even further. It is generally particularly expedient that the output signal of the semiconductor component can be tapped off at one electrode.
- the illustrated embodiments of the electrical semiconductor component according to the invention are field-effect transistor tetrodes.
- Such field effect transistor tetrodes serve, for example, as amplifiers with variable gain in VHF and radio frequency receivers such as television receivers.
- the high-frequency input signal is applied to the outer gate electrode 30.
- a low frequency signal or a DC signal is applied to the internal gate electrode 40.
- the semiconductor components according to the invention for mixing signals at different frequencies. It is expedient here that the signals to be mixed are each passed to a gate electrode.
- the range of applications of the electrical semiconductor component according to the invention is not limited to such applications.
- the invention can be used in the entire range of applications electrical semiconductor components are used. It is particularly expedient to use an electrical semiconductor component according to the invention in those fields of application in which there is a need to keep the capacitance of at least the source or the drain very small, or to achieve a precisely defined value of this capacitance.
- the electrical semiconductor component according to the invention is therefore particularly suitable for amplifiers in the range of low, medium, high and highest frequencies. Circuit breaker applications are also possible.
Abstract
The invention relates to an electric semiconductor component comprising electrodes which form the source (210, 310) and drain (220, 320) and at least one gate electrode (230, 240, 330, 340) with a specific gate width. The inventive semiconductor component is characterized such that the gate electrode (230, 240, 330, 340) is at least curved in sections in a direction toward one electrode and the surface of the one electrode is smaller than half the product of the width of the one electrode and the specific gate width. The invention also relates to an electric circuit which contains at least one electric semiconductor component with electrodes which form the source (210, 310) and drain (220, 320) and at least one gate electrode (230, 240, 330, 340) with a specific gate width. The electric circuit is characterized such that, in the semiconductor component, the gate electrode (230, 240, 330, 340) is at least curved in sections in a direction toward an electrode and the surface of the one electrode is smaller than half the product of the width of the one electrode and the specific gate width.
Description
FELDEFFEKT-HALBLEITERBAUELEMENT FIELD EFFECT SEMICONDUCTOR COMPONENT
Beschreibungdescription
Die Erfindung betrifft ein elektrisches Halbleiterbauelement mit Elektroden, die Source und Drain bilden, und wenigstens einer Gate-Elektrode mit einer Gateweite.The invention relates to an electrical semiconductor component with electrodes that form the source and drain, and at least one gate electrode with a gate width.
Die Erfindung betrifft ferner eine elektrische Schaltung, die wenigstens ein elektrisches Halbleiterbauelement enthält, wobei das Halbleiterbauelement Elektroden, die Source und Drain bilden, und wenigstens eine Gate-Elektrode aufweist.The invention further relates to an electrical circuit which contains at least one electrical semiconductor component, the semiconductor component having electrodes which form source and drain and at least one gate electrode.
Bei einem derartigen elektrischen Halbleiterbauelement kann es sich beispielsweise um einen Feldeffekttransistor mit Isolierschicht ( OSFET / MISFET) oder mit Sperrschicht (Junction-FET) handeln. Beim Aufbau des Halbleiterbauelementes als Feldeffekttransistor weist es mindestens drei Gebiete abwechselnden Leitfähigkeitstyps auf. Hierbei dient die Gate-Elektrode als Steuerelektrode, die den Widerstand in einem Stromkanal zwischen der Source und der Drain steuert. Das Ausgangssignal wird üblicherweise an der Drain abgegriffen. Neben den Anschlüssen an die Source, die Drain und die Gate-Elektrode ist manchmal noch ein vierter Anschluß vorhanden, beispielsweise an das Halbleiterplättchen, also das Substrat, auf dem sich der Stromkanal befindet. Dieser Anschluß wird als Bulk bezeichnet. Das Vorsehen eines derartigen weiteren Anschlusses erfolgt insbesondere bei integriertenSuch an electrical semiconductor component can be, for example, a field effect transistor with an insulating layer (OSFET / MISFET) or with a barrier layer (junction FET). When the semiconductor component is constructed as a field effect transistor, it has at least three areas of alternating conductivity types. Here, the gate electrode serves as a control electrode, which controls the resistance in a current channel between the source and the drain. The output signal is usually tapped at the drain. In addition to the connections to the source, the drain and the gate electrode, a fourth connection is sometimes also present, for example to the semiconductor die, that is to say the substrate on which the current channel is located. This connection is called bulk. Such a further connection is provided in particular in the case of integrated ones
Schaltungen, bei denen mehrere Transistoren auf einem Chip
angeordnet sind. Selbstverständlich ist es auch möglich, eine größere Anzahl von Gebieten, insbesondere von Gate- Elektroden, im Halbleiterbauelement vorzusehen und diese mit Anschlüssen zu versehen. Die Bezeichnung der Bauelemente erfolgt in Abhängigkeit von der Anzahl der Anschlüsse. So werden Halbleiterbauelemente mit drei Anschlüssen (Source, Gate, Drain) als Trioden, Halbleiterbaulemente mit vier Anschlüssen (Source, Gate 1, Gate 2, Drain) als Tetroden und Halbleiterbaulemente mit fünf Anschlüssen (Source, Gate 1, Gate 2, Gate 3, Drain) als Pentoden bezeichnet. Ein zusätzlicher Anschluß an den Bulk führt jedoch nicht zu einer geänderten Bezeichnung des Halbleiterbauelements .Circuits in which several transistors are on one chip are arranged. Of course, it is also possible to provide a larger number of regions, in particular gate electrodes, in the semiconductor component and to provide these with connections. The designation of the components depends on the number of connections. Semiconductor components with three connections (source, gate, drain) are used as triodes, semiconductor components with four connections (source, gate 1, gate 2, drain) as tetrodes and semiconductor components with five connections (source, gate 1, gate 2, gate 3, Drain) referred to as a pentode. However, an additional connection to the bulk does not lead to a change in the name of the semiconductor component.
Wenn auf das Gate oder die Gates eine WechselSpannung oder ein hochfrequentes Signal gelegt wird, kann es zu unerwünschten Verzerrungen oder Dämpfungen des an einer der Elektroden, das heißt an der Drain - was bevorzugt ist - oder an der Source abgreifbaren AusgangsSignals kommen. Eine Ursache dieser Verzerrungen oder Dämpfungen ist die Kapazität der Drain oder der Source. Zur Verringerung der Kapazität zwischen der Drain und dem Bulk sowie zwischen der Drain und einem Gate ist es bekannt, ihre Flächenausdehnung durch eine schmale linienförmige Ausgestaltung der von ihnen eingenommenen Fläche zu begrenzen. Hierbei wird versucht, eine möglichst dünne Linie herzustellen. Durch den bei der Herstellung der Gebiete für Source, und Drain verwendeten Diffusions- oder Ionenimplantationsprozeß wird jedoch eine Mindestdicke der Linie hervorgerufen. Dadurch ist es nicht möglich, unerwünschte Streukapazitäten vollständig zu vermeiden.
Der Erfindung liegt die Aufgabe zugrunde, die Nachteile des Standes der Technik zu vermeiden. Insbesondere soll ein gattungsgemäßes elektrisches Halbleiterbauelement so ausgestaltet werden," daß Streukapazitäten vermindert werden.If an AC voltage or a high-frequency signal is applied to the gate or the gates, undesirable distortions or attenuations of the output signal which can be tapped off at one of the electrodes, that is to say at the drain - or at the source - can occur. One cause of these distortions or attenuations is the capacitance of the drain or the source. In order to reduce the capacitance between the drain and the bulk as well as between the drain and a gate, it is known to limit their surface area by means of a narrow, linear design of the area they occupy. An attempt is made to make the line as thin as possible. However, the diffusion or ion implantation process used in the fabrication of the source and drain regions creates a minimum line thickness. This means that it is not possible to completely avoid unwanted stray capacities. The object of the invention is to avoid the disadvantages of the prior art. In particular, an electrical semiconductor component of the generic type is to be designed so that " stray capacities are reduced.
Erfindungsgemäß wird diese Aufgabe dadurch gelöst, daß die Gate-Elektrode wenigstens abschnittsweise in Richtung auf eine Elektrode gekrümmt ist, und daß die Oberfläche der einen Elektrode kleiner ist als die Hälfte des Produkts aus der Breite der einen Elektrode und der Gateweite.According to the invention, this object is achieved in that the gate electrode is curved at least in sections in the direction of an electrode, and in that the surface of the one electrode is smaller than half the product of the width of the one electrode and the gate width.
Die Erfindung sieht also vor, anstelle der bekannten gradlinigen Gate-Elektroden eine oder mehrere gezielt verformte Gate-Elektroden einzusetzen. Diese Verformung erfolgt durch eine Verkrümmung. Von Verkrümmung in Richtung auf eine Elektrode wird hierbei dann gesprochen, wenn die Gate-Elektrode in Bezug auf die eine Elektrode wenigstens abschnittsweise konvex geformt ist . Eine derartige Verkrümmung kann auf beliebige Weise erfolgen. Insbesondere kann die Verkrümmung durch ein Polygon approximiert werden. Die eine Elektrode kann dabei durch die Source oder die Drain gebildet werden.The invention therefore provides for one or more deliberately deformed gate electrodes to be used instead of the known straight-line gate electrodes. This deformation is caused by a curvature. Curvature in the direction of an electrode is referred to here if the gate electrode is convexly shaped at least in sections with respect to the one electrode. Such curvature can be done in any way. In particular, the curvature can be approximated by a polygon. One electrode can be formed by the source or the drain.
Die Erfindung sieht außerdem vor, die eine Elektrode so auszugestalten, daß sie eine gezielt kleiner beschaffene Oberfläche aufweist. Der Vergleichsmaßstab für die Verringerung der Oberfläche der einen Elektrode ist das Produkt aus ihrer Breite und der Gateweite . Die Breite ist die kleinste Ausdehnung der einen Elektrode innerhalb der
Strukturebene, in der sie sich befindet. Im Fall einer kreisförmigen Elektrode ist dies der Durchmesser. Unter Gateweite wird hier die Ausdehnung der Gate-Elektrode senkrecht zu der Stromrichtung im Gate-Kanal verstanden. Bei einer kreisförmigen" Elektrode, bei der ein radialer Stromfluß vorliegt, und einer kreisringförmigen Gate-Elektrode ist dies der Umfang der Gate-Elektrode.The invention also provides for the electrode to be designed in such a way that it has a deliberately smaller surface. The benchmark for reducing the surface area of one electrode is the product of its width and the gate width. The width is the smallest dimension of the one electrode within the Structure level in which it is located. In the case of a circular electrode, this is the diameter. The term gate width here means the extension of the gate electrode perpendicular to the current direction in the gate channel. In the case of a circular " electrode, in which there is a radial current flow, and an annular gate electrode, this is the circumference of the gate electrode.
Besonders zweckmäßig ist es, das elektrische Halbleiterbauelement so auszugestalten, daß die Oberfläche der einen Elektrode höchstens 35 % des Produkts aus der Breite der einen Elektrode und der Gateweite beträgt .It is particularly expedient to design the electrical semiconductor component such that the surface of the one electrode is at most 35% of the product of the width of the one electrode and the gate width.
Die Erfindung sieht ferner vor, eine gattungsgemäße elektrische Schaltung so aufzubauen, daß sie ein elektrisches Halbleiterbauelement enthält, das sich dadurch auszeichnet, daß die Gate-Elektrode wenigstens abschnittsweise in Richtung auf eine Elektrode gekrümmt ist, und daß die Oberfläche der einen Elektrode kleiner ist als die Hälfte des Produkts aus der Breite der einen Elektrode und der Gateweite.The invention further provides to build a generic electrical circuit so that it contains an electrical semiconductor component, which is characterized in that the gate electrode is curved at least in sections towards an electrode, and that the surface of one electrode is smaller than half of the product of the width of one electrode and the gate width.
Es ist zweckmäßig, die Kapazität zwischen der einen Elektrode und einer ihr benachbarten Gate-Elektrode zu verringern. Eine besonders niedrige Kapazität läßt sich dadurch erreichen, daß die Gate-Elektrode so stark gekrümmt ist, daß die eineIt is expedient to reduce the capacitance between one electrode and a gate electrode adjacent to it. A particularly low capacitance can be achieved in that the gate electrode is curved so much that the one
Elektrode wenigstens teilweise von der Gate-Elektrode umgeben ist.Electrode is at least partially surrounded by the gate electrode.
Eine sowohl niedrige als auch genau bestimmbare Kapazität läßt sich dadurch erreichen, daß die Gate-Elektrode
wenigstens abschnittsweise die Form eines Kreisbogens aufweist .A capacitance that is both low and precisely determinable can be achieved in that the gate electrode has the shape of an arc at least in sections.
Vorzugsweise ist unterhalb oder oberhalb der freien Enden der Gate-Elektrode eine" Isolationsstruktur angeordnet. DiesePreferably, there is arranged a "isolation structure below or above the free ends of the gate electrode. This
Ausgestaltung hat den Vorteil, daß die Streukapazitäten noch weiter vermindert werden.Design has the advantage that the stray capacities are reduced even further.
Streukapazitäten können auch dadurch vermieden werden, daß die Gate-Elektrode eine Ringform aufweist.Stray capacities can also be avoided if the gate electrode has a ring shape.
Zur weiteren Verringerung der Kapazität zwischen der einen Elektrode und der Gate-Elektrode ist es ferner zweckmäßig, daß die eine Elektrode kleinere Flächenabmessungen als die Gate-Elektrode aufweist.To further reduce the capacitance between the one electrode and the gate electrode, it is furthermore expedient for the one electrode to have smaller surface dimensions than the gate electrode.
Es ist ferner vorteilhaft, daß die Drain oder die Source in mehrere Flächenstücke aufgeteilt ist, wobei die Flächenstücke durch Leiterbahnen miteinander verbunden sind. Hierdurch ergibt sich eine elektrische Parallelschaltung.It is also advantageous that the drain or the source is divided into a plurality of surface pieces, the surface pieces being connected to one another by conductor tracks. This results in an electrical parallel connection.
Eine zweckmäßige Ausführungsform diesesA convenient embodiment of this
Halbleiterbauelementes zeichnet sich dadurch aus, daß die Leiterbahnen in einer unterhalb oder oberhalb der Drain oder der Source befindlichen Strukturebene angeordnet sind.The semiconductor component is characterized in that the conductor tracks are arranged in a structural plane located below or above the drain or the source.
Grundsätzlich kann die eine Elektrode eine beliebige Form aufweisen. Eine besonders geringe Kapazität zwischen der einen Elektrode und der Gate-Elektrode läßt sich zweckmäßigerweise dadurch erreichen, daß die eine Elektrode
Punktsymmetrie aufweist .In principle, the one electrode can have any shape. A particularly low capacitance between the one electrode and the gate electrode can expediently be achieved in that the one electrode Has point symmetry.
Eine derartige Punktsymmetrie läßt sich vorteilhaft dadurch erzielen, daß die eine Elektrode Kreisform aufweist.Such a point symmetry can advantageously be achieved in that the one electrode has a circular shape.
Eine sowohl geringe als auch genau definierte Kapazität läßt sich dadurch erreichen, daß die eine Elektrode die Form eines Polygons aufweist . Unter einem Polygon wird hierbei ein Flächengebilde mit mindestens drei Ecken verstanden.A capacitance which is both small and precisely defined can be achieved in that the one electrode has the shape of a polygon. A polygon is understood here to mean a flat structure with at least three corners.
Zur weiteren Verringerung der Kapazität zwischen der Gate- Elektrode und der einen Elektrode ist es zweckmäßig, daß die eine Elektrode im Mittelpunkt der Gate-Elektrode angeordnet ist .To further reduce the capacitance between the gate electrode and the one electrode, it is expedient for the one electrode to be arranged in the center of the gate electrode.
Eine weitere vorteilhafte Ausführungsform der Erfindung zeichnet sich dadurch aus, daß die eine Elektrode wenigstens teilweise von der Gate-Elektrode umgeben ist, und daß die Gate-Elektrode wenigstens teilweise von einer anderen Elektrode umgeben ist.A further advantageous embodiment of the invention is characterized in that the one electrode is at least partially surrounded by the gate electrode and that the gate electrode is at least partially surrounded by another electrode.
Es ist weiterhin zweckmäßig, daß die andere Elektrode U-Form aufweist .It is also expedient that the other electrode has a U-shape.
In diesem Fall ist es möglich, daß sowohl die Gate-Elektrode als auch die Source innerhalb der Drain angeordnet sind, oder, daß die Gate-Elektrode und die Drain innerhalb der Source angeordnet sind. Diese Anordnungen weisen den zusätzlichen Vorteil auf, daß der Einfluß von äußeren Störfeldern wirksam abgeschirmt wird.
Eine weitere vorteilhafte Ausführungsform der Erfindung zeichnet sich dadurch aus, daß die eine Elektrode eine zu der Gate-Elektrode komplementäre Form aufweist.In this case, it is possible that both the gate electrode and the source are arranged inside the drain, or that the gate electrode and the drain are arranged inside the source. These arrangements have the additional advantage that the influence of external interference fields is effectively shielded. Another advantageous embodiment of the invention is characterized in that the one electrode has a shape complementary to the gate electrode.
Durch die dargestellten Anordnungen wird auch eine vorteilhafte .ZUDschirmung gegenüber äußeren elektromagnetischen Feldern erzielt. Diese Anordnungen haben den zusätzlichen Vorteil, daß gleichzeitig eine besonders geringe und genau definierbare Kapazität erzielt wird.The arrangements shown also achieve advantageous shielding from external electromagnetic fields. These arrangements have the additional advantage that a particularly small and precisely definable capacity is achieved at the same time.
Um die Einsatzmöglichkeiten des elektrischen Halbleiterbauelementes zu erweitern, ist es vorteilhaft, daß es wenigstens zwei Gate-Elektroden aufweist.In order to expand the possible uses of the electrical semiconductor component, it is advantageous for it to have at least two gate electrodes.
Eine unerwünschte gegenseitige Beeinflussung der Gate- Elektroden läßt sich vorteilhafterweise dadurch vermeiden, daß die Gate-Elektroden konzentrisch angeordnet sind.An undesirable mutual influence of the gate electrodes can advantageously be avoided by arranging the gate electrodes concentrically.
Eine bevorzugte Ausführungsform der Erfindung sieht vor, die eine Elektrode so auszugestalten, daß sie eine gezielt kleinere Fläche als die andere Elektrode aufweist. Die eine Elektrode kann dabei durch die Source oder die Drain gebildet werden.A preferred embodiment of the invention provides that one electrode is designed in such a way that it has a deliberately smaller area than the other electrode. One electrode can be formed by the source or the drain.
Eine besonders vorteilhafte Ausführungsform des erfindungsgemäßen Halbleiterbauelements zeichnet sich dadurch aus, daß die Oberfläche der einen Elektrode höchstens 25 % der Oberfläche der anderen Elektrode beträgt.
Eine besonders starke Kapazitätsverringerung läßt sich dadurch erreichen, daß die Oberfläche der einen Elektrode höchstens 15 % der Oberfläche der anderen Elektrode beträgt.A particularly advantageous embodiment of the semiconductor component according to the invention is characterized in that the surface of one electrode is at most 25% of the surface of the other electrode. A particularly strong reduction in capacity can be achieved in that the surface of one electrode is at most 15% of the surface of the other electrode.
Besonders zweckmäßig ist es, wenn wenigstens eine Elektrode eine möglichst geringe Breite aufweist. Noch vorteilhafter ist es, wenn beide Elektroden eine möglichst geringe Breite aufweisen.It is particularly expedient if at least one electrode has the smallest possible width. It is even more advantageous if both electrodes have the smallest possible width.
Eine besonders vorteilhafte Ausführungsform des erfindungsgemäßen Halbleiterbauelementeε zeichnet sich dadurch aus, daß die Fläche der anderen Elektrode höchstensA particularly advantageous embodiment of the semiconductor component according to the invention is characterized in that the surface of the other electrode is at most
20 μm2 beträgt. Bevorzugt wird eine Fläche von weniger als 10 μmIs 20 μm 2 . An area of less than 10 μm is preferred
Weitere Vorteile und Besonderheiten der Erfindung ergeben sich aus den Unteransprüchen und der nachfolgenden Darstellung bevorzugter Ausführungsbeispiele der Erfindung anhand der Zeichnungen.Further advantages and special features of the invention result from the subclaims and the following illustration of preferred exemplary embodiments of the invention with reference to the drawings.
Von den Zeichnungen zeigtFrom the drawings shows
Fig.l eine Aufsicht auf eine erste Ausführungsform eines erfindungsgemäßen Halbleiterbauelementes ;Fig.l is a plan view of a first embodiment of a semiconductor device according to the invention;
Fig.2 eine Aufsicht auf ein bekanntes Halbleiterbauelement und2 shows a plan view of a known semiconductor component and
Fig.3 eine Aufsicht auf eine weitere Ausführungsform eines erfindungsgemäßen Halbleiterbauelementes.
Bei den beiden in Fig. 1 dargestellten Halbleiterbauelementen handelt es sich um zwei Feldeffekttransistor-Trioden, die auf einer in der Zeichnung nicht dargestellten Strukturebene miteinander in Parallelschaltung verbunden sind.3 shows a plan view of a further embodiment of a semiconductor component according to the invention. The two semiconductor components shown in FIG. 1 are two field effect transistor triodes, which are connected to one another in parallel on a structure level not shown in the drawing.
Hierbei liegt die Drain 20 im Mittelpunkt der Source 10 und des Gates 30. Die Drain 20 weist einen Durchmesser dD = 2 rD auf, der der minimalen bei dem Herstellungsprozeß desHere, the drain 20 lies in the center of the source 10 and the gate 30. The drain 20 has a diameter d D = 2 r D , which is the minimum in the manufacturing process of the
Halbleiterbauelementes möglichen Strukturbreite entspricht. Der .Abstand von der Drainkante zu der Mittellinie des Gates 30 wird mit dDG bezeichnet. Die Gateweite des Gates 30 beträgt wk = 2 π x (rD + dDG) .Die Drainfläche eines einzelnen Bauelementes beträgt : ADk = π rD 2.Semiconductor component possible structure width corresponds. The distance from the drain edge to the center line of the gate 30 is denoted by d DG . The gate width of the gate 30 is w k = 2 π x (r D + d DG ). The drain area of an individual component is: A Dk = π r D 2 .
Um eine gewünschte Gesamtgateweite w zu erzielen, müssen Nk einzelne Bauelemente parallel geschaltet werden. Für dieIn order to achieve a desired total gate width w, N k individual components must be connected in parallel. For the
Anzahl Nk der erforderlichen Bauelemente gilt: N > wG/wk.Number N k of the required components applies: N> w G / w k .
Es ergibt sich eine Gesamtdrainfläche:The total drainage area is:
DG = N> x A, Dk = „ π rr / (2 π (rD + dDG)DG = N > x A, Dk = "π r r / (2 π (r D + d DG )
= wG x rD / ( 2 x ( 1 + dDG/rD) )= w G xr D / (2 x (1 + d DG / r D ))
Da dDG ungefähr gleich rD ist, beträgt die Gesamtdrainfläche ADG bei gleicher Gesamtgateweite weniger als die Hälfte der Drainfläche AD1 der nachfolgend anhand von Fig.2 dargestellten linearen Struktur.
Der Innenradius der Source 10 beträgt 2 rD, weil der Abstand zwischen der Source 10 und der Drain 20 nicht größer ist als der Radius der Drain 20. Da die Source 10 die gleiche Breite aufweist wie die Drain 20, beträgt der Außenradius der Source 10 : 4 rD. Die Fläche der Source 20 beträgt somit: 16 π rD 2 - 4 π rD 2 = 12 π rD 2. Das Flächenverhältnis zwischen der Drain 20 und der Source 10 beträgt somit 1 zu 12.Since d DG is approximately equal to r D , the total drain area A DG with the same total gate width is less than half the drain area A D1 of the linear structure shown below with reference to FIG. 2. The inner radius of the source 10 is 2 r D , because the distance between the source 10 and the drain 20 is not greater than the radius of the drain 20. Since the source 10 has the same width as the drain 20, the outer radius of the source 10 : 4 r D. The area of the source 20 is thus: 16π r D 2 - 4π r D 2 = 12π r D 2 . The area ratio between the drain 20 and the source 10 is thus 1 to 12.
Das anhand von Fig.2 dargestellte Bauelement gehört zum Stand der Technik. Es weist eine lineare Struktur auf. Zwischen der Drain 120 und der Source 110 ist die Gate-Elektrode 130 angeordnet. Zwischen der Drain 120 und der Source 140 befindet sich die Gate-Elektrode 150.The component shown in FIG. 2 belongs to the prior art. It has a linear structure. The gate electrode 130 is arranged between the drain 120 and the source 110. The gate electrode 150 is located between the drain 120 and the source 140.
Die Gesamtgateweite wG setzt sich aus der Weite wG/2 der einzelnen Gates zusammen. Die Drainfläche AD1 beträgt: AD1 = 2 rD x wG/2 = wG x rD.The total gate width w G is composed of the width w G / 2 of the individual gates. The drain area A D1 is: A D1 = 2 r D xw G / 2 = w G xr D.
Die vier Quadranten A, B ,C und D der Fig.3 zeigen Aufsichten auf zwei verschiedene Ausführungsformen des erfindungsgemäßen Halbleiterbauelementes, wobei die Quadranten A und B einer ersten Ausführungsform und die Quadranten C und D einer zweiten Ausführungsform entsprechen.The four quadrants A, B, C and D in FIG. 3 show top views of two different embodiments of the semiconductor component according to the invention, the quadrants A and B corresponding to a first embodiment and the quadrants C and D corresponding to a second embodiment.
Jeder der vier Quadranten A, B, C, und D entspricht einem erfindungsgemäßen Halbleiterbauelement. Durch die Parallelschaltung von mehreren Halbleiterbauelementen wird eine höhere Ausgangsleistung erzielt.Each of the four quadrants A, B, C, and D corresponds to a semiconductor component according to the invention. A higher output power is achieved by connecting several semiconductor components in parallel.
Bei den dargestellten elektrischen Halbleiterbauelementen
handelt es sich um Feldeffekttransistor-Tetroden. Bei der in den Quadranten A und B dargestellten Ausführungsform befindet sich zwischen der Source 210 und der Drain 220 ein flächig ausgedehnter, nicht dargestellter Stromleitungskanal, " auf dem zwei Gate-Elektroden 230 und 240 angeordnet sind.In the electrical semiconductor components shown andelt h it is field effect transistor tetrode. In the illustrated in quadrants A and B embodiment, is located between the source 210 and drain 220, a flat extended, not shown power line channel, "in which two gate electrodes are arranged 230 and 240th
Die zu den Gate-Elektroden 230 und 240 führenden Anschlußleitungen 260 und 270 befinden sich auf einer höheren Struktur-ebene des Halbleiterbauelementes.The connecting lines 260 and 270 leading to the gate electrodes 230 and 240 are located at a higher structural level of the semiconductor component.
Bei der in den Quadranten C und D dargestellten Ausführungsform befindet sich zwischen der Source 310 und der Drain 320 ein flächig ausgedehnter Stromleitungskanal, auf dem zwei Gate-Elektroden 330 und 340 angeordnet sind.In the embodiment shown in quadrants C and D, there is an extensive current conduction channel between the source 310 and the drain 320, on which two gate electrodes 330 and 340 are arranged.
Die zu den Gate-Elektroden 330 und 340 führenden Anschlußleitungen 260 und 270 befinden sich wiederum auf einer höheren Strukturebene des Halbleiterbauelementes .The connecting lines 260 and 270 leading to the gate electrodes 330 and 340 are in turn located at a higher structural level of the semiconductor component.
Die Verbindung der Gate-Elektroden 230, 240, 330 und 340 mit den .Tlschlußleitungen 260 und 270 sowie der Drains 220, 320 und der Sources 210, 310 mit den zu ihnen führenden Anschlußleitungen erfolgt über Kontaktlöcher 380. Diese Kontaktlöcher sind mit einem elektrisch leitfähigen Material gefüllt, so daß durch sie Verbindungen über verschiedene Strukturebenen möglich sind.The connection of the gate electrodes 230, 240, 330 and 340 to the .Tlschlußleitung 260 and 270 and the drains 220, 320 and the sources 210, 310 with the leads leading to them is via contact holes 380. These contact holes are electrically conductive Material filled so that connections are possible through different structural levels.
Die freien Enden der Gate-Elektroden 330 und 340 liegen auf einer Isolationssschicht 390.
In den Fig. 1 und 3 wurden Ausführungsformen eines erfindungsgemäßen Halbleiterbauelementes dargestellt, bei den die eine Elektrode durch die Drain gebildet wird. Es ist jedoch gleichfalls möglich, daß die eine Elektrode durch die Source gebildet wird. Ein Einsatz der Drain als erster Elektrode hat den Vorteil , daß eine Verzerrung oder Dämpfung des AusgangsSignals noch weiter vermieden werden kann. Es ist generell besonders zweckmäßig, daß das AusgangsSignal des Halbleiterbauelementes an der einen Elektrode abgreifbar ist.The free ends of the gate electrodes 330 and 340 lie on an insulation layer 390. In Figs. 1 and 3 embodiments have been shown of f he indungsgemäßen semiconductor component, on which an electrode is formed by the drain. However, it is also possible for the one electrode to be formed by the source. Using the drain as the first electrode has the advantage that distortion or attenuation of the output signal can be avoided even further. It is generally particularly expedient that the output signal of the semiconductor component can be tapped off at one electrode.
Bei den dargestellten Ausführungsformen des erfindungsgemäßen elektrischen Halbleiterbauelementes handelt es sich um Feldeffekttransistor-Tetroden. Derartige Feldeffekttransistor- Tetroden dienen beispielsweise als Verstärker mit variabler Verstärkung in UKW- und Hochfrequenzempfängern wie Fernsehempfängern. Hierbei wird das hochfrequente EingangsSignal an der äußeren Gate-Elektrode 30 angelegt. Ein niederfrequentes Signal oder ein Gleichstromsignal ist an der innenliegenden Gate-Elektrode 40 angelegt. Es ist ferner möglich, die erfindungsgmäßen Halbleiterbauelemente zum Mischen von Signalen mit verschiedener Frequenz einzusetzen. Hierbei ist es zweckmäßig, daß die zu mischenden Signale auf je eine Gate-Elektrode geleitet werden.The illustrated embodiments of the electrical semiconductor component according to the invention are field-effect transistor tetrodes. Such field effect transistor tetrodes serve, for example, as amplifiers with variable gain in VHF and radio frequency receivers such as television receivers. Here, the high-frequency input signal is applied to the outer gate electrode 30. A low frequency signal or a DC signal is applied to the internal gate electrode 40. It is also possible to use the semiconductor components according to the invention for mixing signals at different frequencies. It is expedient here that the signals to be mixed are each passed to a gate electrode.
Das AnwendungsSpektrum des erfindungsgemäßen elektrischen Halbleiterbauelementes beschränkt sich jedoch nicht auf derartige Anwendungen.However, the range of applications of the electrical semiconductor component according to the invention is not limited to such applications.
Die Erfindung kann im gesamten AnwendungsSpektrum von
elektrischen Halbleiterbauelementen eingesetzt werden. Besonders zweckmäßig ist es, ein erfindungsgemäßes elektrisches Halbleiterbauelement in solchen Anwendungsgebieten einzusetzen, in denen ein Bedarf besteht, die Kapazität wenigstens der Source oder der Drain sehr klein zu halten, oder einen genau definierten Wert dieser Kapazität zu erzielen.The invention can be used in the entire range of applications electrical semiconductor components are used. It is particularly expedient to use an electrical semiconductor component according to the invention in those fields of application in which there is a need to keep the capacitance of at least the source or the drain very small, or to achieve a precisely defined value of this capacitance.
Daher eignet sich das erfindungsgemäße elektrische Halbleiterbauelement insbesondere für Verstärker im Bereich von tiefen, mittleren, hohen und höchsten Frequenzen. Auch Anwendungen als Leistungsschalter sind möglich.
The electrical semiconductor component according to the invention is therefore particularly suitable for amplifiers in the range of low, medium, high and highest frequencies. Circuit breaker applications are also possible.
Claims
1. Elektrisches Halbleiterbauelement mit Elektroden, die Source (10, 210, 310) und Drain (20, 220, 320) bilden, und wenigstens-einer Gate-Elektrode (30, 230, 240, 330, 340) mit einer Gateweite, d a d u r c h g e k e n n z e i c h n e t, daß die Gate-Elektrode (30, 230, 240, 330, 340) wenigstens abschnittsweise in Richtung auf eine Elektrode gekrümmt ist, und daß die Oberfläche der einen Elektrode kleiner ist als die Hälfte des Produkts aus der Breite der einen Elektrode und der Gateweite. 1st Electrical semiconductor component with electrodes which form the source (10, 210, 310) and drain (20, 220, 320), and at least one gate electrode (30, 230, 240, 330, 340) with a gate width, characterized in that the gate electrode (30, 230, 240, 330, 340) is at least partially curved in the direction of an electrode, and that the surface of the one electrode is smaller than half the product of the width of the one electrode and the gate width.
2. Elektrisches Halbleiterbauelement nach Anspruch 1, d a d u r c h g e k e n n z e i c h n e t, daß die Oberfläche der einen Elektrode höchstens 35 % des2. Electrical semiconductor component according to claim 1, d a d u r c h g e k e n n z e i c h n e t that the surface of one electrode at most 35% of
Produkts aus der Breite der einen Elektrode und der Gateweite beträgt .Product from the width of one electrode and the gate width.
3. Elektrisches Halbleiterbauelement nach einem der Ansprüche 1 oder 2, d a d u r c h g e k e n n z e i c h n e t, daß die Gate-Elektrode (30, 230, 240, 330, 340) so stark gekrümmt ist, daß die eine Elektrode wenigstens teilweise von der Gate-Elektrode (30, 230, 240, 330, 340) umgeben ist.3. Electrical semiconductor component according to one of claims 1 or 2, characterized in that the gate electrode (30, 230, 240, 330, 340) is curved so much that the one electrode at least partially from the gate electrode (30, 230 , 240, 330, 340) is surrounded.
4. Elektrisches Halbleiterbauelement nach einem der .Ansprüche 1 bis 3, d a d u r c h g e k e n n z e i c h n e t, daß die Gate-Elektrode (30, 230, 240, 330, 340) wenigstens abschnittsweise die Form eines Kreisbogens aufweist.
4. Electrical semiconductor component according to one of. Claims 1 to 3, characterized in that the gate electrode (30, 230, 240, 330, 340) at least in sections has the shape of a circular arc.
5. Elektrisches Halbleiterbauelement nach einem der Ansprüche 1 bis 4, d a d u r c h g e k e n n z e i c h n e t, daß die Gate-Elektrode (30, 230, 240) eine Ringform aufweist . 5 . Electrical semiconductor component according to one of claims 1 to 4, characterized in that the gate electrode (30, 230, 240) has a ring shape.
6. Elektrisches Halbleiterbauelement nach einem der Ansprüche l bis 5, d a d u r c h g e k e n n - z e i c h n e t, daß die eine Elektrode kleinere Flächenabmessungen als die Gate-Elektrode (30, 40, 130, 140) aufweist.6. Electrical semiconductor component according to one of claims 1 to 5, d a d u r c h g e k e n n - z e i c h n e t that the one electrode has smaller surface dimensions than the gate electrode (30, 40, 130, 140).
7. Elektrisches Halbleiterbauelement nach einem der Ansprüche 1 bis 6, d a d u r c h g e k e n n - z e i c h n e t, daß die Drain oder die Source in mehrere Flächenstücke aufgeteilt sind, wobei die Flächenstücke durch Leiterbahnen miteinander verbunden sind.7. Electrical semiconductor component according to one of claims 1 to 6, d a d u r c h g e k e n n - z e i c h n e t that the drain or the source are divided into several flat pieces, the flat pieces being connected to one another by conductor tracks.
8. Elektrisches Halbleiterbauelement nach Anspruch 7, d a d u r c h g e k e n n z e i c h n e t, daß die Leiterbahnen in einer unterhalb oder oberhalb der Drain oder der Source befindlichen Strukturebene angeordnet sind.8. An electrical semiconductor component according to claim 7, that the conductor tracks are arranged in a structural plane located below or above the drain or the source.
Elektrisches Halbleiterbauelement nach einem der Ansprüche 1 bis 8, d a d u r c h g e k e n n z e i c h n e t, daß die eine Elektrode Punktsymmetrie auf eist .
Electrical semiconductor component according to one of Claims 1 to 8, characterized in that the one electrode has point symmetry.
10. Elektrisches Halbleiterbauelement nach Anspruch 9, d a d u r c h g e k e n n z e i c h n e t, daß die eine Elektrode Kreisform aufweist . 10th E l electrical semiconductor component according to claim 9, characterized in that the one electrode has a circular shape.
11. Elektrisches Halbleiterbauelement nach Anspruch 9, d a d u r c h g e k e n n z e i c h n e t, daß die eine Elektrode die Form eines Polygons aufweist.11. The electrical semiconductor component as claimed in claim 9, so that the one electrode has the shape of a polygon.
12. Elektrisches Halbleiterbauelement nach einem der Ansprüche 3 bis 11, d a d u r c h g e k e n n z e i c h n e t, daß die eine Elektrode im Mittelpunkt der Gate-Elektrode (30, 230, 240, 330, 340) angeordnet ist.12. Electrical semiconductor component according to one of claims 3 to 11, d a d u r c h g e k e n n z e i c h n e t that the one electrode is arranged in the center of the gate electrode (30, 230, 240, 330, 340).
13. Elektrisches Halbleiterbauelement nach einem der Ansprüche 3 bis 12, d a d u r c h g e k e n n z e i c h n e t, daß die eine Elektrode wenigstens teilweise von der Gate-Elektrode umgeben ist, und daß die Gate-Elektrode wenigstens teilweise von einer anderen Elektrode umgeben ist.13. Electrical semiconductor component according to one of claims 3 to 12, that the electrode is at least partially surrounded by the gate electrode, and that the gate electrode is at least partially surrounded by another electrode.
14. Elektrisches Halbleiterbauelement nach Anspruch 13, d a d u r c h g e k e n n z e i c h n e t, daß die andere Elektrode U-Form aufweist.14. The electrical semiconductor component according to claim 13, that the other electrode has a U-shape.
15. Elektrisches Halbleiterbauelement nach einem der Ansprüche 1 bis 14, d a d u r c h g e k e n n z e i c h n e t, daß die eine Elektrode eine zu der Gate-Elektrode (30, 230, 240, 330, 340) komplementäre Form aufweist .
15. Electrical semiconductor component according to one of claims 1 to 14, characterized in that the one electrode has a shape complementary to the gate electrode (30, 230, 240, 330, 340).
16. Elektrisches Halbleiterbauelement nach einem der Ansprüche 1 bis 15, d a d u r c h g e k e n n - z e i c h n e t, daß es wenigstens zwei Gate-Elektroden (230, 240, 330, 340) aufweist. 1 6. Electrical semiconductor device according to one of claims 1 to 15, characterized in that it has at least two gate electrodes (230, 240, 330, 340).
17. Elektrisches Halbleiterbauelement nach Anspruch 16, d a d u r c h g e k e n n z e i c h n e t, daß die Gate-Elektroden (230, 240, 330, 340) konzentrisch angeordnet sind.17. The electrical semiconductor component as claimed in claim 16, so that the gate electrodes (230, 240, 330, 340) are arranged concentrically.
18. Elektrisches Halbleiterbauelement nach einem der Ansprüche 1 bis 17, d a d u r c h g e k e n n z e i c h n e t, daß die Oberfläche der einen Elektrode höchstens 25 % der Oberfläche einer anderen Elektrode beträgt .18. Electrical semiconductor component according to one of claims 1 to 17, d a d u r c h g e k e n n z e i c h n e t that the surface of one electrode is at most 25% of the surface of another electrode.
19. Elektrisches Halbleiterbauelement nach Anspruch 18, d a d u r c h g e k e n n z e i c h n e t, daß die Oberfläche der einen Elektrode höchstens 15 % der Oberfläche der anderen Elektrode beträgt.19. An electrical semiconductor component according to claim 18, so that the surface of one electrode is at most 15% of the surface of the other electrode.
20. Elektrisches Halbleiterbauelement nach einem der Ansprüche l bis 19, d a d u r c h g e k e n n z e i c h n e t, daß die Oberfläche einer anderen Elektrode höchstens 20 μm2 beträgt.20. Electrical semiconductor component according to one of claims l to 19, characterized in that the surface of another electrode is at most 20 microns 2 .
21. Elektrische Schaltung, d a du r c h g e k e n n z e i c h n e t, daß sie wenigstens ein Halbleiterbauelement nach einem der Ansprüche 1 bis 20 enthält.
21. Electrical circuit, so that it contains at least one semiconductor component according to one of Claims 1 to 20.
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DE19746619.2 | 1997-10-22 | ||
DE1997146619 DE19746619A1 (en) | 1997-10-22 | 1997-10-22 | Electrical semiconductor component |
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WO1999021230A1 true WO1999021230A1 (en) | 1999-04-29 |
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PCT/DE1998/003001 WO1999021230A1 (en) | 1997-10-22 | 1998-10-12 | Field effect semiconductor component |
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