WO1999031849A2 - Method and apparatus for switching data between bitstreams of a circuit switched time division multiplexed network - Google Patents

Method and apparatus for switching data between bitstreams of a circuit switched time division multiplexed network Download PDF

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Publication number
WO1999031849A2
WO1999031849A2 PCT/SE1998/002360 SE9802360W WO9931849A2 WO 1999031849 A2 WO1999031849 A2 WO 1999031849A2 SE 9802360 W SE9802360 W SE 9802360W WO 9931849 A2 WO9931849 A2 WO 9931849A2
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WO
WIPO (PCT)
Prior art keywords
bitstream
data
time slot
identifier
bitstreams
Prior art date
Application number
PCT/SE1998/002360
Other languages
French (fr)
Other versions
WO1999031849A3 (en
Inventor
Christer Bohm
Anders BOSTRÖM
Elling Disen
Lukas Holm
Per Lindgren
Martin Zachrison
Original Assignee
Net Insight Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Net Insight Ab filed Critical Net Insight Ab
Priority to EP98964625A priority Critical patent/EP1040723A2/en
Publication of WO1999031849A2 publication Critical patent/WO1999031849A2/en
Publication of WO1999031849A3 publication Critical patent/WO1999031849A3/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/06Time-space-time switching
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q2213/00Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13292Time division multiplexing, TDM
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q2213/00Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/1332Logic circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q2213/00Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/1334Configuration within the switch
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q2213/00Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13361Synchronous systems

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  • Data Exchanges In Wide-Area Networks (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

The present invention refers to a method and an apparatus for switching data between bitstreams of a circuit switched synchronous time division multiplexing network. According to the invention, data read from a time slot of a first bitstream of said bitstreams is tagged with an identifier. For each one of at least a second and a third bitstream of said bitstreams it is then selected into which respective time slot thereof to transmit said data based upon said identifier.

Description

METHOD AND APPARATUS FOR SWITCHING DATA
Technical field of the invention
The present invention refers to a method and an apparatus for switching data between bitstreams of a circuit switched synchronous time division multiplexing network .
Technical Background and Prior Art
Today, new types of circuit-switched communication networks are being developed for the transfer of informa- tion using synchronous or isochronous, time division multiplexed bitstreams, wherein a bitstream is divided into cycles, each cycle in turn being divided into time slots.
An example of such a network is described in "The DTM Gigabit Network", Christer Bohm, Per Lindgren, Lars Ramfelt, and Peter Sjδdin, Journal of High Speed Networks, 3 (2) :109-126, 1994, and in "Multi-gigabit networking based on DTM", Lars Gauffin, Lars Hakansson, and Bjorn Pehrson, Computer networks and ISDN Systems, 24(2), 119-139, April 1992. In such a network, so called switches, each connected to one or more bitstreams, or fibers, are used to switch time slot data between different bitstreams. For example, if a channel is defined between a first and a second apparatus attached to a first and a second, res- pectively, bitstream carrying fiber, said channel comprising a first set of time slots on a bitstream propagating on the first fiber and a second set of slots on a bitstream propagating on the second fiber, a switch is then used to transfer or copy time slot data from time slots of the first set of slots to time slots of the second set of slots.
According to prior art, switches in synchronous time division multiplexed networks use a control memory that maps each incoming slot number to the outgoing slot number. Such mapping may involve both a mapping in the time domain, i.e. control of the order in which time slot data are written into each bitstream, and a mapping in the space domain, i.e. controlling which time slot data goes to which bitstream. For example, so called time- space-time (TST) switches are described in "Data and Computer Communications", 4th ed. , by Williams Stallings, Macmillan Publishing Company. However, prior art switches all show limitation as to the possibilities of switching time slots in space and time. Also, prior art switches show limitations as to switching speed and capacity, especially in the context of switching data from one bitstream to two or more bitstreams, i.e. in the context of space multicasting or broadcasting.
Objects of the invention An object of the invention is therefore to provide a switch, which provides greater freedom as to the possibilities of switching time slots in space and time, at the same time increasing switching speed and capacity.
Summary of the invention
The above mentioned and other objects are achieved by the invention as defined in the accompanying claims .
According to the invention, there is provided a method and an apparatus for switching data between bit- streams of a circuit switched synchronous time division multiplexing network. Data read from a time slot of a first bitstream of said bitstreams is tagged with an identifier. For each one of at least a second and a third bitstream of said bitstreams it is then selected into which respective time slot thereof to transmit said data based upon said identifier.
The invention is based upon the idea of tagging, in a space multicasting or broadcasting scenario, incoming time slot data with a tag, forming said identifier, for example in the form of a virtual tag number, which is then used at at least to output ports in the decision as to which time slot position of the respective output bitstream that said time slot data shall be transmitted into. Incoming slots are thus sent to the outgoing ports from the input port without any direct specification of what slots to use on the outgoing links. Hence, the decision as to which slots to use on the outgoing links for the time slot data is thus made at the output ports and not at the input port. As is understood, said identifier will generally not be the actual slot number to which the data slot is supposed to be written. An advantage of the invention is that the input ports of a switch according to the invention does not have to perform the decision as to which slot goes where, i.e. does not have to tag said time slot data with different slot addresses for different ports. The input port merely provides the time slot data with an identifier, e.g. said virtual tag number. The time slot data, along with said identifier, is then sent to the output ports, either using a shared resource or private links, where the actual decisions as to write the time slot data into an outgoing time slot are made. Thus, several output ports will make their decisions based upon the same identifier. This feature is very beneficial in space multicasting or broadcasting.
The information as to which identifiers that are to be used for which time slots and how the respective time slots are to be switched is provided by a node controller, which performs control signaling with the outside network and which will make the necessary allocations and provide the necessary instructions at channel set-up, modification and termination.
In one embodiment, incoming time slot data is provided to each output port, thus letting each output port make a decision for each received time slot data as to whether or not said time slot data is supposed to be transmitted to the respective bitstream. In this embodiment, the transfer of time slot data from input port to output port comprises no intermediate decision-making, however there is required a larger decision-making capacity at each output port.
In an alternative embodiment, the decision-making is divided into subselections , comprising first selecting which ones (one or more) of the output bitstreams that said time slot data is to be transferred to, for example also based upon said an identifier, and then selecting, for each one of the first selected bitstreams, a respective time slot for said time slot data to be written into, based upon said identifier. This embodiment requires that further decision-making schemes are provided, but also puts a lesser demand on the decision-making capacity at the respective output port.
It shall be understood that space multicasting according to the invention, i.e. the switching of time slot data from at least one input port to at least two output ports, may involve the selection of different single output ports for different input time slots, the selection of more than one output port for an input time slot as well as the selection of all output ports for said input time slot (broadcasting) .
According to an embodiment of the invention, which is preferably used in the case when one or more copies of time slot data from a specific input time slot has to be provided within the node, all copies of the time slot data is tagged with the same tag number, forming said identifier. Hence, one single tag number will be used for an input time slot, independently of how many copies of the time slot data therefrom that are provided within the switch.
The time slot data, along with the identifier tagged thereto, may be transferred within the node using private links, shared multiplexed links, or the like. For example, said time slot data and said identifier may be transferred within said node using time slots of an internal bitstream. According to an alternative embodiment of the invention, in a situation where an isochronous channel has been established on said bitstreams, data from time slots of the input bitstream belonging to the same channel are tagged with the same identifier, e.g. the same virtual tag number. Said identifier is then used at output ports for mapping said time slot data to one of the time slots allocated to the channel on the respective outgoing links. Which time slot that the data is mapped to depends on which time slot passing the node next that has not yet been filled with switched data. In this embodiment one advantage is that the timing requirements between the incoming and the outgoing channels are relaxed, since it needs not be determined which specific incoming slot number that is mapped to which specific outgoing slot number at channel set-up. In many applications, it is important, though, to make sure that the time slot data from time slots of said first set of time slots are written into time slots of said second set of time slots in maintained mutual order.
In another embodiment, each incoming time slot to be switched by the node is tagged with a unique identifier, said identifier being translated directly into a physical slot number at the output port, for example using an identifier-to-slot mapper, said physical slot number being determined at channel set-up.
According to the invention, said read time slot data may be transferred within said node using allocated time slots of an internal bitstream. Such an internal bit- stream simplifies the internal handling of the time slot data in the node. For example, when data is multicasted from one input port to several output ports , there is no need to make copies of the data to be switched since it will be transferred to all parts of the node having con- nections with the other bitstreams. As is also understood, the term internal bitstream does not necessarily mean that the bitstream or the bitstream carrying medium must reside physically inside a switch circuit or the like, but may be arranged peripheral to the circuit, however still being used for the transfer of data between different ports of the switch. The invention is especially advantageous in multichannel circuit switched networks providing multicasting support and wherein channels are of arbitrary size, such as a DTM network of the kind mentioned above. However, the invention is not restricted to, for example, DTM networks but can be used in any circuit switched synchronous time division multiplexed network.
The present application corresponds to one three Swedish patent applications, SE 9704738-5, SE 9704739-3, and SE 9704740-1, which were filed on the same day and which refer to related inventive ideas, the descriptions thereof being incorporated by reference.
The above mentioned and other aspects and features of the invention will be more fully understood from the following description, with reference to the accompanying drawings, of exemplifying embodiments thereof.
Brief description of the drawings
Exemplifying embodiments of the invention will be described below with reference to the accompanying drawings, wherein:
Fig. 1 schematically shows a switch according to a first embodiment of the invention;
Fig. 2 schematically shows a switch according to a second embodiment of the invention; and Fig. 3 shows an example of the internal structure of selection means included in a switch according to an embodiment of the present invention.
Detailed description of preferred embodiments An exemplifying switch according to a first embodiment of the invention will now be described with reference to Fig. 1, wherein a switch 210 is connected to three unidirectional optical fibers 214, 219 and 222 transferring a first bitstream 215, a second bitstream 220, and a third bitstream 223, respectively. As indicated in Fig. 2, each of the bitstreams is divided into cycles, and each of said cycles is divided into time slots, each for example comprising 64 bits.
The switch is by means of a switch node controller (SNC) 235 configured to switch data from time slots of the frame transferred by the first bitstream to time slots of one or both of the frames transferred by the second and the third bitstream. At set-up of a channel through the switch node, the controller 235 is informed of which time slot positions in the first bitstream and which time slot positions in the second and/or third bit- stream that are allocated to the channel. The controller 235 is connected to a tagging table 240 and to selection means 250, 251, which will be further described below, as illustrated by dotted lines in Fig. 1. Tagging means 242 are included in the switch in order to tag data that is to be switched by the switch.
The switch 210 includes a first port 225 for reading time slot data from time slots of said first bitstream. The first port 225 includes a medium access unit, a bit clock, a slot counter and a frame clock (neither of which is shown in Fig. 1) . The medium access unit enables the switch to read data from the time slots that are being transferred by the first bitstream. The bit clock is synchronized to the bitrate of bitstream 215 transferred by the fiber 214 and used as input to the slot counter. The slot counter counts the number of slots transferred by the fiber 214 and is cyclically restarted by the frame clock at the start of each new cycle.
The tagging table 240 stores identifiers, also referred to as tag numbers or "tags". The information in the tagging table 240 is either fixed, that is a certain entry always provides a certain tag number, or controlled by the controller 235, which then stores information in the tagging table 240 at channel set-up. In the latter case the tag number provided at an entry of the tagging table 240 is dependent upon which channel the respective time slot of the first bitstream is allocated to. The tag number may in this case be chosen to comprise information relating to the identification of said channel. Each time slot in the first bitstream read by the first port has a corresponding entry in said table, and each entry that represents a time slot carrying data to be switched by the switch 240 is set to provide a respective tag number. In Fig. 1, only seven entries, corresponding to cycles with seven time slots, have been indicated in the tagging table 240. However, a cycle in a bitstream may in practice contain a far greater number of slots and, thus, the table a far greater number of corresponding entries. The empty entries of the table, in this case the entries corresponding to time slot positions 4 and 6, indicate that data transferred in the corresponding time slots are not to be switched by the switch. The count of the slot counter included in the first port 225 is used to address entries in the tagging table 240. The information provided at each entry, and thus being associated with each respective cyclically occurring time slot position, is outputted from the table 240 and transferred to tagging means 242. For each time slot read by the port 225, received data is transferred to the tagging means 242. Said tagging means will then tag the tag number derived via the tagging table 240 to said data. If no tag number is provided by the tagging table, as a result of the fact that data from the associated time slot is not to be switched through the switch, said data is for example discarded at the tagging means 242. The tagged data is the transferred further down the switch to be received in connection with other parts of the switch that are used to access external bitstreams.
The switch 210 further comprises selection means 250 and 251, for example of the kind to be described below with reference to Fig. 3, which are arranged to receive the tagged data and to select a time slot position in the cycle of the second bitstream 220 and/or a time slot position in the cycle of the third bitstream 223 based upon the received tag number. Whether or not said data is transmitted into one or both of said second and third bitstreams will depend upon whether or not the switched channel is to be space multicasted (or broadcasted) . The selected positions, which corresponds to one of the time slots allocated on the second bitstream and, in case of multicasting, one of the time slots allocated on the third bitstream, will be used for addressing respective frame buffers 260, 261, each frame buffer being used to temporarily store an entire frame of time slot data prior to output thereof. Upon addressing the frame buffer, said data that has been received from the tagging means 242, either directly or via the selection means, will be stored at the respective address location selected by the respective selection means 250, 251. The switch node furthermore comprises a second and a third port 230, 231 for writing data to time slots of said second and third bitstream, respectively. Since these ports have a similar design and functionality as port 225, further description thereof is omitted. Another switch according to a second embodiment of the invention will now be described with reference to Fig. 2. In similar to the embodiment described with reference to Fig. 1, the switch 410 in Fig. 2 is also connected to three unidirectional optical fibers 414, 419 and 422 transferring a first bitstream 415, second bitstream 420, and a third bitstream 423, respectively. The switch 410 also includes a first port 425, a second port 430, a third port 431, a switch node controller 435, a tagging table 440, tagging means 442, and selection means 450, 451, which are of similar design and functionality as the components that have been described above with reference to Fig. 1. In the embodiment of Fig. 2, the switch 410 comprises a medium on which a switch internal bitstream 470 propagates. The internal bitstream, which is divided into cycles that in turn are divided into time slots, is used for transferring time slot data between the ports of the switch 410.
Having received data from a time slot of the first bitstream via port 425 and an associated tag from the tagging table 440, the tagging means 442 will tag said data with the tag number and transmit the tagged data into one or more time slots of the internal bitstream. In this embodiment, the tag is concatenated with the slot data and stored in the same time slot of the internal bitstream as said data. However, in an alternative embodiment, the tag may be transferred by one or more predefined allocated time slots in said internal bitstream while the slot data is transferred by another allocated time slot of the internal bitstream.
In connection with the output port 430 that is used as access to the second bitstream 420, internal bitstream access means 445 will read said tag, as well as the time slot data onto which the tag is tagged, from time slots of the internal bitstream. The tag is then forwarded to selection means 450, which will, based upon the received tag number, and if configured to make a selection for that specific tag number, select a time slot position of a time slot in the second bitstream. The selection means will use the position number to address a corresponding entry of the frame buffer 460. The time slot data onto which said tag was tagged will then be forwarded from the internal bitstream access means 445 and stored in the frame buffer at said entry for subsequent output on bitstream 420.
Correspondingly, in connection with the output port 431 that is used as access to the third bitstream 423, internal bitstream access means 446 will read said tag, as well as the time slot data onto which the tag is tagged, from time slots of the internal bitstream. The tag number is then forwarded to selection means 451, which will, based thereupon, and if configured to make a selection for that specific tag number, select a time slot position of a time slot in the third bitstream 423. The selection means 451 will use the position number to address a corresponding entry of the frame buffer 461. The time slot data onto which said tag was tagged will then be forwarded from the internal bitstream access means 446 and stored in frame buffer 461 at said entry for subsequent output on bitstream 423 via port 431.
An example of selection means according to an embodiment of the present invention will now be described with reference to Fig. 3, which for example may be any one or more of the selection means 250, 251, 450, and 451 shown in Figs. 1 and 2. The selection means 550 in Fig. 3 is basically formed by a tag-to-slot table 540. The tag- to-slot table has entries that are addressed by a tag number that typically has been previously tagged to the time slot data read from an input bitstream. Each entry of the tag-to-slot table provides a respective time slot position in the bitstream connected to the output port to which the selection means belongs, with the exemption of entries of tag numbers that are tagged to data that are not to be transmitted by the respective bitstream. The information in the tag-to-slot table is either fixed, that is a certain entry always provides a certain time slot position, or is controlled by a controller that stores information in the tag-to-slot table at channel set-up. According to the invention, if a tag number is associated with data that are to be space multicasted or broadcasted through the switch, selection means at different output ports have tag-to-slot tables configured to select time slot positions in the bitstreams connected to respective output ports as a response to the same tag number. As is understood, the description above of exemplifying embodiments of the invention has been made in order to provide a better understanding thereof. Of course, an actual switch will incorporate elements not shown in the figures, and may also be realized using other components than the ones specifically described herein. For example, at different locations in the switch, further frame buffers, multiplexing means, and the like, may be provided to facilitate the desired operation. As is understood by those skilled in the art, even though the invention has been described with reference to exemplifying embodiments thereof, different alterations and combinations may be made thereof within the scope of the invention, which is defined by the accompanying claims.

Claims

1. A method for switching data, in a switch, between bitstreams of a circuit switched synchronous time divi- sion multiplexing network, said method comprising the steps of: tagging data read from a time slot of a first bitstream of said bitstreams with an identifier; and selecting, for each one of at least a second and a third bitstream of said bitstreams, into which respective time slot thereof to transmit said data based upon said identifier.
2. A method as claimed in claim 1, comprising trans- ferring said data and said identifier within said switch using time slots of a switch internal bitstream.
3. A method as claimed in claim 2, wherein said data is concatenated with said identifier.
4. A method as claimed in any one of the preceding claims, wherein said identifier identifies a channel, which is to be switched from said first bitstream to said second and said third bitstream and which said data refers to, and wherein said selecting step comprises selecting a time slot of said second bitstream and a time slot of said third bitstream based upon the channel information provided by said identifier.
5. A method as claimed in claim 4, wherein said selecting step comprises selecting the next available time slot of said channel on the respective bitstream of said second and third bitstreams .
6. A method as claimed in any one of the preceding claims, wherein said network is a DTM network.
7. An apparatus for switching data between bitstreams of a circuit switched synchronous time division multiplexing network, comprising: associating means (240, 242; 440, 442) for tagging data read from a time slot of a first bitstream of said bitstreams with an identifier; and selecting means (250, 251; 450, 451; 550) for selecting, for each one of at least a second and a third bitstream of said bitstreams, into which respective time slot thereof to transmit said data based upon said identifier.
8. An apparatus as claimed in claim 7, wherein said associating means are provided at an port (225; 425) of said switch, said port receiving said first bitstream.
9. An apparatus as claimed in claim 7 or 8 , wherein said selecting means are provided at a second port (230; 430) transmitting said second bitstream and at a third port (231; 431) transmitting said third bitstream.
10. An apparatus as claimed in any one of claims 7-
9, wherein said data and said identifier are transferred within said apparatus using time slots of a switch internal bitstream (470) .
11. An apparatus as claimed in any one of claims 7-
10, wherein said identifier identifies an isochronous channel, which is to be switched from said first bit- stream to said second and said third bitstream and which said data refers to, and wherein said selecting means are arranged to select a time slot of said second bitstream and a time slot of said third bitstream based upon the channel information provided by said identifier.
12. An apparatus as claimed in any one of claims 7- 11, wherein said network is a DTM network.
PCT/SE1998/002360 1997-12-18 1998-12-17 Method and apparatus for switching data between bitstreams of a circuit switched time division multiplexed network WO1999031849A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP98964625A EP1040723A2 (en) 1997-12-18 1998-12-17 Method and apparatus for switching data

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9704740-1 1997-12-18
SE9704740A SE9704740D0 (en) 1997-12-18 1997-12-18 Method and apparatus for switching data between bitstreams of a circuit switched time division multiplexed network

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WO1999031849A2 true WO1999031849A2 (en) 1999-06-24
WO1999031849A3 WO1999031849A3 (en) 1999-08-26

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WO1999031849A3 (en) 1999-08-26
SE9704740D0 (en) 1997-12-18

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