WO1999060627A1 - Electronic module - Google Patents

Electronic module Download PDF

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Publication number
WO1999060627A1
WO1999060627A1 PCT/DE1999/001353 DE9901353W WO9960627A1 WO 1999060627 A1 WO1999060627 A1 WO 1999060627A1 DE 9901353 W DE9901353 W DE 9901353W WO 9960627 A1 WO9960627 A1 WO 9960627A1
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WO
WIPO (PCT)
Prior art keywords
substrate
contacts
shielding
shield
external
Prior art date
Application number
PCT/DE1999/001353
Other languages
German (de)
French (fr)
Inventor
Thomas Zeiler
Gerold GRÜNDLER
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Publication of WO1999060627A1 publication Critical patent/WO1999060627A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components

Definitions

  • the invention lies in the field of connection and shielding technology of semiconductor components with high-frequency application and relates to an electronic assembly with at least one semiconductor component and with a substrate, on the top of which the semiconductor component is arranged and on the underside of which a two-dimensional connection arrangement is provided, which has outer contacts close to the substrate edge and inner contacts surrounded by them all around, which are at least partially electrically connected to connection pads of the semiconductor component.
  • Such an assembly is known, for example, from the publication "Electrical Characterization of BGA Packages" by C. atei and APAgrawal in 1997 Proceedings 47 th ECTC, IEEE, pages 1087 to 1093, in the form of a so-called plastic ball grid array (PBGA)
  • PBGA plastic ball grid array
  • a semiconductor module is connected to corresponding connection spots on the top of a substrate by means of corresponding spots (contacts or pads), for example by means of wire bonding Contacts are electrically connected.
  • These contacts are arranged regularly (ie in a grid) on one level (two-dimensionally) in several columns and rows and are covered, for example, by solder balls.
  • the individual external connection contacts can cover the entire substrate underside in a grid-like manner or can also be arranged in the form of a circumferential outer band of several parallel connection contacts and / or in the central area as an island-like array.
  • the semiconductor component arranged on the upper side of the substrate can be covered together with the bonding wires by a protective compound or encapsulated in a molding compound.
  • Such assemblies allow very high functional integration in a comparatively small space requirement.
  • Such modules are to be operated in the high-frequency range (with frequencies of more than 500 MHz, for example), trouble-free operation or protection of other neighboring circuit parts and / or the environment requires adequate electromagnetic shielding.
  • shielding measures known in principle from other assemblies could be taken into account.
  • these shielding measures have only a limited effectiveness in terms of construction in the assemblies described at the outset and are associated with considerable additional outlay.
  • the object of the invention is therefore to design an electronic assembly such that high-frequency shielding is reliably ensured with simple means.
  • the external contacts are at shielding potential
  • an electrically conductive shield is applied to the top of the substrate, which surrounds the semiconductor component and which is also at shielding potential, and that at least one internal contact is subjected to a high-frequency signal.
  • a major advantage of the assembly according to the invention is that additional material and assembly costs for the high-frequency shielding can be kept to a minimum, while still maintaining a compact construction of the assembly.
  • the shielding is advantageously extremely space and weight saving. This is particularly e.g. of considerable importance for portable devices (e.g. mobile phones).
  • Another advantage of the invention is that the upper side of the substrate can be designed comparatively freely, as long as it is ensured that the high-frequency-sensitive areas inside the shield on the upper side of the substrate and the external contacts (internal contacts) exposed to high-frequency signals on the underside of the substrate circumferential shield formed by the external contacts.
  • a structurally preferred embodiment of the invention provides that the shield is formed by a metal cap.
  • a preferred development of the invention with regard to the positioning and mounting of the shield consists in that a circumferential or circumferential partial metallization is provided on the upper side of the substrate, which is at shielding potential and to which the shield is connected in an electrically conductive manner.
  • a particularly good shielding effect can be achieved on the upper side of the substrate by means of a completely closed shielding — for example a completely closed conductive cap that is tightly connected to the metallization, a partially open shielding can often be sufficient.
  • gaps or openings of up to 3 mm in the shielding or their contacting have proven to be harmless. This has the advantage of being easier to implement.
  • connection technology provides that the metallization is electrically connected to at least one external contact.
  • FIG. 1 An electronic assembly according to the invention in
  • Figure 2 The view of external connection contacts on a substrate underside.
  • the assembly shown significantly enlarged in FIG. 1 contains a semiconductor component 1, which is fixed on a substrate 2 using adhesive technology known per se. Of course, further electronic components and / or semiconductor components (chips) can be arranged on the substrate.
  • Connection pads (contact pads) 3 of the semiconductor module 1 are connected to contact pads 6 on the upper side 2a of the substrate 2 via bonding wires 4.
  • the contact pads 6 are designed as ends or components of conductor tracks 8, which extend on the upper side 2 a of the substrate and lead to electrical plated-through holes 10 in a manner known per se.
  • the plated-through holes 10 emerge at the underside of the substrate 2b and end at contact spots 11. These are in a known manner (cf. for example the mentioned attachment "Electrical Characterization of BGA Package") each have a solder ball 12.
  • the solder balls 12 are used for external contacting of the assembly or for connection to a main circuit board, not shown, by positioning the assembly on the
  • the main circuit board is initiated by targeted heating to re-liquefy (“reflow”) the solder balls 12, which results in solder contacts at the desired points.
  • reflow re-liquefy
  • solder balls 12 which results in solder contacts at the desired points.
  • BGA ball grid array
  • PGA pin-grid arrays
  • the solder balls form in the inner region 13 hereinafter referred to as inner contacts 14, while the outer contacts located close to the substrate edge 15 are referred to as outer contacts 16.
  • the inner contacts 14 and the outer contacts 16 together form the connection arrangement 20.
  • the inner (indicated as wooden circles) inner contacts 14 are arranged in rows of three or columns of three within the inner region 13, which is surrounded by a circumferential line 22 of external contacts 16 towards the respective substrate edge (for example 15 / cf. FIG. 1).
  • the external contacts 16 are at the same shielding potential by means of plated-through holes 24, 25 as a metallization 26, which is designed as a circumferential conductor track on the top side of the substrate 2a.
  • An electrically conductive cap is applied to the metallization 26 and is electrically connected to it, for example by gluing, welding or soldering.
  • the external contacts 16 and thus the Metallization 26 and the cap 28 are, as indicated schematically in FIG. 1, connected to earth potential (shielding potential) 30.
  • the cap 28 completely covers and surrounds the semiconductor component 1 and also its connections connected to internal contacts 14. At least some of the internal contacts 14 are acted upon by a high-frequency signal HF, which is completely shielded by the cap 28 or the external contacts 16 (see FIG. 2).
  • the component 1 can be covered by a covering compound 32.
  • An electronic assembly is thus created in a simple manner, which is suitable for high-frequency applications with frequencies of or above 500 MHz.
  • the shielding is carried out extremely inexpensively and only leads to a slight increase in the installation space required by the module, the surface area (so-called footprint) required for the connection advantageously remaining unchanged. Since the high-frequency connections are arranged inside within the connection grid and are shielded from the external connections 16 which are at the shielding potential, an excellent shielding effect is ensured.
  • the shielding effect on the underside 2b depends on the distance of the external contacts 16 from one another. Studies have shown that a relatively coarse connection pitch of 2.54 mm between the external contacts 16 ensures adequate shielding up to frequencies of several GHz.

Abstract

The inventive module comprises a semiconductor unit (1) which is mounted on the top surface (2a) of a substrate (2). A two dimensional pin configuration (20) is provided on the bottom surface (2b) of the substrate, said pin configuration having individual outer, external contacts (16) which are located close to the substrate edge and internal contacts (14) which are surrounded all around by said outer contacts. In order to guarantee high-frequency shielding, the external contacts (16) are set on shielding potential (30) and an electroconductive shield (28) is placed on the top surface of the substrate (2a). This shield (28) covers the semiconductor unit and is also on shielding potential (30). At least one internal contact (14) is subjected to a high-frequency signal (HF).

Description

Beschreibungdescription
Elektronische BaugruppeElectronic assembly
Die Erfindung liegt auf dem Gebiet der Anschluß- und Abschirmtechnik von Halbleiter-Bauteilen mit Hochfrequenz-Applikation und betrifft eine elektronische Baugruppe mit mindestens einem Halbleiterbaustein und mit einem Substrat, auf dessen Oberseite der Halbleiterbaustein angeordnet ist und an dessen Unterseite eine zweidimensionale Anschlußanordnung vorgesehen ist, die äußere, substratkantennahe Außenkontakte und von diesen umlaufend umgebene Innenkontakte aufweist, die zumindest teilweise mit Anschlußflecken des Halbleiterbauteils elektrisch verbunden sind.The invention lies in the field of connection and shielding technology of semiconductor components with high-frequency application and relates to an electronic assembly with at least one semiconductor component and with a substrate, on the top of which the semiconductor component is arranged and on the underside of which a two-dimensional connection arrangement is provided, which has outer contacts close to the substrate edge and inner contacts surrounded by them all around, which are at least partially electrically connected to connection pads of the semiconductor component.
Eine derartige Baugruppe ist beispielsweise aus der Veröffentlichung „Electrical Characterization of BGA Packages" von C. atei und A.P.Agrawal in 1997 Proceedings 47th ECTC, IEEE, Seiten 1087 bis 1093, in Form eines sog. Plastic Ball-Grid- Arrays (PBGA) bekannt. Bei dieser Baugruppe ist ein Halbleiterbaustein über entsprechende Flecken (Kontakte oder Pads) z.B. mittels Drahtbonden mit korrespondierenden Anschlußflek- ken auf der Oberseite eines Substrats verbunden. Die Anschlußflecken können über auf der Substratoberseite verlau- fende und das Substrat durchdringende Leiterbahnen mit an der Substratunterseite ausgebildeten Kontakten elektrisch verbunden sein. Diese Kontakte sind in einer Ebene (zwei-di- mensional) in mehreren Spalten und Zeilen regelmäßig (d.h. im Raster) angeordnet und beispielsweise von Lotkugeln (Balls) bedeckt. Aus dieser Anordnung und Kontaktierbarkeit leitet sich der Begriff „Ball-Grid-Array (BGA) " ab, der zur üblichen Bezeichnung derartiger Anschlußanordnungen geworden ist. In ähnlicher Weise aufgebaute Anschlußanordnungen, bei denen beispielsweise Stifte als externe Anschlußkontakte dienen, werden in analoger Weise als „Pin-Grid-Arrays (PGA)" bezeichnet.Such an assembly is known, for example, from the publication "Electrical Characterization of BGA Packages" by C. atei and APAgrawal in 1997 Proceedings 47 th ECTC, IEEE, pages 1087 to 1093, in the form of a so-called plastic ball grid array (PBGA) In this assembly, a semiconductor module is connected to corresponding connection spots on the top of a substrate by means of corresponding spots (contacts or pads), for example by means of wire bonding Contacts are electrically connected. These contacts are arranged regularly (ie in a grid) on one level (two-dimensionally) in several columns and rows and are covered, for example, by solder balls. This term and contactability is the term "ball -Grid-Array (BGA) ", which is the usual name for this type of connector has become. Connection arrangements constructed in a similar manner, in which, for example, pins serve as external connection contacts, are referred to in an analogous manner as “pin grid arrays (PGA)”.
Die einzelnen externen Anschlußkontakte können rasterförmig im wesentlichen die gesamte- Substratunterseite bedecken oder aber auch in Form eines umlaufenden äußeren Bandes jeweils mehrerer paralleler Anschlußkontakte und/oder im zentralen Bereich als inselartiges Array angeordnet sein. Der auf der Substratoberseite angeordenete Halbleiterbaustein kann zusam- men mit den Bonddrähten von eine Schutzmasse bedeckt oder in eine Preßmasse eingekapselt sein.The individual external connection contacts can cover the entire substrate underside in a grid-like manner or can also be arranged in the form of a circumferential outer band of several parallel connection contacts and / or in the central area as an island-like array. The semiconductor component arranged on the upper side of the substrate can be covered together with the bonding wires by a protective compound or encapsulated in a molding compound.
Derartige Baugruppen erlauben auf vergleichsweise geringem Anschluß-Platzbedarf eine sehr hohe funktionale Integration. Sollen derartige Baugruppen jedoch im hochfrequenten Bereich (mit beispielsweise Frequenzen von mehr als 500 MHz) betrieben werden, erfordert ein störungsfreier Betrieb bzw. ein Schutz anderer benachbarter Ξchaltungsteile und/oder der Umwelt eine ausreichende elektromagnetische Abschirmung.Such assemblies allow very high functional integration in a comparatively small space requirement. However, if such modules are to be operated in the high-frequency range (with frequencies of more than 500 MHz, for example), trouble-free operation or protection of other neighboring circuit parts and / or the environment requires adequate electromagnetic shielding.
Dazu könnten grundsätzlich von anderen Baugruppen bekannte Abschirmmaßnahmen (beispielsweise die Verwendung einer leitfähigen Beschichtung des Halbleiterbausteins, Verwendung spezieller Abdeckmaßen oder einer separaten Abschirmung des Bau- teils) in Betracht bezogen werden. Diese Abschirmmaßnahmen haben jedoch bei den eingangs beschriebenen Baugruppen konstruktionsgemäß nur eine begrenzte Wirksamkeit und sind mit erheblichem zusätzlichen Aufwand verbunden.For this purpose, shielding measures known in principle from other assemblies (for example the use of a conductive coating on the semiconductor module, use of special masking dimensions or separate shielding of the component) could be taken into account. However, these shielding measures have only a limited effectiveness in terms of construction in the assemblies described at the outset and are associated with considerable additional outlay.
Die Aufgabe der Erfindung besteht daher in der Ausbildung einer elektronischen Baugruppe dahingehend, daß eine hochfrequente Abschirmung mit einfachen Mitteln zuverlässig gewährleistet ist. Zur Lösung dieser Aufgabe ist bei einer elektronischen Baugruppe der eingangs genannten erfindungsgemäß Art vorgesehen, daß die Außenkontakte auf Abschirmpotential liegen, daß auf die Substratoberseite eine elektrisch leitende Abschirmung aufgebracht ist, die den Halbleiterbaustein umgibt und die ebenfalls auf Abschirmpotential liegt, und daß zumindest ein Innenkontakt mit einem hochfrequenten Signal beaufschlagt ist .The object of the invention is therefore to design an electronic assembly such that high-frequency shielding is reliably ensured with simple means. To solve this problem, it is provided in an electronic assembly of the type mentioned according to the invention that the external contacts are at shielding potential, that an electrically conductive shield is applied to the top of the substrate, which surrounds the semiconductor component and which is also at shielding potential, and that at least one internal contact is subjected to a high-frequency signal.
Ein wesentlicher Vorteil der erfindungsgemäßen Baugruppe besteht darin, daß zusätzliche Material- und Montagekosten für die hochfrequente Abschirmung auf ein Minimum beschrankt werden können, und dennoch eine kompakte Konstruktion der Baugruppe erhalten bleibt. Die Abschirmung ist vorteilhafter- weise äußerst platz- und gewichtssparend. Dies ist insbesondere z.B. bei portablen Geräten (beispielsweise Mobilfunktelefonen) von erheblicher Bedeutung. Ein weiterer Vorteil der Erfindung besteht darin, daß die Substratoberseite vergleichsweise frei-gestaltet werden kann, solange gewahrlei- stet ist, daß auf der Substratoberseite die hochfrequenzsensiblen Bereiche innerhalb der Abschirmung und auf der Substratunterseite die mit hochfrequenten Signalen beaufschlagten externen Kontakte (Innenkontakte) innerhalb der von den Außenkontakten gebildeten umlaufenden Abschirmung liegen.A major advantage of the assembly according to the invention is that additional material and assembly costs for the high-frequency shielding can be kept to a minimum, while still maintaining a compact construction of the assembly. The shielding is advantageously extremely space and weight saving. This is particularly e.g. of considerable importance for portable devices (e.g. mobile phones). Another advantage of the invention is that the upper side of the substrate can be designed comparatively freely, as long as it is ensured that the high-frequency-sensitive areas inside the shield on the upper side of the substrate and the external contacts (internal contacts) exposed to high-frequency signals on the underside of the substrate circumferential shield formed by the external contacts.
Eine konstruktiv bevorzugte Ausgestaltung der Erfindung sieht vor, daß die Abschirmung von einer Metallkappe gebildet ist.A structurally preferred embodiment of the invention provides that the shield is formed by a metal cap.
Eine hinsichtlich der Positionierung und der Montage der Ab- schirmung bevorzugte Weiterbildung der Erfindung besteht darin, daß auf der Substratoberseite eine umlaufende oder umlaufende partielle Metallisierung vorgesehen ist, die auf Abschirmpotential liegt und mit der die Abschirmung elektrisch leitend verbunden ist. Obwohl eine besonders gute Abschirmwirkung durch eine vollständig geschlossene Abschirmung - z.B. durch eine vollständig geschlossene und dicht mit der Metallisierung verbundene leitende Kappe - auf der Substratoberseite erzielbar ist, kann oft auch bereits eine teiloffene Abschirmung ausreichend sein. Bei Frequenzen von 1 bis 2 GHz haben sich Spalte oder Öffnungen von bis zu 3 mm in der Abschirmung bzw. deren Kon- taktierung als unschädlich erwiesen. Dies hat den Vorteil einer leichteren Realisierbarkeit.A preferred development of the invention with regard to the positioning and mounting of the shield consists in that a circumferential or circumferential partial metallization is provided on the upper side of the substrate, which is at shielding potential and to which the shield is connected in an electrically conductive manner. Although a particularly good shielding effect can be achieved on the upper side of the substrate by means of a completely closed shielding — for example a completely closed conductive cap that is tightly connected to the metallization, a partially open shielding can often be sufficient. At frequencies of 1 to 2 GHz, gaps or openings of up to 3 mm in the shielding or their contacting have proven to be harmless. This has the advantage of being easier to implement.
Eine anschlußtechnisch bevorzugte Fortbildung der Erfindung sieht vor, daß die Metallisierung mit zumindest einem Außenkontakt elektrisch verbunden ist.A further development of the invention preferred in terms of connection technology provides that the metallization is electrically connected to at least one external contact.
Ein Ausführungsbeispiel der Erfindung wird nachfolgend anhand einer Zeichnung näher erläutert; es zeigen:An embodiment of the invention is explained below with reference to a drawing; show it:
Figur 1 Eine erfindungsgemäße elektronische Baugruppe imFigure 1 An electronic assembly according to the invention in
Querschnitt undCross section and
Figur 2 Die Ansicht von externen Anschlußkontakten auf ei- ner Substratunterseite.Figure 2 The view of external connection contacts on a substrate underside.
Die in Figur 1 erheblich vergrößert dargestellte Baugruppe enthält einen Halbleiterbaustein 1, der auf einem Substrat 2 in an sich bekannter Klebetechnik fixiert ist. Selbstver- ständlich können auf dem Substrat weitere elektronische Bauelemente und/oder Halbleiterbausteine (Chips) angeordnet sein. Anschlußpads (Kontaktflecken) 3 des Halbleiterbausteins 1 sind über Bonddrähte 4 mit Kontaktflecken 6 auf der Oberseite 2a des Substrats 2 verbunden. Die Kontaktflecken 6 sind als Enden oder Bestandteile von Leiterbahnen 8 ausgebildet, die sich auf der Substratoberseite 2a erstrecken und in an sich bekannter Weise zu elektrischen Durchkontaktierungen 10 führen. Die Durchkontaktierungen 10 treten an der Substratunterseite 2b aus und enden an Kontaktflecken 11. Auf diese sind in bekannter Weise (vgl. beispielsweise den eingangs er- wähnten Aufsatz „Electrical Characterization of BGA Packa- ges") jeweils ein Lotkügelchen 12 aufgebracht. Die Lot- kügelchen 12 dienen zur externen Kontaktierung der Baugruppe bzw. zum Anschluß an eine nicht dargestellte Hauptleiter- platte, indem nach Positionierung der Baugruppe auf derThe assembly shown significantly enlarged in FIG. 1 contains a semiconductor component 1, which is fixed on a substrate 2 using adhesive technology known per se. Of course, further electronic components and / or semiconductor components (chips) can be arranged on the substrate. Connection pads (contact pads) 3 of the semiconductor module 1 are connected to contact pads 6 on the upper side 2a of the substrate 2 via bonding wires 4. The contact pads 6 are designed as ends or components of conductor tracks 8, which extend on the upper side 2 a of the substrate and lead to electrical plated-through holes 10 in a manner known per se. The plated-through holes 10 emerge at the underside of the substrate 2b and end at contact spots 11. These are in a known manner (cf. for example the mentioned attachment "Electrical Characterization of BGA Package") each have a solder ball 12. The solder balls 12 are used for external contacting of the assembly or for connection to a main circuit board, not shown, by positioning the assembly on the
Hauptleiterplatte durch gezieltes Erwärmen eine Wiederverflüssigung („reflow") der Lotkügelchen 12 initiiert wird, wodurch an den gewünschten Punkten Lötkontakte entstehen. Die Ausgestaltung und Anordnung der Lotkügelchen („Balls") hat zu dem mittlerweile einschläggigen Begriff Ball-Grid-Array (BGA) geführt. Werden anstatt kugelförmiger Elemente beispielsweise stiftartige Kontakte vorgesehen, spricht man üblicherweise von Pin-Grid-Arrays (PGA) . Im Rahmen der vorliegenden Erfindung ist unter Anschlußanordnung jede derartige, zweidimen- sionale rasterförmige Konfiguration zu verstehen.The main circuit board is initiated by targeted heating to re-liquefy (“reflow”) the solder balls 12, which results in solder contacts at the desired points. The design and arrangement of the solder balls (“balls”) has become the now-known term ball grid array (BGA) guided. If, for example, pin-like contacts are provided instead of spherical elements, one usually speaks of pin-grid arrays (PGA). In the context of the present invention, a connection arrangement is understood to mean any such two-dimensional grid-shaped configuration.
Die Lotkügelchen bilden im inneren Bereich 13 nachfolgend als innere Kontakte 14 bezeichnete Anschlußkontakte, während die äußeren, nahe an der Substratkante 15 gelegenen Kontakte als Außenkontakte 16 bezeichnet werden. Die Innnenkontakte 14 und die Außenkontakte 16 bilden zusammen die Anschlußanordnung 20. Wie diesbezüglich die Ansicht der Substratunterseite 2b in Figur 2 verdeutlicht, sind die inneren (als Holkreise angedeuteten) Innenkontakte 14 in 3er-Reihen bzw. 3er-Spalten innerhalb des Innenbereichs 13 angeordnet, der zur jeweiligen Substratkante (z.B. 15/vgl. Figur 1) hin von einer umlaufenden Linie 22 aus Außenkontakten 16 umgeben ist.The solder balls form in the inner region 13 hereinafter referred to as inner contacts 14, while the outer contacts located close to the substrate edge 15 are referred to as outer contacts 16. The inner contacts 14 and the outer contacts 16 together form the connection arrangement 20. As the view of the underside of the substrate 2b in FIG. 2 shows in this regard, the inner (indicated as wooden circles) inner contacts 14 are arranged in rows of three or columns of three within the inner region 13, which is surrounded by a circumferential line 22 of external contacts 16 towards the respective substrate edge (for example 15 / cf. FIG. 1).
Wie Figur 1 verdeutlicht, liegen die Außenkontakte 16 mittels Durchkontaktierungen 24,25 auf demselben Abschirm-Potential wie eine Metallisierung 26, die als umlaufende Leiterbahn auf der Substratoberseite 2a ausgebildet ist. Auf die Metallisierung 26 ist eine elektrisch leitfähige Kappe aufgebracht und mit dieser beispielsweise durch Kleben, Schweißen oder Löten elektrisch verbunden. Die Außenkontakte 16 und damit auch die Metallisierung 26 und die Kappe 28 sind wie in Figur 1 schematisch angedeutet auf Erdpotential (Abschirmpotential) 30 gelegt. Die Kappe 28 überdeckt und umgibt den Halbleiterbaustein 1 und auch dessen mit Innenkontakten 14 verbundenen Anschlüsse vollständig. Zumindest einige der Innenkontakte 14 sind mit einem hochfrequenten Signal HF beaufschlagt, das vollständig durch die Kappe 28 bzw. die Außenkontakte 16 (vgl. Figur 2) abgeschirmt ist. Das Bauteil 1 kann von einer Abdeckmasse 32 bedeckt sein.As illustrated in FIG. 1, the external contacts 16 are at the same shielding potential by means of plated-through holes 24, 25 as a metallization 26, which is designed as a circumferential conductor track on the top side of the substrate 2a. An electrically conductive cap is applied to the metallization 26 and is electrically connected to it, for example by gluing, welding or soldering. The external contacts 16 and thus the Metallization 26 and the cap 28 are, as indicated schematically in FIG. 1, connected to earth potential (shielding potential) 30. The cap 28 completely covers and surrounds the semiconductor component 1 and also its connections connected to internal contacts 14. At least some of the internal contacts 14 are acted upon by a high-frequency signal HF, which is completely shielded by the cap 28 or the external contacts 16 (see FIG. 2). The component 1 can be covered by a covering compound 32.
Damit ist in einfacher Weise eine elektronische Baugruppe geschaffen, die für Hochfrequenz-Applikationen mit Frequenzen von bzw. über 500 MHz geeignet ist. Die Abschirmung erfolgt außerordentlich kostengünstig und führt nur zu einer geringen Vergrößerung des von der Baugruppe beanspruchten Bauraums, wobei vorteilhafterweise die für den Anschluß notwendige Fläche (sog. Footprint) unverändert bleibt. Da die Hochfrequenz- Anschlüsse im Inneren innerhalb des Anschlußrasters angeordnet und von den auf Abschirmpotential liegenden Außenan- Schlüssen 16 abgeschirmt sind, ist eine hervorragende Abschirmungswirkung gewährleistet. Die abschirmende Wirkung an der Unterseite 2b ist von dem Abstand der Außenkontakte 16 zueinander abhängig. Untersuchungen haben gezeigt, daß bereits ein relativ grobes Anschlußraster von 2,54 mm Abstand zwischen den Außenkontakten 16 eine ausreichende Abschirmung bis zu Frequenzen von mehreren GHz gewährleistet. An electronic assembly is thus created in a simple manner, which is suitable for high-frequency applications with frequencies of or above 500 MHz. The shielding is carried out extremely inexpensively and only leads to a slight increase in the installation space required by the module, the surface area (so-called footprint) required for the connection advantageously remaining unchanged. Since the high-frequency connections are arranged inside within the connection grid and are shielded from the external connections 16 which are at the shielding potential, an excellent shielding effect is ensured. The shielding effect on the underside 2b depends on the distance of the external contacts 16 from one another. Studies have shown that a relatively coarse connection pitch of 2.54 mm between the external contacts 16 ensures adequate shielding up to frequencies of several GHz.

Claims

Patentansprüche claims
1. Elektronische Baugruppe1. Electronic assembly
- mit mindestens einem Halbleiterbaustein (1) und - mit einem Substrat (2) , auf dessen Oberseite (2a) der Halbleiterbaustein (1) angeordnet ist und an dessen Unterseite (26) eine zweidimensionale Anschlußanordnung (20) vorgesehen ist, die äußere, substratkantennahe Außenkontakte (16) und von diesen umlaufend umgebene Innenkontakte (14) auf- weist, die zumindest teilweise mit Anschlußflecken (3) des Halbleiterbausteins (1) elektrisch verbunden sind, dadurch gekennzeichnet , daß- With at least one semiconductor component (1) and - With a substrate (2), on the top (2a) of which the semiconductor component (1) is arranged and on the underside (26) a two-dimensional connection arrangement (20) is provided, the outer, near the substrate edge Has external contacts (16) and all-round internal contacts (14), which are at least partially electrically connected to connection pads (3) of the semiconductor module (1), characterized in that
- die Außenkontakte (16) auf Abschirmpotential (30) liegen,- The external contacts (16) are at shielding potential (30),
- auf die Substratoberseite (2a) eine elektrisch leitende Ab- schirmung (28) aufgebracht ist, die den Halbleiterbaustein- An electrically conductive shield (28) is applied to the top of the substrate (2a), which shields the semiconductor module
(1) umgibt und die ebenfalls auf Abschirmpotential (30) liegt, und(1) surrounds and which is also at shielding potential (30), and
- zumindest ein Innenkontakt (14) mit einem hochfrequenten Signal (HF) beaufschlagt ist.- At least one internal contact (14) is acted upon by a high-frequency signal (HF).
2. Baugruppe nach Anspruch 1, d a d u r c h g e k e n n z e i c h n e t, daß die Abschirmung (28) von einer Metallkappe gebildet ist.2. Module according to claim 1, d a d u r c h g e k e n n z e i c h n e t that the shield (28) is formed by a metal cap.
3. Baugruppe nach Anspruch 1 oder 2, d a d u r c h g e k e n n z e i c h n e t, daß auf der Substratoberseite (2a) eine umlaufende oder umlaufende partielle Metallisierung (26) vorgesehen ist, die auf Abschirmpotential (30) liegt und mit der die Abschirmung (28) elektrisch leitend verbunden ist.3. Module according to claim 1 or 2, d a d u r c h g e k e n e z e i c h n e t that a circumferential or circumferential partial metallization (26) is provided on the substrate top (2a), which is at shielding potential (30) and with which the shield (28) is electrically conductively connected.
4. Baugruppe nach Anspruch 3, d a d u r c h g e k e n n z e i c h n e t, daß die Metallisierung (26) mit zumindest einem Außenkontakt (16; elektrisch verbunden ist. 4. An assembly according to claim 3, characterized in that the metallization (26) is electrically connected to at least one external contact (16;
PCT/DE1999/001353 1998-05-19 1999-05-05 Electronic module WO1999060627A1 (en)

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