WO1999060627A1 - Bloc de composants electroniques - Google Patents

Bloc de composants electroniques Download PDF

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Publication number
WO1999060627A1
WO1999060627A1 PCT/DE1999/001353 DE9901353W WO9960627A1 WO 1999060627 A1 WO1999060627 A1 WO 1999060627A1 DE 9901353 W DE9901353 W DE 9901353W WO 9960627 A1 WO9960627 A1 WO 9960627A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
contacts
shielding
shield
external
Prior art date
Application number
PCT/DE1999/001353
Other languages
German (de)
English (en)
Inventor
Thomas Zeiler
Gerold GRÜNDLER
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Publication of WO1999060627A1 publication Critical patent/WO1999060627A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components

Definitions

  • the invention lies in the field of connection and shielding technology of semiconductor components with high-frequency application and relates to an electronic assembly with at least one semiconductor component and with a substrate, on the top of which the semiconductor component is arranged and on the underside of which a two-dimensional connection arrangement is provided, which has outer contacts close to the substrate edge and inner contacts surrounded by them all around, which are at least partially electrically connected to connection pads of the semiconductor component.
  • Such an assembly is known, for example, from the publication "Electrical Characterization of BGA Packages" by C. atei and APAgrawal in 1997 Proceedings 47 th ECTC, IEEE, pages 1087 to 1093, in the form of a so-called plastic ball grid array (PBGA)
  • PBGA plastic ball grid array
  • a semiconductor module is connected to corresponding connection spots on the top of a substrate by means of corresponding spots (contacts or pads), for example by means of wire bonding Contacts are electrically connected.
  • These contacts are arranged regularly (ie in a grid) on one level (two-dimensionally) in several columns and rows and are covered, for example, by solder balls.
  • the individual external connection contacts can cover the entire substrate underside in a grid-like manner or can also be arranged in the form of a circumferential outer band of several parallel connection contacts and / or in the central area as an island-like array.
  • the semiconductor component arranged on the upper side of the substrate can be covered together with the bonding wires by a protective compound or encapsulated in a molding compound.
  • Such assemblies allow very high functional integration in a comparatively small space requirement.
  • Such modules are to be operated in the high-frequency range (with frequencies of more than 500 MHz, for example), trouble-free operation or protection of other neighboring circuit parts and / or the environment requires adequate electromagnetic shielding.
  • shielding measures known in principle from other assemblies could be taken into account.
  • these shielding measures have only a limited effectiveness in terms of construction in the assemblies described at the outset and are associated with considerable additional outlay.
  • the object of the invention is therefore to design an electronic assembly such that high-frequency shielding is reliably ensured with simple means.
  • the external contacts are at shielding potential
  • an electrically conductive shield is applied to the top of the substrate, which surrounds the semiconductor component and which is also at shielding potential, and that at least one internal contact is subjected to a high-frequency signal.
  • a major advantage of the assembly according to the invention is that additional material and assembly costs for the high-frequency shielding can be kept to a minimum, while still maintaining a compact construction of the assembly.
  • the shielding is advantageously extremely space and weight saving. This is particularly e.g. of considerable importance for portable devices (e.g. mobile phones).
  • Another advantage of the invention is that the upper side of the substrate can be designed comparatively freely, as long as it is ensured that the high-frequency-sensitive areas inside the shield on the upper side of the substrate and the external contacts (internal contacts) exposed to high-frequency signals on the underside of the substrate circumferential shield formed by the external contacts.
  • a structurally preferred embodiment of the invention provides that the shield is formed by a metal cap.
  • a preferred development of the invention with regard to the positioning and mounting of the shield consists in that a circumferential or circumferential partial metallization is provided on the upper side of the substrate, which is at shielding potential and to which the shield is connected in an electrically conductive manner.
  • a particularly good shielding effect can be achieved on the upper side of the substrate by means of a completely closed shielding — for example a completely closed conductive cap that is tightly connected to the metallization, a partially open shielding can often be sufficient.
  • gaps or openings of up to 3 mm in the shielding or their contacting have proven to be harmless. This has the advantage of being easier to implement.
  • connection technology provides that the metallization is electrically connected to at least one external contact.
  • FIG. 1 An electronic assembly according to the invention in
  • Figure 2 The view of external connection contacts on a substrate underside.
  • the assembly shown significantly enlarged in FIG. 1 contains a semiconductor component 1, which is fixed on a substrate 2 using adhesive technology known per se. Of course, further electronic components and / or semiconductor components (chips) can be arranged on the substrate.
  • Connection pads (contact pads) 3 of the semiconductor module 1 are connected to contact pads 6 on the upper side 2a of the substrate 2 via bonding wires 4.
  • the contact pads 6 are designed as ends or components of conductor tracks 8, which extend on the upper side 2 a of the substrate and lead to electrical plated-through holes 10 in a manner known per se.
  • the plated-through holes 10 emerge at the underside of the substrate 2b and end at contact spots 11. These are in a known manner (cf. for example the mentioned attachment "Electrical Characterization of BGA Package") each have a solder ball 12.
  • the solder balls 12 are used for external contacting of the assembly or for connection to a main circuit board, not shown, by positioning the assembly on the
  • the main circuit board is initiated by targeted heating to re-liquefy (“reflow”) the solder balls 12, which results in solder contacts at the desired points.
  • reflow re-liquefy
  • solder balls 12 which results in solder contacts at the desired points.
  • BGA ball grid array
  • PGA pin-grid arrays
  • the solder balls form in the inner region 13 hereinafter referred to as inner contacts 14, while the outer contacts located close to the substrate edge 15 are referred to as outer contacts 16.
  • the inner contacts 14 and the outer contacts 16 together form the connection arrangement 20.
  • the inner (indicated as wooden circles) inner contacts 14 are arranged in rows of three or columns of three within the inner region 13, which is surrounded by a circumferential line 22 of external contacts 16 towards the respective substrate edge (for example 15 / cf. FIG. 1).
  • the external contacts 16 are at the same shielding potential by means of plated-through holes 24, 25 as a metallization 26, which is designed as a circumferential conductor track on the top side of the substrate 2a.
  • An electrically conductive cap is applied to the metallization 26 and is electrically connected to it, for example by gluing, welding or soldering.
  • the external contacts 16 and thus the Metallization 26 and the cap 28 are, as indicated schematically in FIG. 1, connected to earth potential (shielding potential) 30.
  • the cap 28 completely covers and surrounds the semiconductor component 1 and also its connections connected to internal contacts 14. At least some of the internal contacts 14 are acted upon by a high-frequency signal HF, which is completely shielded by the cap 28 or the external contacts 16 (see FIG. 2).
  • the component 1 can be covered by a covering compound 32.
  • An electronic assembly is thus created in a simple manner, which is suitable for high-frequency applications with frequencies of or above 500 MHz.
  • the shielding is carried out extremely inexpensively and only leads to a slight increase in the installation space required by the module, the surface area (so-called footprint) required for the connection advantageously remaining unchanged. Since the high-frequency connections are arranged inside within the connection grid and are shielded from the external connections 16 which are at the shielding potential, an excellent shielding effect is ensured.
  • the shielding effect on the underside 2b depends on the distance of the external contacts 16 from one another. Studies have shown that a relatively coarse connection pitch of 2.54 mm between the external contacts 16 ensures adequate shielding up to frequencies of several GHz.

Abstract

L'invention concerne un bloc de composants comprenant un module à semi-conducteur (1) placé sur la face supérieure (2a) d'un substrat (2). Sur la face inférieure du substrat, il est prévu un système de connexion (20) bidimensionnel (20) qui comporte des contacts extérieurs (16) individuels extérieurs proches des arêtes du substrat et des contacts intérieurs (14) entourés en périphérie par les contacts extérieurs. Pour assurer un blindage haute fréquence, les contacts extérieurs (16) se trouvent au potentiel de blindage (30). Un blindage (28) électroconducteur est appliqué sur la face supérieure (2a) du substrat, recouvre le module à semi-conducteur et se trouve également au potentiel de blindage (30). Au moins un contact intérieur (14) est soumis à l'action d'un signal haute fréquence (HF).
PCT/DE1999/001353 1998-05-19 1999-05-05 Bloc de composants electroniques WO1999060627A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19822514 1998-05-19
DE19822514.8 1998-05-19

Publications (1)

Publication Number Publication Date
WO1999060627A1 true WO1999060627A1 (fr) 1999-11-25

Family

ID=7868326

Family Applications (1)

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PCT/DE1999/001353 WO1999060627A1 (fr) 1998-05-19 1999-05-05 Bloc de composants electroniques

Country Status (1)

Country Link
WO (1) WO1999060627A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2377080A (en) * 2001-09-11 2002-12-31 Sendo Int Ltd Integrated circuit package and printed circuit board arrangement
DE10332009A1 (de) * 2003-07-14 2005-02-24 Infineon Technologies Ag Halbleiterbauelement mit elektromagnetischer Abschirmvorrichtung

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0509732A2 (fr) * 1991-04-15 1992-10-21 International Business Machines Corporation Dispositif semi-conducteur lié à un substrat
US5331514A (en) * 1991-08-05 1994-07-19 Ngk Spark Plug Co., Ltd. Integrated-circuit package
US5371404A (en) * 1993-02-04 1994-12-06 Motorola, Inc. Thermally conductive integrated circuit package with radio frequency shielding
JPH0864983A (ja) * 1994-08-25 1996-03-08 Matsushita Electric Ind Co Ltd シールドケース
WO1996027282A1 (fr) * 1995-03-02 1996-09-06 Circuit Components Incorporated Boitier peu onereux, a haute performance, pour circuits hyperfrequence dans la gamme de frequences allant jusqu'a 90 ghz faisant intervenir un format de circuit d'acces de radiofrequences a matrice de grille a boules ou a bosses et une technologie de substrat ceramique
EP0872888A2 (fr) * 1997-04-16 1998-10-21 International Business Machines Corporation Module à billes en grille

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0509732A2 (fr) * 1991-04-15 1992-10-21 International Business Machines Corporation Dispositif semi-conducteur lié à un substrat
US5331514A (en) * 1991-08-05 1994-07-19 Ngk Spark Plug Co., Ltd. Integrated-circuit package
US5371404A (en) * 1993-02-04 1994-12-06 Motorola, Inc. Thermally conductive integrated circuit package with radio frequency shielding
JPH0864983A (ja) * 1994-08-25 1996-03-08 Matsushita Electric Ind Co Ltd シールドケース
WO1996027282A1 (fr) * 1995-03-02 1996-09-06 Circuit Components Incorporated Boitier peu onereux, a haute performance, pour circuits hyperfrequence dans la gamme de frequences allant jusqu'a 90 ghz faisant intervenir un format de circuit d'acces de radiofrequences a matrice de grille a boules ou a bosses et une technologie de substrat ceramique
EP0872888A2 (fr) * 1997-04-16 1998-10-21 International Business Machines Corporation Module à billes en grille

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
MATTEI C ET AL: "LELECTRICAL CHARACTERIZATION OF BGA PACKAGES", 1997 PROCEEDINGS OF THE 47TH. ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, SAN JOSE, CA, MAY 18 - 21, 1997, 18 May 1997 (1997-05-18), INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, pages 1087 - 1093, XP000803860, ISBN: 0-7803-3858-8 *
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 07 31 July 1996 (1996-07-31) *

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2377080A (en) * 2001-09-11 2002-12-31 Sendo Int Ltd Integrated circuit package and printed circuit board arrangement
FR2829627A1 (fr) * 2001-09-11 2003-03-14 Sendo Int Ltd Agencement de boitier de circuit integre et carte a circuit imprime
GB2377080B (en) * 2001-09-11 2003-05-07 Sendo Int Ltd Integrated circuit package and printed circuit board arrangement
US6734555B2 (en) 2001-09-11 2004-05-11 Sendo International Limited Integrated circuit package and printed circuit board arrangement
US6900544B2 (en) * 2001-09-11 2005-05-31 Sendo International, Limited Integrated circuit package and printed circuit board arrangement
DE10332009A1 (de) * 2003-07-14 2005-02-24 Infineon Technologies Ag Halbleiterbauelement mit elektromagnetischer Abschirmvorrichtung
US7009288B2 (en) 2003-07-14 2006-03-07 Infineon Technologies Ag Semiconductor component with electromagnetic shielding device
DE10332009B4 (de) * 2003-07-14 2008-01-31 Infineon Technologies Ag Halbleiterbauelement mit elektromagnetischer Abschirmvorrichtung

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