WO2000017788A1 - Devices and techniques for logical processing - Google Patents

Devices and techniques for logical processing Download PDF

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Publication number
WO2000017788A1
WO2000017788A1 PCT/US1999/021955 US9921955W WO0017788A1 WO 2000017788 A1 WO2000017788 A1 WO 2000017788A1 US 9921955 W US9921955 W US 9921955W WO 0017788 A1 WO0017788 A1 WO 0017788A1
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vectors
vector
logic
logical circuit
points
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PCT/US1999/021955
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French (fr)
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Jonathan Westphal
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Vectorlog
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Priority to AU61580/99A priority Critical patent/AU6158099A/en
Priority to EP99948387A priority patent/EP1116142A1/en
Publication of WO2000017788A1 publication Critical patent/WO2000017788A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/327Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist

Definitions

  • This invention relates to the field of logical processing and, more particularly to devices and techniques for simplifying digital logic.
  • Logic can be described as techniques and operations by which one moves from what one knows to be true to new truths.
  • the principles of logic have been applied in the design and operation of digital logic circuits.
  • Modern-day computers and other processing devices have utilized digital logic extensively.
  • Many of the problems to which digital logic can be applied are complex, involving many independent variables. This results in extremely complex logical circuits in which large numbers of operations are performed. The cost associated with manufacturing and fabrication of such complex digital circuits is great. It would be highly desirable to reduce the number of complements required for performing a particular logical function or set of functions while at the same time increasing the speed with which those functions can be performed.
  • Digital computers are, of course, well-known. More recently, optical computers have been developed which can perform logical functions using optical elements. These optical computers can perform the same functions performed by digital computers but in principle much faster.
  • the invention is directed to apparatus, methods, systems and computer program products which permit a simplification of the logic required for performing a certain function to a minimum set of logical elements of operations.
  • the this permits the complexity of digital circuitry to be simplified the processing speed with which complex digital operations can be performed, reduced.
  • Figure 1 represents two-dimensional space for propositions.
  • Figure 2 illustrates the propositions P and V ⁇ V in the space of figure 1 •
  • Figure 3 is a diagram of the vector two-dimensional space showing in the conditional normal schemata or CNS-plane.
  • Figure 4 is a diagram of the vector two-dimensional space showing the alternational normal schemata or the ANS- plane.
  • Figure 5 is a diagram showing modus ponens in the CNS-plane.
  • Figure 6 is a diagram showing modus tollens in the CNS- plane
  • Figure 7 use a diagram showing the disjunctive syllogism in the CNS- plane.
  • Figure 8 is the diagram showing how the ANS- and CNS- planes relate.
  • Figure 9 is a diagram illustrating operations within the ANS- space.
  • Figure 10 shows an extension of the ANS- plane of Figure 4 to a three-dimensional ANS- space.
  • Figure 11 shows an extension of the CNS- space to three dimensions together with a hypothetical syllogism.
  • Figure 12A illustrates a hypothetical syllogism with three variables in the CNS- space.
  • Figure 12B shows a view of the hypothetical syllogism in the three-dimensional CNS- space.
  • Figure 13 A illustrates a cancellation technique used in simplifying logical representations and in accordance with the invention.
  • Figure 13B shows the representations of Figure 13 A in graphical form.
  • Figure 13C illustrates implication and equivalence.
  • Figures 14 A, 14B and 14C illustrate a solution to the simplification problem using the techniques of the invention.
  • Figure 15 shows a 4-clause schema simplified.
  • Figure 16A shows a 3-clause schema simplified.
  • Figure 16B shows the truth-table for the representation of Figure 16A.
  • Figure 17 shows a 4-variable vector diagram simplification.
  • Figure 18B is an illustration of an example of the Fix Rule.
  • Figure 20 illustrates application of the invention to situations in which developed normal formulas are not the point of departure.
  • Figure 21 illustrates the equivalence of a developed alternational formal and its undeveloped counterpart.
  • Figure 22 illustrates the simplification of an undeveloped set of statements.
  • Figure 23 illustrates another simplification of an undeveloped set of statement taken from Quine.
  • Figure 24 illustrates an equivalence within the set of statements shown in Figure 23.
  • Figure 24A illustrates superfluity in the Consensus Theorem and its dual in the CNS- form in a truth-table.
  • Figure 25 illustrates the Consensus Theorem.
  • Figure 26 illustrates the dual of the Consensus Theorem.
  • Figure 27 illustrates a superfluity shown in Figure 23.
  • Figure 28 illustrates a target circuit to be simplified in accordance with the invention.
  • Figure 29 shows a simplest circuit equivalent to the target circuit.
  • Figure 30 is an illustration of optical computation of modus ponens.
  • Figure 31 is an illustration of interferometric processing for modus ponens to the Figure 32 illustrates an optical element used for disconj unction and conjunction in a free- space optical processing.
  • Figure 33 is an illustration of flat optical processing.
  • Figure 34 or is an illustration of vector addition utilizing sequences of spatial light modifiers.
  • Figure 35 is an illustration of colorimetric computation of modus ponens.
  • Figure 36 is a colorimetric simplification of pq v p q .
  • Part I of this paper describes a system of propositional logic in which propositions are represented as vectors or displacements in a space.
  • Part II gives the application of the system to the simplification problem, the problem of finding a method for reducing a truth-functional schemata in altemational normal form to a shortest equivalent.
  • Part III is about applications: (i) to problems of electrical circuit minimization; (ii) to free-space optical processing; (iii) to "flat" optical processing; and (iv) to logical processing using colorimetry.
  • V is for vector, which is from the Latin word meaning “carrier”, “traveller” or “ rider”.
  • the V-diagram can be further built up by adding the negation symbols for the negative vectors p and q in the negative or reverse directions along their respective axes. So we arrive at all of the literals, which are single letters and negations of single letters, and we can also find pairs of single negated or unnegated letters, the propositions p v q , and p v q .
  • the plane of theretemational normal schemata or the ANS-plane as I shall call it, in which the points are not alternations but conjunctions, and the vector operation "+" within the space is interpreted as alternation.
  • the ANS-plane and the CNS-plane are duals, so that each point in each plane correspond to its dual in the other plane. This also means that the uniting operation in the CNS-plane is related to the dual of the operation in the ANS-plane, and vice versa. In the CNS-plane "+" is alternation, and so in the ANS-plane it is conjunction.
  • Together with here means treating the points and directions algebraically as themselves directions from the origin. This yields a cancellation technique in which a starting-point of 0 is cancellation of no literal, and an end point of 0 is the cancellation of all the literals
  • disjunct of this is equivalent to p p, and so it is always false. Hence the alternation is equivalent to the second disjunct, or the assertion pq.
  • O has the effect of reversing the truth- values of the base propositions.
  • O Moving towards O from the base (p,q) in the CNS- space we get the vector p v q. O has the effect of putting p and q through the Sheffer- function "
  • the vector moving away from O in the CNS-space towards e.g. (p,q) is
  • N in the Tractatus could be described as a generalization of 4- to more than two places, as N(p,q,r), for example, is pqr.
  • N(p,q,r) for example, is pqr.
  • the simplification problem is the problem of reducing truth-functional schemata (or, in the system I am describing, systems of vectors in the ANS-space) to their shortest equivalents.
  • a practical method for doing this, in altemational normal form continues, as Quine observes (Quine, 1982, p. 78), to be suprisingly elusive.
  • each clause or disjunct of t is a position vector (i.e. one pointing to O) with O at one comer of a parallelogram made of propositional addresses to the i-point at the other . Any two other outside vertices of such a parallelogram are implicants which are among the original clauses of t.
  • the first job is to plot the target schema in a V-diagram.
  • the target schema is equivalent to qr v pr .
  • the whole figure in Figure 17 is a "measure polytope" or hypercube, though one with a further complex internal structure.
  • tessellation to the number of propositional variables or vectors p, q, r s ... that can be handled, because the space is derived not from a closed figure, such as a cube, but from a sheaf of lines in the geometrical sense. Not all closed figures tessellate. All the lines of the multidimensional sheaves are coincident.
  • v is the number of vectors required to make the fix on the ⁇ -point
  • d is the drop in the number of literals from the clauses of the given schema to the resulting clause in the target schema.
  • the vector summation of p q and q r to p qq r or p q r is disallowed by the Fix Rule, according to which the number of vectors needed to make a fix is equal to the d-th power of 2. This summation would actually produce a negative value for d. As the number of literals rises from two to three, the drop increases from 2 to 3, or -1.
  • Quine gives another interesting example of a simplification with four simplest equivalents, one which also illustrates the method of simplification for non-developed or unbalanced schemata like the last example.
  • the example (Quine, 1952, p. 528) is pqr v pr v pqs v j r v p q r s ( Figure 23).
  • the charm of a vector simplification technique is that is follows a least-action principle, for any number of propositional vectors, in the sense that the problem is not one of finding shortest equivalents to truth-functional schemata. Rather the space, inasmuch as it is fixed vector space in which all free vectors having the same direction are in a sense the same directional vector, is unable not to give the desired result.
  • the first job is to plot this in the ANS-space as the set of vectors pqr v pr v pqs v p r v p q r s , as in Figure 23 above.
  • this system of vectors e.g., pq v p r v pr v p q s (cf. p. 39).
  • the resultant schema can then be translated into the circuit diagram AB + A C + A C + A B D ( Figure 29).
  • a beam V can be sent from the origin to a half-darkening beamsplitting mirror at the node p. At p it is split and sent at half-strength to q, and to q .
  • a second beam U from O is sent to the node pv q, which is also p— >q.
  • Both half-implication beams are coincident on q, and at q the photoreceptor gives a reading of .5 + .5 or 1.
  • the system has optically computed modus ponens; from an input of p and an input of p v q, it has yielded up q.
  • the system gives a physical interpretation of beamsplitting as multiple implication and of darkening as fractional implication.
  • the beamsplitter at p v q itself directs the beam to q at only half- strength, and the desired computation is achieved.
  • a second method of exploiting the vector system for computation is more markedly spatial.
  • SLMs spatial light modifiers
  • Colored laser beams can be used so that the refractive angle is built into the vector rather than into the propositional nodes as the CIE (Commission Internationale de 1' Eclairage) x-y chromaticity diagram (a color mixing diagram) is itself a vector space. (Or a mixed system of colored laser and colored mirrors could be used.) Then optical computation for simplification is simply the colorimetric process of additive color mixing.
  • p red
  • Y yellow
  • B complementary blue
  • YR p v q yellow-red
  • BR p v q blue-red
  • p v q is the complementary of YR, a cyan blue.

Abstract

The invention is directed to apparatus, methods, systems and computer program products which permit a simplification of the logic required for performing a certain function to a minimum set of logical elements of operations, permitting a complex digital circuitry to be simplified so that the processing speed for performing the complex digital operations, is reduced. This is accomplished by using a system of propositional logic (13B), representing the logic of a logical circuit to be designed as points and vectors in a vector space, simplifying the logic of the logical circuit to a simpler form using the points and vectors in a vector space, and designing the circuit using the simpler form.

Description

DEVICES AND TECHNIQUES FOR LOGICAL PROCESSING
BACKGROUND OF THE INVENTION
Field of the invention
This invention relates to the field of logical processing and, more particularly to devices and techniques for simplifying digital logic.
Description of related art
Logic can be described as techniques and operations by which one moves from what one knows to be true to new truths. The principles of logic have been applied in the design and operation of digital logic circuits. Modern-day computers and other processing devices have utilized digital logic extensively. Many of the problems to which digital logic can be applied are complex, involving many independent variables. This results in extremely complex logical circuits in which large numbers of operations are performed. The cost associated with manufacturing and fabrication of such complex digital circuits is great. It would be highly desirable to reduce the number of complements required for performing a particular logical function or set of functions while at the same time increasing the speed with which those functions can be performed. Digital computers are, of course, well-known. More recently, optical computers have been developed which can perform logical functions using optical elements. These optical computers can perform the same functions performed by digital computers but in principle much faster.
SUMMARY OF THE INVENTION The invention is directed to apparatus, methods, systems and computer program products which permit a simplification of the logic required for performing a certain function to a minimum set of logical elements of operations. The this permits the complexity of digital circuitry to be simplified the processing speed with which complex digital operations can be performed, reduced.
This is accomplished using a system of propositional logic in which propositions are represented as vectors or displacement in a space. This is applied to the simplification problem, the problem of finding a method for reducing logical schema to a shortest equivalent. Applications of these techniques to the problems of electrical circuit minimization, to free-space optical processing, to flat optical processing, and to logical processing using color imagery are described.
BRIEF DESCRIPTION OF DRAWINGS The objects, features and advantages of the system of the present invention will be apparent from the following description in which: Figure 1 represents two-dimensional space for propositions. Figure 2 illustrates the propositions P and V <V in the space of figure 1 • Figure 3 is a diagram of the vector two-dimensional space showing in the conditional normal schemata or CNS-plane.
Figure 4 is a diagram of the vector two-dimensional space showing the alternational normal schemata or the ANS- plane.
Figure 5 is a diagram showing modus ponens in the CNS-plane. Figure 6 is a diagram showing modus tollens in the CNS- plane Figure 7 use a diagram showing the disjunctive syllogism in the CNS- plane. Figure 8 is the diagram showing how the ANS- and CNS- planes relate. Figure 9 is a diagram illustrating operations within the ANS- space. Figure 10 shows an extension of the ANS- plane of Figure 4 to a three-dimensional ANS- space.
Figure 11 shows an extension of the CNS- space to three dimensions together with a hypothetical syllogism.
Figure 12A illustrates a hypothetical syllogism with three variables in the CNS- space. Figure 12B shows a view of the hypothetical syllogism in the three-dimensional CNS- space.
Figure 13 A illustrates a cancellation technique used in simplifying logical representations and in accordance with the invention.
Figure 13B shows the representations of Figure 13 A in graphical form. Figure 13C illustrates implication and equivalence.
Figures 14 A, 14B and 14C illustrate a solution to the simplification problem using the techniques of the invention. Figure 15 shows a 4-clause schema simplified. Figure 16A shows a 3-clause schema simplified. Figure 16B shows the truth-table for the representation of Figure 16A. Figure 17 shows a 4-variable vector diagram simplification. Figure 18A is a diagram illustrating the Fix Rule for d = 2. Figure 18B is an illustration of an example of the Fix Rule. Figure 19 is an illustration of the Fix Rule for d = 3.
Figure 20 illustrates application of the invention to situations in which developed normal formulas are not the point of departure.
Figure 21 illustrates the equivalence of a developed alternational formal and its undeveloped counterpart.
Figure 22 illustrates the simplification of an undeveloped set of statements. Figure 23 illustrates another simplification of an undeveloped set of statement taken from Quine.
Figure 24 illustrates an equivalence within the set of statements shown in Figure 23. Figure 24A illustrates superfluity in the Consensus Theorem and its dual in the CNS- form in a truth-table.
Figure 25 illustrates the Consensus Theorem. Figure 26 illustrates the dual of the Consensus Theorem. Figure 27 illustrates a superfluity shown in Figure 23.
Figure 28 illustrates a target circuit to be simplified in accordance with the invention. Figure 29 shows a simplest circuit equivalent to the target circuit. Figure 30 is an illustration of optical computation of modus ponens. Figure 31 is an illustration of interferometric processing for modus ponens to the Figure 32 illustrates an optical element used for disconj unction and conjunction in a free- space optical processing.
Figure 33 is an illustration of flat optical processing.
Figure 34 or is an illustration of vector addition utilizing sequences of spatial light modifiers. Figure 35 is an illustration of colorimetric computation of modus ponens.
Figure 36 is a colorimetric simplification of pq v p q . DESCRIPTION OF THE PREFERRED EMBODIMENT
Part I of this paper describes a system of propositional logic in which propositions are represented as vectors or displacements in a space. Part II gives the application of the system to the simplification problem, the problem of finding a method for reducing a truth-functional schemata in altemational normal form to a shortest equivalent. Part III is about applications: (i) to problems of electrical circuit minimization; (ii) to free-space optical processing; (iii) to "flat" optical processing; and (iv) to logical processing using colorimetry.
Part I
Imagine a space in which the co-ordinates from the origin 0 are propositional addresses or possibilities. Let (1, 0) be the propositional address p, and (0,1) the propositional address q. Then (1, 1) is the point p, q, and we can let the sign "+" be an operation on p and q which is defined by distance and direction from the origin, by which 'p+q + p+q' is an instruction to go two units in a p-ward direction, and two units in a q- ward direction. The operation performed by someone obeying this instruction is commutative and associative.
We can now represent the proposition that p as a directed line-segment or vector along the p- or x-axis from the origin O to the point or propositional address p in the space, representing the vector p in boldface as is standardly done to distinguish it from the possibility p which is represented as the point at the arrowhead of p. We can also let the vector q be the proposition q, represented in the space as the vector pointing straight up the q- or y-axis to the point q.
Now if we build up the space interpreting the operation "+" as "v", the x- and y- axes will obviously represent lines of logical equivalence. At (2, 0), or p, p, for example, we will find the arrowhead of p v p, and at (3, 0) the arrowhead of p v p v p. These and the rest of the proposition vectors along the p-axis are logically equivalent to the base vector p. At (0, 2), or q, q, we will find the arrowhead of q v q. Thus p and q will stand in for the usual unit vectors i and j. (The vector space of propositions can however have infinitely many directions such as s, t, u, v..., which will become important later on when a technique is given to simplify propositions with large numbers of literals.)
We are also now in a position to represent the proposition p v q in the space as p + q, the vector resultant of the vectors p and q, which travels from the origin to p, q. - Then p v q is itself a vector.
I will call a vector diagram for the propositional calculus such as Figure 2 a V- Diagram for the proposition or schema. ("V" is for vector, which is from the Latin word meaning "carrier", "traveller" or " rider".) The V-diagram can be further built up by adding the negation symbols for the negative vectors p and q in the negative or reverse directions along their respective axes. So we arrive at all of the literals, which are single letters and negations of single letters, and we can also find pairs of single negated or unnegated letters, the propositions p v q , and p v q .
Let us call the vector two-space in Figure 3 the CNS-plane for the plane of the "conjunctional normal schemata".
We are now free to explore another plane, the plane of the altemational normal schemata, or the ANS-plane as I shall call it, in which the points are not alternations but conjunctions, and the vector operation "+" within the space is interpreted as alternation. The ANS-plane and the CNS-plane are duals, so that each point in each plane correspond to its dual in the other plane. This also means that the uniting operation in the CNS-plane is related to the dual of the operation in the ANS-plane, and vice versa. In the CNS-plane "+" is alternation, and so in the ANS-plane it is conjunction. The operation "->" in "α- β" in the CNS-plane is to be read as implication or the assertion of the conditional. In the ANS-plane "— >" is to be read as the denial of the negation of implication, which is the denial of the conjunction of the antecedent with the negation of the consequent. The whole ANS-plane is to be read as a systematic set of denials, the denials that the propositions given at the base of the vector arrowheads imply a contradiction. This will be obvious if we remember that arrows ending at the origin rather than those issuing from it, as in the CNS-plane, are assertions in the ANS-plane.
In both of the planes certain familiar truths appear as expressions of the main principle which governs "+" or vector addition, the so-called parallelogram law of Galileo. In the CNS-plane we can think of the premises of an argument as component vectors, and the resultant as the conclusion. Then an elementary valid argument-fornrin the CNS-plane is a parallelogram starting at the origin O in that plane. The conjunction of the alternations yields the conclusion, and we get modus ponens appearing as in Diagram 5. If the vectors are represented as displacements around O in the V-diagram, the modus ponens in the CNS-plane is the set of displacements
Premise 1 -1 1 + p v q
Premise 2 1 0 p
Conclusion= 0
Modus tollens appears as:
Premise 1 -1 1 + p vq
Premise 2 0 -1 a
Conclusion= -1 The disjunctive syllogism appears, with its displacement matrix, as:
Premise 1 1 1 + p v q
Premise 2 0 -1 p
Conclusion= 0 1 q
Consider now the relation between the CNS-plane and the ANS-plane. There clearly is one, as they share the literals and the all-important origin 0. The two planes can be brought into harmony if we represent them, arbitrarily, as lying above and below the origin in a space whose third dimension runs along the conjunction-alternation axis, putting alternation at the top and conjunction at the bottom.
The result is a space, or the part of it near 0, with two planes above and below the origin. The origin 0 appears in the vertical axis between the two planes. The whole space of Figure 8 generates further principles of the propositional calculus. Take p v q in the top right hand comer. Negating it comprehensively, in all three dimensions, or developing it through the origin, gives the point p q in the ANS-plane. This is one of the two forms of DeMorgan's theorem. Its other form can be found by comprehensively negating pq in the ANS-plane, and travelling through 0 to p v q in the CNS-plane. The CNS-/ANS-space as a whole has an intriguing and beautiful structure, as it combines the dimensions of alternation and conjunction, the various propositions formed from atomic p and q, and the dimension of negation.
Operations within the ANS-space have "+" representing conjunction. When all the non-equivalent conjunction points are established in the space, pairs and other combinations of the given points or conjunctions are given as alternations or vectors. So we get a resultant of pp from pq v p q by relating the two vectors to the origin 0 in a parallelogram (Figure 9).
In the CNS-space, on the other hand, the corresponding operation produces alternations, and the operation within the space which combines them is conjunction. So we get sets of conjunctions, e.g. those important ones involving p v q, which are among the more important arguments of natural deduction.
Assume now in the ANS-space a third proposition r, and a third dimension z in which the unit vector r is to be found. So we get the r-plane, the one swept out by the vector r. This space can also be represented in two dimensions on the page. In Figure 10 the negation-affirmation axis, which follows the z-axis in the order of rotation of the variables about 0, is inserted to prevent the occlusion of lines and points.
To check the validity of the hypothetical syllogism (-1, 1, 0) (0, -1, 1), (-1, 0, 1), with three variables, in the CNS-space, we can represent it as in Figure 11.
The validity of the argument appears, using three sets of coordinates, as
Premise 1 -1 1 0 + p v q
Premise 2 0 -1 1 q v r
Conclusion = -1 0 1 p x r
Note the simplicity of the given representation or perspective on the hypothetical syllogism in Figure 1 1, matched only by the simplicity of the pqr string -1, 1, 0, 0, 1-, 1, -1, 0 1, which is merely a set of instructions for displacements in a 3 -space. The vector system can be used in the CNS-space to display other principles, for example implications, by which p v q implies p- q. It also shows that p v q implies 0
— >. p v q, as well as q — > p and p v q — > . Furthermore, the vector system shows nicely the principle of material equivalence, which states that (p-»q)(q→p) is equivalent to p<-»q (Figure 13).
The starting point of all these vectors, together with the direction, gives the end point. "Together with" here means treating the points and directions algebraically as themselves directions from the origin. This yields a cancellation technique in which a starting-point of 0 is cancellation of no literal, and an end point of 0 is the cancellation of all the literals
Starting Direction End
Point Point
0 P v q P v q
P P q q q P v q P p v q P v q 0
Parallel principles can be given for the ANS-plane. Here "α-»β" means the same as in the CNS-plane; which is coβ, the conditional, but the reason is hard to see, though interesting. Take the proposition p — > q in the CNS-plane. It is represented by (among others) an arrow from the point p to the point q. In the ANS-plane we find an arrow from p to q. Call it v. But what does v mean? Note that the CNS-plane vector from p to q is true if v is false. For v is pq , and the same vector or direction as pq ->• 0. If we want the ANS-plane vectors to represent truth, we must read them as the denials of the conjunction of the proposition p at the base of the arrow with the negation of the proposition q at the arrowhead, or -(pq ). Each arrow in the ANS-plane then reliably represents a conditional. This reveals something further about the all-important 0, the origin. We have just learned that in the ANS-plane an arrow from p to q is pq , to be read however as a negation. So what does α — > O mean? O is p p . So the conjunction of α and -(O) of -(pp). But this. is α( p v p), which is equivalent to α.
Similarly, in the CNS-plane, all the arrows which depart from 0 represent an instance of α v β, where α is O. Take an arrow from O to p v q. O is the tautology p v p. The
negation of this p p, and so the arrow to the point p v q is -(p v p) v pq. But the first
disjunct of this is equivalent to p p, and so it is always false. Hence the alternation is equivalent to the second disjunct, or the assertion pq.
If a vector in the ANS-space is directed towards O, O has the effect of reversing the truth- values of the base propositions. Moving towards O from the base (p,q) in the CNS- space we get the vector p v q. O has the effect of putting p and q through the Sheffer- function "|". The vector moving away from O in the CNS-space towards e.g. (p,q) is
also the vector from the base (p,q) to O, and so it is the vector p v q or p v q.
In a dual fashion, if we are moving towards O in the ANS-space, we get the base values, so that pq— >O is pq. From O, a vector to (p,q) will thus be pq. In the ANS- space O has the effect of putting p and q through the dagger function "4", by which p>lq is p q}
'Wittgenstein's operator N in the Tractatus could be described as a generalization of 4- to more than two places, as N(p,q,r), for example, is pqr. We could also describe a generalized Sheffer operation for more than two places which trANS-forms a base such as say (p,q,r,s) into p v q v r v s. This operation could be called S for "Sheffer". Part II
The simplification problem is the problem of reducing truth-functional schemata (or, in the system I am describing, systems of vectors in the ANS-space) to their shortest equivalents. A practical method for doing this, in altemational normal form continues, as Quine observes (Quine, 1982, p. 78), to be suprisingly elusive.
In the ANS-space "vector logic" can be applied to the problem in the following way. Take the schema pq v pq, which as well as implying p is equivalent to p. To simplify it,
form the parallelogram from the origin 0, pq and p q to the resultant or vector sum point. Call it i, for "implicant". The vector acting at ύ which is in this case pp, implies pq v pq. So ύsplits up alternationally, into its components, pq v pq, towards the origin.
Next note that pq is equivalent to pqp, so that the arrowhead at pq can be dragged to pqp. But pp can also be dragged to p. Now we have an arrow from p to pqp. But this arrow an be translated into a position on top of the arrow from pq to pp. The same procedure yields a double-headed arrow between pq and pp, and the result can be read as pq \ pq *→ p.
When an implicant splits up into its alternations towards the origin, if there is a proposition σ (for "simplest equivalent") at the center of the parallelogram formed by 0, the disjuncts of a two-clause target schema, and then σ is a shortest equivalent of the target schema. But this only works for pairs of schemata which do have an i-point.
The general simplification procedure, in the ANS-space, is as follows.
(1) Represent the altemational normal schema, the target schema t, as a set of vectors in the ANS-space. Each clause or disjunct of t is a position vector (i.e. one pointing to O) with O at one comer of a parallelogram made of propositional addresses to the i-point at the other . Any two other outside vertices of such a parallelogram are implicants which are among the original clauses of t. (2) Pick any two clauses. If there is a propositional address σ at the midpoint between the component clauses, the vector from i to σ, i.e. σ, is the simplification of and can replace the relevant clauses of t, as in the case where t is pq v pq, i is pp and σ is p.
(3) Generate- i-implicants until each clause or vector has been used at least once. If a disjunct d of t cannot be used because it forms no propositional address with any other disjunct, then d must appear unmodified in the final schema which is the simplification of t.
(4) If an t-point exists in t, delete the vectors which produce it in favor of the vector from ito O.
(5) For a clause in a schema which subsumes another clause, e.g. pqr v pq, eliminate the subsuming clause, in this case pqr, leaving pq. Implications arising from subsumption can be written into the whole vector system of t as components where relevant. For example, an arrow can be drawn from pqr to pq in the above example.
Rule (5) applies for example to pq v p, which is an undeveloped or unbalanced schema in which pq subsumes p. How does pq v p simplify to p, when it seems to yield p v q? The Answer, which cashes the metaphor of "subsumption", is that p really represents a plane, in a 3-space, sweeping out the whole p-domain, or any ANS-schema with p in it. So it is a kind of type fallacy to represent pq alongside p in a single schema as if they were to be treated separately. For pq, and pq, are really "elements" of p itself. A cube is not so many faces and so many lines, but it can be represented as lines producing faces or vice versa. As a matter of philosophy, therefore, vector logic can avail itself, as rule (5) does, of a preliminary use on Quine's operation (i) from "A Way to Simplify Truth Functions", which has us 'drop the subsuming clause ... if one of the clauses of alternation subsumes another...'. Quine's operation (i) also replaces α v α φ with α v φ, and the same for the corresponding α -schemata (Quine, 1955, p. 627).
(6) Couples such as pq v p q or p qs v pqs cannot be summed to zero, the origin. (7) Translate vectors as in Figure 14. Any superpositions of parallel arrows in opposite directions represent equivalences, (a) Drop the longer clause at the end of any double-headed arrow, (b) Drop pairs, triples etc. of double-headed arrows which meet at a point in favor of the vector from that point to 0. (c) Drop a vector or clause in the target schema which is* itself the resultant of any other two vectors.
(8) A simplification is complete if in the system which replaces the target schemata) no vectors or clauses are subsumed by others (see Rule 5); (b) no double-headed vectors remain, or, in other words, if all equivalences in the system have been exploited.
Take next the simplification of the four-clause target schema pqr v pqr v pqr v
p q r . The first job is to plot the target schema in a V-diagram. We get two parallelograms, with two i-points, qrqr and prpr , and two σ-points, qr and pr , which are final in the sense that they do not generate a further σ-point. Hence the target schema is equivalent to qr v pr .
Now take the simple-looking three-clause schema pqr v pqr \ pq r . The resultant is pq v pr.
Here the σ- and ϋ- points function as before. But something else has happened. The vector pq r has been used twice, once along with pqr to give pq, and again, with p q r , to give p r . Why was pq r not exhausted by its first use, and why can it be used again? The
Answer can be seen by looking at the truth-table for pqr v pq r v p q r , which is
1. pqr T
2. pqr T
3. P?r
4. pq~r T
5. pqr 6. pqr
1. p qr
8. p q~r
Truth, it could be said, is not exhausted by use. The p of line 2 is so to speak redundant, as line 2 has already been captured by the disjunct pq, and so line 4 has had half of its work already done.
This simplification procedure is theoretically an improvement on the techniques used in Karnaugh maps (Garrod and Boms, 1991, p. 153 ff.), as it needs no wrapping around and can be used mechanically and easily on more than four variables - any number fits into the "proposition circuit", which gradually turns from a square, with two variables, into a hexagon, with three, and finally into a circle, with an infinite number of variables. With four variables, the logical space is as given in Figure 17.
The whole figure in Figure 17 is a "measure polytope" or hypercube, though one with a further complex internal structure. There is no limitation of tessellation to the number of propositional variables or vectors p, q, r s ... that can be handled, because the space is derived not from a closed figure, such as a cube, but from a sheaf of lines in the geometrical sense. Not all closed figures tessellate. All the lines of the multidimensional sheaves are coincident.
Consider in Figure 17 a simplification from pqr s v pqr s v pqrs v Jqrs \ pq rs v pqr s to prs v q s # This proceeds as shown, with the six vectors reducing to two. The first vector or σ-point in the simplification, pr s, results from the implicand pair pqr s v pqr s. dropping the up-down qlq component. In this case we have a simplification from two four-letter schemata to one three-letter schema. The remaining four schemata are all needed to fix the σ-point qs. Both pairs pqrs \ pq rs and pq r s v
pqrs must give a fix on the same σ-point if the reduction from four literals to two is to be justified. For either pair by themselves is not sufficient for the required biconditional. The general rule is
V=2d
where v is the number of vectors required to make the fix on the σ-point, and d is the drop in the number of literals from the clauses of the given schema to the resulting clause in the target schema.
Another illustration of the Fix Rule is pqr v pqr v p^r v p<7 r v pqr v pqr v
p qr, which is , however, equivalent merely to p v q v r, as it covers every line of the truth-table except pqr .
One pair of implicands is p q r v pq r , which give the σ-point p. But as this is a drop down from three letters to one, we need a fix of four vectors or two vector sums on the point, and the third and fourth vectors pqr and pqr provide it. The same sort of fix
appears with q (pqr v pqr and pqr \ pqr) and r (P q r v pqr and pqr v pq r).
A much simpler though negative example of the Fix Rule is pqr v pq r , which seems to give p as an σ-point resultant, but fails to for lack of a fix on the point p, as four, not two vectors must converge on it for the drop. This acts as a constraint on the vector arithmetic. We seem to get
1 1
-1 -1
1 0 0
But the Fix Rule rules this out. If x columns are filled with numbers, positive or negative, then the number of non-zero columns in the sum must be x-1. The Fix Rule will seem entirely unartificial when one recognizes that what it means in, say, a 3-space, is that a literal or one-letter proposition is a face, and so four comers are needed to determine it. A two-letter proposition is a line, and so only two letters are needed to fix it. And a point in a 3-space is a three-letter proposition.
Consider as another illustration of the Fix Rule pqrs v pqrs v pq s v pqr s v pqrs
v pqrs v pq r s \ pq r s . This is very obviously equivalent to p, and since d = 3 for each clause, v for the point p = 2d. So d = 8, and eight vectors or four vector sums are needed for the fix on the σ-point.
In many cases the target schema is unbalanced in the sense that its clauses have different numbers of conjuncts and so they need to be put into developed altemational normal form. An example pq v p^r v p q r (Quine, 1982, p. 75). This is equivalent to
pq v pr v p q r . Like the early Quine's procedure in "The Problem of Simplifying Truth Functions" (Quine, 1952, p. 524), the vector simplification method given so far has taken the cumbersome 'developed normal formulas as the point of departure.' If t is developed uniformly we get p q r v p^r v pqr v pq r r, which in a V-
diagram is clearly p r v pq v pr, as pr lies midway between pqr and 0, and pq lies midway between pqr and pq r . But without development, we can take the iota-point for pqr v pq, which is pr, and argue that since pr ->.p^r v pq (where ".expression" and "expression." represents bracketing of the "expression" that precedes or follows the dots), and pr subsumes pqr, the longer pqr can simply be replaced by its own implicant.
The equivalence of undeveloped
(i) pq \ pq v qr v q r
and
(ii) pq v pr v qr
is harder to establish. It is one which resists as many as twelve fell swoops (Quine, 1982, p. 76, also in 1952, pp. 523-527) or shorter truth-tables. In the vector space with developed altemational forms the equivalence is easy enough to see. The developed form of this equivalence is easy enough to see. The developed form of this example is: pqr v
p qr v pq r v pq r v pq ~r v pqr.
The same result can be obtained using column matrices for the pairs of vectors. Then for p qr v p q r we get
p q r
-1 1 1 + p qr
-1 -1 1 p qr
pr And for >qr vpqr we get
P q r
-1 1 -1 + pqr
1 1 -1 pqr
<\r
Similarly, for pq r v pq r we get
P q r
1 -1 1 + pqr
1 -1 -1 pqr
= 1 -1 0 pq
It should be noted that in this example too the Fix Rule applies. It would be nice to take the vectors in a different order, so that pqr and pq r are chosen instead oϊpqr
and pq r , and also pqr and pq r instead of p q and pq r . This would yield r and p instead of pq and q r in the whole system. But that would mean dropping from three letters to one in the case of these two pairs of alternations, and we cannot do that as there is no fix on r or on p.
There may of course be more than one "shortest" schema. In Quine's example there is obviously is on inspection a second. The vector system qrv pqvpr has the same overall "effect" in the vector-logical space.
Let us now try this example with the use of the i-points, the key prime implicants. Take first pqv qr. This alternation is implied by the i-vector which forms the parallelogram with 0. But there is no Φ-point, and so, apparently, pqv qris not equivalent to p r. Yet in the context of the whole scheme pq v q r v p v qr , it is.
To see this, we move the free vectors p q and q r from the right-hand side of the V- diagram to the parallelogram on the left. The implicand of p r , which is p q v qr , slides into place from pq v qr back to p r, and the two-way implication or equivalence is established.
The vector summation of p q and q r to p qq r or p q r is disallowed by the Fix Rule, according to which the number of vectors needed to make a fix is equal to the d-th power of 2. This summation would actually produce a negative value for d. As the number of literals rises from two to three, the drop increases from 2 to 3, or -1.
Quine gives another interesting example of a simplification with four simplest equivalents, one which also illustrates the method of simplification for non-developed or unbalanced schemata like the last example. The example (Quine, 1952, p. 528) is pqr v pr v pqs v j r v p q r s (Figure 23).
We begin by generating vector sums for the various disjuncts. We can see fairly easily that p r and p q r s to start with, yield a parallelogram, but it seems to end at an i-point outside the logical space. Yet if we study that point, we can see that it is actually at the co-ordinates p q r s p r. This point, however, contains a contradictory or
backward and forward instruction, namely the r from p r and the r from p q r s which can both be deleted. There is also a double p in the final address, and one p of these, but not both, can of course be deleted. This leaves an end-point for a vector p q s . By similar reasoning, we can arrive at the vector q r s as the vector sum of p r and p q r s . And similarly pqr with pr gives pq, or pqr with p r gives the i-point qr. Each vector must be used at least once if it is not to appear unchanged in the simplified schema.
The corresponding Φ-points, however, do not appear at the designated addresses which are shortened versions of their i-points, and so the equivalence of the i-points and their implicands is not established. Just as in the example shown in Figure 20, the drag- back effects described in connection with p and pp in Figure 14 do not apply.
As before, in Figure 24, we first write in the parallelogram from 0 for the pair pqr v p r . This gives an tpoint at pqp, and so from pqp we write in a pair of vectors to pqr and pr . Now pqr implies pq, and is subsumed by it, and we can represent the subsumption rule here by drawing in the vector from pqr to pqp. Figure 24 is now showing an equivalence between pqr and pq, but only in the presence of the p r in the altemational schema pqr vpr, i.e. with the translated or "borrowed" vector pr - 0.
It is worth realizing that in the reductions in developed normal form, the implicands can be replaced by the implicant only because of the various biconditionals or double arrows at work. There is no intrinsic magic in the Φ-point. In the undeveloped examples, too, clauses do not disappear in a general way because pairs of disjuncts collapse into their implicants, but because of the presence of specific conditions elsewhere in the schema, which translated have the effect or creating biconditionals.
Finally, why is pqs superfluous in the example given in Figure 23? The Answer is interesting and complicated, and principles about superfluity need to be established.
Take the truth, sometimes known as the Consensus Theorem, that pq v pr v qr. -».pq v p r. Representing this in the ANS-space for p, q and r, we can see that the implicant qr is the resultant of the disjunction of pq and p r (Figure 25). We can give it as a general truth that implicants, in the ANS-space, are resultants.
Let the left-hand side of the Consensus Theorem be represented as
qp v p r v qr The Theorem says that the disjunct qr is superfluous. Consider the dual of the left-hand side of the Theorem, in the CNS-space. It is
(q p)(p r)(q v r)
This is the conjunction (q p)(p r)(q r). But clearly the last conjunct is- superfluous, as the first two conjuncts imply it by a hypothetical syllogism, in the sense that if they are t e, so is it (Figure 25).
It is nice to see the dual roles of conjunction and alternation, or ANS-and CNS- spaces, tmth and falsehood, and how the concept of the resultant and the component binds them together.
In the following truth-table, we can that the (q r) resultant is so to speak "covered" by its component with respect to tmth, in the ANS-space, and falsity in the CNS-space. That is, with the disjunctions in the ANS-space the addition of an extra tmth on already tme lines of the tmth- table does not affect the tmth of the whole schema. And similarly in the CNS-space, if the whole schema is already false, adding a false conjunct will not affect that result.
ANS- CNS- p q r qr v pq v ~ (q v p) (p v r) (q v r)
T T T T T
T T F T
T F T
T F F
F T T T T
F T F
F F T T F
F F F F
We are now in a position to deal with the superfluity of pq s in Quine's example in Figure 24. Disjunctive clauses in the ANS-space like pq s are superfluous when they are components. Before the representation of the schema pqr v p q r s v pr v p r pqs with a view to simplification, we can simply mn a check to see if any of the clauses are implicants or iota-points for any others. We can easily find that pqi → .pqr v pr from the truth-table for the schema; all the lines on which pq s is tme are also lines on which either pqr or pr is already tme, and so pq s can be deleted from the schema to be simplified.
Geometrically, the construction is as follows: (Figure 27). Note that pq s extends to pqs p. This is however the implicant for pqrs v pr. However, pq™ itself extends to pqr s pq. This last schema is the implicant for pqr v Pqs . So pq s gives way to p r v pqrs But pq1"5 can itself can be dropped in favor of pqr v pqrs . Any line of the tmth-table for pqr on which is tme is also one which either pqr or P^ is already tme.
Hence Pq s can be dropped.
So for Quine's example in Figure 23 we are left with the four possibilities:
These examples, and others like them, suggest the possibility of further applications of simplifying geometrical theorems and methods to the simplification problem. -
The charm of a vector simplification technique is that is follows a least-action principle, for any number of propositional vectors, in the sense that the problem is not one of finding shortest equivalents to truth-functional schemata. Rather the space, inasmuch as it is fixed vector space in which all free vectors having the same direction are in a sense the same directional vector, is unable not to give the desired result.
As to propositional logic as whole, it is nice to have all of the nineteen or however many clanking "mles of inference" within the space, so that there is just the one intuitively obvious method of argument: vector addition. It is really absurd to think of empty or "formal" mles such as association and communication as having the same status as say modus tollens, which is genuine "motor" that advances arguments through logical space. Association and commutation should flow out of the nature of the logical space, and in the vector space they do. The vectors p v q and q v p, for example, have the same end-point, though they arrive at it by different but corresponding routes.
Part III
(i) Electrical and Integrated Circuit Minimization
Let us now see how the techniques described can be used in a routine for simplifying electrical and integrated circuits. Take the target circuit ABC + AC + ABD + A C +
A B C D (Figure 28).
The first job is to plot this in the ANS-space as the set of vectors pqr v pr v pqs v p r v p q r s , as in Figure 23 above. Following the routine (l)-(8) given on p. 20, above, we can simplify this system of vectors to e.g., pq v p r v pr v p q s (cf. p. 39). The resultant schema can then be translated into the circuit diagram AB + A C + A C + A B D (Figure 29).
Note that the target circuit has five gates (G=5), that the total number of inputs into these gates is twelve (1=12), and that the redundancy factor (i.e., the number of times an original input is used again, corresponding to the join dots) is seven (R=7). These figures drop to G=4, 1=9 and, most importantly, R=2 for the simpler circuit, representing corresponding gains in materials savings, speed and reliability.
(ii) Free Space Optical Computation
More than ten years ago the National Academy of Sciences Panel on Photonics Science and Technology Assessment declared that 'The ultimate benefit of photonic processing could occur if practical optical logic could be developed' (Whinnery et. al., Photonics, 1988, p. 35). So far the implied challenge of the Panel has not been met.
Vector manipulation has been one of the big success stories for optical computation, but vector techniques themselves promise an application to the logic of optical computation as a whole. The full ANS-/CNS- space could be built as an optical device for checking the validity of arguments or as a logic device for optical computation, and also as simplification machine. Each operation in the space is a laser, and the resultant proposition-points such as p and pq and pqr are multifaceted beamsplitters or mirrors which reflect the beams in the correct logical directions at the correct logical strengths to ensure the required implications.
Thus in Figure 30 a beam V can be sent from the origin to a half-darkening beamsplitting mirror at the node p. At p it is split and sent at half-strength to q, and to q .
Simultaneously, a second beam U from O is sent to the node pv q, which is also p— >q.
At this point U is split and sent at half-strength to p and to q. The proposition p is said to "half-imply" q, in the sense that with one other proposition it does imply q, and the proposition p v q is said to "half-imply" q in the sense that with one other proposition (p) it does imply q.
Both half-implication beams are coincident on q, and at q the photoreceptor gives a reading of .5 + .5 or 1. The system has optically computed modus ponens; from an input of p and an input of p v q, it has yielded up q. The system gives a physical interpretation of beamsplitting as multiple implication and of darkening as fractional implication.
The same principles will apply to the other mles of inference and logical equivalences.
A development of the system given for modus ponens in Figure 30 obviates the_ need for a free beam for e.g., p to q, and simplifies the design of the node. In Figure 31, the beam to p is split, at full-strength, to p's implicants, which are p v q and p v q
(ignoring tautologies). The beamsplitter at p v q itself directs the beam to q at only half- strength, and the desired computation is achieved.
We can also arrange that in an embodiment of the uninterpreted (p, q, ... n) space, in which the base (p,q) is either p v q or pq (though not both), configurations of the beamsplitters will allow the node to switch between the two states. A conjunctional state will correspond to a concave configuration, as both inputs are required for the activation of the node, and an altemational state will correspond to a convex configuration, as shown in Figure 32. (iii) "Flat" Optical Processing
A second method of exploiting the vector system for computation is more markedly spatial. Represent the propositions in the uninterpreted (p,q) space with spatial light modifiers (SLMs). When the first premise is input, e.g. p v q, then the origin 0, and with it the position of the whole space, are moved to the point p v q, or in a p v q direction. We could say the 0 becomes p v q, so that we are now in a p v q environment, a p v q world. Then p in the second SLM (Figure 33) will be q, and we have modus ponens. And when the whole space is displaced in a p v q direction, q is p!
The SLMs are shown sequentially in Figure 34.
(iv) Colorimetric Processing
Colored laser beams can be used so that the refractive angle is built into the vector rather than into the propositional nodes as the CIE (Commission Internationale de 1' Eclairage) x-y chromaticity diagram (a color mixing diagram) is itself a vector space. (Or a mixed system of colored laser and colored mirrors could be used.) Then optical computation for simplification is simply the colorimetric process of additive color mixing. IN the CNS- space let p be red (R), p a complementary cyan blue-green (C), q a yellow (Y), q a complementary blue (B), p v q yellow-red (YR) and p v q blue-red (BR). Also p v q is the complementary of YR, a cyan blue.
The contradiction of 0 (the so-called "Nullpunkf", or "white") corresponds tσ the addition of complementary hues.2 YR + BR = R, since Y and B are complementary.
With these colorimetric assignments we can compute modus ponens and the other mles of argument and truth-preserving substitutions. The proposition p is R, and q is Y.
So p-»q, or p v q, is CY. Together with R this give Y or q, as C and R are complementaries.
In the ANS- space we can perform simplifications colorimetrically. Take the most basic simplification as an illustration, in which pq v pq is equivalent to p. Let YR represent pq and BR pq. The Y and B beams cancel to the "Nullpunk ', leaving RR or R, which is pp or p (Figure 36)
It is still tme, as Norbert Streibl et. al. ("Digital Optics", (1989)) pointed out, the 'A uniform technology for digital optical information processing, comparable in its significance to microelectronics, does not yet exist and is by itself a challenging research goal.' A vector logic for optics is a source from which such a "uniform" technology can flow, just as electronics derived from the natural isomorphism of electric circuitry and tmth- functional logic.
In this disclosure, there is shown and described only the preferred embodiment of the invention,- but, as aforementioned, it is to be understood that the invention is capable of use in various other combinations and environments and is capable of changes or modifications within the scope of the inventive concept as expressed herein.
2 With complementaries ' ... what is offered, so to speak, in the way of colour by one spectrum (or colour) is withdrawn by the other, so that the result is a vanishing of colour, just as in a contradiction between two propositions which negate one another the result is a vanishing of information' (Jonathan Westphal, Colour, Blackwell, 1991, p. 108.

Claims

Claims:
1. A method of designing logical circuits, comprising the steps of: a. representing the logic of a logical circuit to be designed as points and vectors in a vector space; and b. using the points and vectors in a vector space to simplify the logic of the logical circuit to a simpler form; and c. designing the logical circuit using the simpler form.
2. A method of manufacturing logical circuits, comprising the steps of: _ a. representing the logic of a logical circuit to be manufactured as points and vectors in a vector space; and b. using the points and vectors in a vector space to simplify the logic of the logical circuit to a simpler form; and c. using the simpler form to implement the logical circuit in hardware.
3. A method of simplifying logical circuits, comprising the steps of: a. representing the logic of a logical circuit as points and vectors in a vector space; and b. modifying the representation in vector space using at least one process mle of a set of process mles to simplify the logic.
4. The method of claim 3 in which at least one process mle of a set of process mles consisting of the following process mles: a. Process Rule 1~ al. Represent the altemational normal schema, the target schema t, as a set of vectors in the ANS-space,
a2. Each clause or disjunct of t is a position vector (i.e. one pointing to O) with O at one comer of a set of parallelograms made of propositional addresses to the i-point at the other,
a3. Any two other outside vertices of such a parallelogram are implicants which are among the- original clauses of t;
b. Process Rule 2— bl. Pick any two clauses, b2. If there is a propositional address σ at the midpoint between the component clauses, the vector from ito σ, i.e. σ, is the simplification of and can replace the relevant clauses of t, as in the case where t is pq v pq, i»is pp and σ is p; c. Process Rule 3— cl . Generate i-implicants until each clause or vector has been used at least once, c2. If a disjunct d of t cannot be used because it forms no propositional address with any other disjunct, then d must appear unmodified in the final schema which is the simplification of t; d. Process Rule 4~ dl. If an tpoint exists in t, delete the vectors which produce it in favor of the vector from Lto O; e. Process Rule 5— el. For a clause in a schema which subsumes another clause eliminate the subsuming clause; - f. Process Rule 6— fl . Couples such as pq v p q or p qs v pqs cannot be summed to zero; the origin.
g. Process Rule 1—
gl . Translate vectors as in Figure 14 if a corresponding σ-point exist for a i-point then 6 is the simplification of i.»
g2. Any superpositions of parallel arrows in opposite directions represent equivalences,
g3. For equivalences, (a) Drop the longer clause at either end of any double- headed arrow, (b) Drop pairs, triples etc. of double-headed arrows which meet at a point in favor of the vector from that point to O and (c) Drop a vector or clause in the target schema which is itself the resultant of any other two vectors;
h. Process mle 8—
hi . A simplification is complete if in the system which replaces the target schema no vectors or clauses are subsumed by others and no double-headed vectors remain (i.e. if all equivalences in the system have been exploited).
5. Apparatus for simplifying logical circuits, comprising: a. a processing element configured to represent the logic of a logical circuit to be simplified as points and vectors in a vector space and to use the points and vectors to simplify the logic of the logical circuit to a simpler form.
6. The apparatus of claim 5 in which the processing element is an optical computer.
7. The apparatus of claim 5 in which the processing element is a digital computer.
8. The apparatus of claim 1 in which the processing element is an colorimetric computer.
9. The apparatus of claim 1 in which the processing element is an analog computer.
10. A computer program product, comprising: a. a memory element; and b. a computer program stored on said memory medium, said computer program comprising instmctions for representing the logic of a logical circuit to be designed as points and vectors in a vector space and for using the points and vectors in a vector space to simplify the logic of the logical circuit to a simpler, form and for designing the logical circuit using the simpler form.
1 1. A computer program product, comprising: a. a memory element; and b. a computer program stored on said memory medium, said computer program comprising instmctions for representing the logic of a logical circuit to be manufactured as points and vectors in a vector space, and for using the points and vectors in a vector space to simplify the logic of the logical circuit to a simpler form, and for using the simpler form to implement the logical circuit in hardware.
12. A computer program product, comprising: a. a memory element; and b. a computer program stored on said memory medium, said computer program comprising instmctions for representing the logic of a logical circuit as points and vectors in a vector space, and for modifying the representation in a vector space using at least one process mle of a set of process mles to simplify the logic.
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Publication number Priority date Publication date Assignee Title
EP2672215B1 (en) 2012-06-08 2014-09-24 Alfa Laval Corporate AB Plate heat exchanger
CN103034758B (en) * 2012-12-07 2015-03-11 南通大学 Logic optimizing and parallel processing method of integrated circuit
CN111857822B (en) * 2016-08-05 2024-04-05 中科寒武纪科技股份有限公司 Operation device and operation method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5640328A (en) * 1994-04-25 1997-06-17 Lam; Jimmy Kwok-Ching Method for electric leaf cell circuit placement and timing determination
US5649165A (en) * 1995-01-31 1997-07-15 Fujitsu Limited Topology-based computer-aided design system for digital circuits and method thereof
US5920484A (en) * 1996-12-02 1999-07-06 Motorola Inc. Method for generating a reduced order model of an electronic circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5640328A (en) * 1994-04-25 1997-06-17 Lam; Jimmy Kwok-Ching Method for electric leaf cell circuit placement and timing determination
US5649165A (en) * 1995-01-31 1997-07-15 Fujitsu Limited Topology-based computer-aided design system for digital circuits and method thereof
US5920484A (en) * 1996-12-02 1999-07-06 Motorola Inc. Method for generating a reduced order model of an electronic circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NGUYEN T.V. ET AL.: "Multipoint Pade Approximation Using a Rational Block Lanczos Algorithm", 1997 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN, 1997, DIGEST OF TECHNICAL PAPERS, 9 November 1997 (1997-11-09), pages 72 - 74, XP002926264 *

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