WO2001016744A1

WO2001016744A1 - Watchdog system that toggles power inputs

Info

Publication number: WO2001016744A1
Application number: PCT/US2000/023248
Authority: WO
Inventors: Karl E. Moerder
Original assignee: Tachyon, Inc.
Priority date: 1999-08-27
Filing date: 2000-08-24
Publication date: 2001-03-08
Also published as: AU6933800A

Abstract

A system for resetting a computer by toggling the power supply on and off is described. The system includes a Peripheral Component Interconnect (PCI) card having a microprocessor and memory that detects computer malfunctions. The PCI card includes a connection to a standby power source and a power supply on/off switch. When a computer malfunction is detected, the system turns off the power to the computer, but remains under power itself from the standby power source. After waiting several seconds, the system turns on the computer power.

Description

WATCHDOG SYSTEM THAT TOGGLES POWER INPUTS

Background of the Invention Field of the Invention

This invention relates to methods and systems for cycling power to a computer system in response to a malfunction. More specifically, embodiments of this invention relate to a watchdog system that controls the power input into a computer system. Description of the Related Art

One of the most vexing problems with computer systems relates to their tendency to freeze or "lock up" during program execution. When this occurs, the user is forced to perform a "reboot" of the locked up computer system. Rebooting a computer normally involves some user input, either by pressing a button or striking a predetermined set of keys on a keyboard. However, requiring user input is disadvantageous because a frozen computer system will remain in that state until reset by a user. For this reason, automated mechanisms have been developed for detecting a malfunctioning computer and thereafter sending a reset command to the computer's main microprocessor.

One such system is described in U.S. Patent No. 5,563,799 to Brehmer. In the Brehmer system, a watchdog circuit is employed to monitor the main microprocessor and detect the presence of a malfunction condition. One type of malfunction is when the main microprocessor is no longer transmitting data. If such a malfunction condition exists, the Brehmer circuit asserts a signal to the RESET input on the microprocessor in an attempt to eliminate the malfunction condition.

Similar systems which detect a microprocessor malfunction and thereafter assert a reset signal to the main microprocessor are described in U.S. Patent No. 5,704,038 to Mueller and U.S. Patent No. 4,696,002 to Schleupen. Similar to the Brehmer system, the Mueller and Schleupen systems include a circuit for providing a reset signal to the main microprocessor of the computer system.

Unfortunately, each of the aforementioned systems suffer from a limitation in the type of malfunction they can address. For example, in some circumstances simply asserting a signal to the RESET pin of the microprocessor does not clear the malfunction within the computer system. If such a circumstance arose, the computer system would remain frozen until a user manually reset the system.

Summary of the Invention

One embodiment is a system for resetting a computer. The system includes: first instructions that detect a signal to determine when the computer has malfunctioned; second instructions, responsive to the first instructions, for sending a signal that disconnects the power inputs to the computer when the computer has malfunctioned, wherein the second instructions are provided with power when the power inputs of the computer are disconnected; and third instructions that send a signal which reconnects the power inputs to the computer.

Another embodiment is a communication system for transmitting data from a remote unit to a hub station.

The communication system in this embodiment includes: first instructions stored in the remote unit that detect a signal to determine when the remote unit has malfunctioned; second instructions stored in the remote unit, responsive to the first instructions, for sending a signal that disconnects the power inputs to the remote unit when the remote unit has malfunctioned, wherein the second instructions are provided with power when the power inputs of the remote unit are disconnected; and third instructions that send a signal which reconnects the power inputs to the remote unit.

Yet another embodiment is a method of curing a malfunction within a computer system, that provides: detecting that a malfunction condition has occurred in the computer system; transmitting a first signal to the power supply of the computer system, wherein the first signal turns off the power supply; and transmitting a second signal to the power supply of the computer system, wherein the second signal turns on the power supply.

Brief Description of the Drawings Figure 1 is a block diagram of one embodiment of a system for accessing the Internet through a wireless satellite connection.

Figure 2 is a block diagram of one embodiment of a remote unit within the wireless Internet system of Figure 1.

Figure 3 is a flow diagram of a process for detecting a remote unit malfunction and rebooting the system. Figure 4 is a flow diagram of an alternative embodiment of a process for detecting a remote unit malfunction and rebooting the system.

Detailed Description A. Definitions

1. Instructions

Instructions refer to computer implemented steps for processing information in the system. Instructions can be implemented in software, firmware or hardware and include any type of programmed step undertaken by modules of the communication system.

2. LAN

One example of the Local Area Network may be a corporate computing network, including access to the Internet, to which computers and computing devices comprising the communication system are connected In one embodiment, the LAN conforms to the Transmission Control Protocol/Internet Protocol (TCP/IP) industry standard. In alternative embodiments, the LAN may conform to other network standards, including, but not limited to, the International Standards Organization's Open Systems Interconnection, IBM's SNA, Novell's Netware, and Banyan VINES.

3. Microprocessor The microprocessor may be any conventional general purpose single- or multi chip microprocessor such as a

Pentium" processor, a Pentium* Pro processor, a 8051 processor, a MIPS* processor, a Power PC* processor, or an ALPHA* processor In addition, the microprocessor may be any conventional special purpose microprocessor such as a digital signal processor or a graphics processor. The microprocessor typically has conventional address lines, conventional data lines, and one or more conventional control lines. 4. Modules

The communication system is comprised of various modules as discussed in detail below. As can be appreciated by one of ordinary skill in the art, each of the modules comprise various sub-routines, procedures, definitional statements, and macros. Each of the modules are typically separately compiled and linked into a single executable program. Therefore, the following description of each of the modules is used for convenience to describe the functionality of the communication system. Thus, the processes that are undergone by each of the modules may be arbitrarily redistributed to one of the other modules, combined together in a single module, or made available in, for example, a shareable dynamic link library.

5. Networks

The communication system may include any type of electronically connected group of computers including, for instance, the following networks: Internet, Intranet, Local Area Networks (LAN) or Wide Area Networks (WAN). In addition, the connectivity to the network may be, for example, remote modem, Ethernet (IEEE 802.3), Token Ring (IEEE 802.5), Fiber Distributed Datalink Interface (FDDI) or Asynchronous Transfer Mode (ATM). Note that computing devices may be desktop, server, portable, hand-held, set-top, or any other desired type of configuration. As used herein, an Internet includes network variations such as public internet, a private internet, a secure internet, a private network, a public network, a value-added network, an intranet, and the like.

6. Operating Systems

The communication system may be used in connection with various operating systems such as: UNIX, Disk Operating System (DOS), OS/2, Windows 3.X, Windows 95, Windows 98, and Windows NT.

7. Programming Languages The communication system may comprise software that is written in any programming language such as C,

C + +, BASIC, Pascal, Java, and FORTRAN and run under the well-known operating system. C, C + +, BASIC, Pascal, Java, and FORTRAN are industry standard programming languages for which many commercial compilers can be used to create executable code.

8. Transmission Control Protocol Transmission Control Protocol (TCP) is a transport layer protocol used to provide a reliable, connection- oriented, transport layer link among computer systems. The network layer provides services to the transport layer. Using a two-way handshaking scheme, TCP provides the mechanism for establishing, maintaining, and terminating logical connections among computer systems. TCP transport layer uses IP as its network layer protocol. Additionally, TCP provides protocol ports to distinguish multiple programs executing on a single device by including the destination and source port number with each message. TCP performs functions such as transmission of byte streams, data flow definitions, data acknowledgments, lost or corrupt data re-transmissions, and multiplexing multiple connections through a single network connection. Finally, TCP is responsible for encapsulating information into a datagram structure. B. System Figure 1 is a block diagram illustrating an exemplifying system in which the invention may be embodied. The system in Figure 1 provides high-speed, reliable Internet communication service over a satellite link. In particular, in Figure 1, content servers 100 are coupled to the Internet 102 which is in turn coupled to a hub station 104 such that the hub station 104 can request and receive digital data from the content servers 100. The hub station 104 also communicates via satellite 106 with a plurality of remote units 108A - 108N. For example, the hub station 104 transmits signals over a forward uplink 110 to the satellite 106. The satellite 106 receives the signals from the forward uplink 110 and re-transmits them on a forward downlink 112. Together, the forward uplink 110 and the forward downlink 112 are referred to as the forward link. The remote units 108A - 108N monitor one or more channels which comprise the forward link in order to receive remote-unit-specific and broadcast messages from the hub station 104.

In a similar manner, the remote units 108A - 108N transmit signals over a reverse uplink 114 to the satellite 106. The satellite 106 receives the signals from the reverse uplink 1 14 and re-transmits them on a reverse downlink 116. Together, the reverse uplink 114 and the reverse downlink 116 are referred to as the reverse link. The hub station 104 monitors one or more reverse link transmission channels which comprise the reverse link in order to extract messages from the remote units 108A - 108N.

In one embodiment of the exemplifying system, each remote unit 108A -108N is coupled to a plurality of system users. For example, in Figure 1, the remote unit 108A is shown as coupled to a local area network 116 which in turn is coupled to a group of user terminals 118A - 118N. The user terminals 118A - 118N may be one of many types of local area network nodes such as a personal or network computer, a printer, digital meter reading equipment or the like. When a message is received over the forward link intended for one of the user terminals 118A - 118N, the remote unit 108A forwards it to the appropriate user terminal 118 over the local area network 116. Likewise, the user terminals 118A - 118N can transmit messages to the remote unit 108A over the local area network 116.

In one embodiment of the exemplifying system, the remote units 108A - 108N provide Internet service to a plurality of users. For example, assume that the user terminal 118A is a personal computer which executes browser software in order to access the World Wide Web. When the browser receives a request for a web page or embedded object from the user, the user terminal 118A creates a request message according to well-known techniques. The user terminal 118A forwards the request message over the local area network 116 to the remote unit 108A, also using well-known techniques. Based upon the request message, the remote unit 108A creates and transmits a wireless link request over a channel within the reverse uplink 114 and the reverse downlink 116. The hub station 104 receives the wireless link request over the reverse link. Based upon the wireless link request, the hub station 104 passes a request message to the appropriate content server 100 over the Internet 102. In response, the content server 100 forwards the requested page or object to the hub station 104 over the

Internet 102. The hub station 104 receives the requested page or object and creates a wireless link response. The hub station transmits the wireless link response over a channel within the forward uplink 110 and forward downlink 112. The remote unit 108A receives the wireless link response and forwards a corresponding response message to the user terminal 1 18A over the local area network 116 In this way, a bi directional link between the user terminal 118A and the content servers 100 is established

Embodiments of the invention relate to systems and methods for cycling power to a computer system or other electronic device by automatically turning off and on the main power to the system. In one embodiment, the computer system is a remote unit or hub station within a satellite based Internet communication system Preferably, the automated power cycling system is linked to a "watchdog" microprocessor which continually analyzes data traffic in the system for a malfunction condition, and thereafter activates the reboot process if a malfunction occurs.

Referring to Figure 2, the remote unit 108A is shown It should be realized that while the remote unit 108A is preferably based on a conventional Intel processor based computer system, any other type of computer system that has similar functions are within the scope of the invention Accordingly, the remote unit 108A preferably includes a main processor 200 that can be, for example, an Intel Pentium III microprocessor.

Communicating with the main processor 200 is a watchdog system 210. Software driven signals from the main processor 200 are detected and analyzed by the watchdog system 210 In addition, the watchdog system 210 includes a memory 220 for storing instructions and data relating to the watchdog system 210 The memory 220 is preferably a nonvolatile type memory, such as a Flash memory, EPROM, EEPROM or other well known nonvolatile memory.

Preferably the watchdog system 210 is implemented as a peripheral component interconnect (PCI) peripheral device within the computer system As is known, the PCI interface allows peripheral devices to be connected to the microprocessor of a conventional personal computer. In addition, the watchdog system 210 includes a processor 224 that runs instructions for determining whether the main processor has malfunctioned, and then cycling the power to the remote unit 108A if the main processor is in a malfunction state Preferably, the watchdog microprocessor 224 is an Atmel AT90S4433 processor which includes its own Flash ROM and RAM

The watchdog system 210 is powered by a power supply 230 that provides power to the remote unit 108A and the watchdog system 210. The power supply 230 is preferably a conventional personal computer power supply that includes a power_on signal 232 and standby five volt (5v) power signal 234 As shown, the power_oπ signal 232 and standby power signal 234 are adapted to connect directly to the watchdog system 210. The power_on signal 232 is used to toggle the power supply on and off The standby power signal 234 is used to provide backup power to the watchdog system 210 so that it will keep operating when the power supply 230 is in the off position The watchdog system 210 is linked to an interface circuit 238 which supports communication to the system's PCI bus and to an l²C bus 237 As is known in the art, an l²C bus is a bi directional two wire bus for serially transferring data between, for example, integrated circuits. As will be discussed below in more detail, the watchdog system 210 can monitor signals from the l²C bus 237 or, in an alternate embodiment, the main processor 200, or other system component, to determine if the system is malfunctioning The interface 238 is linked to a communication system 240 through the l²C bus 237 and a faster data bus 241. While the l²C bus 237 is useful for some data and signal transmissions, its two wire implementation can be too slow for large data transmissions Thus, the data bus 241 provides fast transmission of data between the communication system 240 and the main processor 200. As can be realized upon reference to Figure 1, the communication system 240 transmits data across the satellite based Internet system. Thus, the external communication system includes a link to a satellite transmitter/receiver for sending and receiving data packets between the remote unit 108A and hub station 104.

Referring to Figure 3, a process 300 of rebooting the remote unit 108A in response to a malfunction is illustrated The process 300 begins at a start state 302 and then moves to a state 306 wherein a signal is sent by the watchdog system to the power_on line of the power supply to turn off the power to the system By asserting the power_on signal to a HIGH state, the power supply will stop sending a voltage to the DC outputs coming from the power supply, with the exception of the standby power output, which continues to receive a 5v power signal. The watchdog system maintains power during the time that system power is turned off through its connection to the standby power signal from the power supply. The process 300 waits a predetermined time, for example five seconds, and then moves to a state 312 wherein the watchdog system 210 sends a signal to the power_on line of the power supply to turn power back on to the system. This is preferably performed by holding the power_on signal to a LOW state. When the power supply detects that the power_on signal has been pulled low, the power supply switches back on and begins to power up the remote unit 108A. Of course, other circuits and systems for changing the system from a power-off state to a power_on state are contemplated.

Once power has been restored to the system, the process 300 moves to a decision state 316 wherein a determination is made whether or not there is any initial activity on the l²C bus 237. Initial activity on the l²C bus indicates that the remote unit has fully booted and is operational. If there is no activity indicated, the process 300 continues looping until the remote unit has completed its initialization process. Once a determination is made that there is initial activity on the l²C bus, the process 300 moves to a state 318 wherein a timeout control is reset. The process 300 then moves to a decision state 320 wherein a determination is made whether there is any activity on the l²C bus.

As discussed above, the l²C bus is linked to the main processor and the communication system. Thus, under normal circumstances, there is always activity on the l²C bus. However, if there is no activity on the l²C bus for a certain period of time after the system has been initialized, the process 300 indicates that a malfunction has occurred. If a determination is made that there is activity on the l²C bus, the process 300 loops back to state 318 and resets the timeout control However, if a determination is made that there is no activity on the l²C bus, the process 300 moves to a state 324 wherein the timeout counter within the system is updated to indicate that one time period has passed without a signal from the l²C bus. After the timeout counter has been updated, the process 300 moves to a decision state 330 to determine if enough time has passed without a signal from the l²C bus to indicate a timeout condition. If there has not been enough time passing to indicate a timeout, the process 300 returns to decision state 320 to determine if any activity has occurred on the l²C bus. However, if enough time has passed to indicate a timeout such that the system has likely malfunctioned, the process 300 returns to state 306 and turns off the power to the system.

Referring to Figure 4, another embodiment of a process 400 of rebooting the remote unit 108A in response to a malfunction is illustrated. This process 400 is similar to the process 300, except that the watchdog system in the process 400 detects active signals generated by instructions to the main processor. This contrasts with the process 300 wherein the watchdog system is more passive, and detects activity on the l C bus. The process 400 begins at a start state 402 and then moves to a state 404 wherein a signal is sent by the watchdog system to the power_on line of the power supply to turn off the power to the system. By asserting the power _on signal to a HIGH state, the power supply will stop sending a voltage to the DC outputs coming from the power supply, with the exception of the standby power output, which continues to receive a 5v power signal. The watchdog system maintains power during the time that system power is turned off through its connection to the standby power signal from the power supply.

The process 400 waits a predetermined time, for example five seconds, and then moves to a state 410 wherein the watchdog system 210 sends a signal to the power_on line of the power supply to turn power back on to the system. This is preferably performed by holding the power_on signal to a LOW state. When the power supply detects that the power_on signal has been pulled low, the power supply switches back on and begins to power up the remote unit 108A. Of course, other circuits and systems for changing the system from a power-off state to a power_on state are contemplated.

Once power has been restored to the system, the process 400 moves to a state 414 wherein a set of watchdog instructions are run to initialize the watchdog system. The instructions include commands for sending data or messages from the main microprocessor to the watchdog system. It should be realized that in this context the data or message being sent by the microprocessor can be implemented in software commands or hardware circuits. The process 400 then moves to a state 418 wherein the instructions begin to transmit signals from the main microprocessor to the watchdog system.

The process 400 then moves to a decision state 420 wherein a determination is made whether or not the initial signals generated by the microprocessor are received by the watchdog system. If there is initial activity received by the watchdog system, then the process 400 moves to a state 426 wherein a timeout controller is reset. Now that the system has been initialized, the process 400 moves to a decision state 428 wherein a determination is made whether there are ongoing messages being received by the watchdog system. It should be realized that if the system has malfunctioned, it is unlikely that the main microprocessor will have been able to send any ongoing messages to the watchdog system. If a determination is made that messages have been received the process 400 loops back to state 426 and resets the timeout control. However, if a determination is made that no messages from the microprocessor have been received, the process 400 moves to a state 430 wherein the timeout counter within the system is updated to indicate that one time period has passed without a message. After the timeout counter has been updated, the process 400 moves to a decision state 432 to determine if enough time has passed without a message from the main microprocessor to indicate a timeout condition. If there has not been enough time passing to indicate a timeout, the process 400 returns to decision state 428 to determine if any messages from the main microprocessor were received by the watchdog system. However, if enough time has passed to indicate a timeout such that the system has likely malfunctioned, the process 400 returns to state 404 and turns off the power to the system. C. Other Embodiments

In one embodiment, the watchdog system includes an on-board non-volatile memory connected to the microprocessor. The non-volatile memory stores program instructions and data that is used to control the remote unit while it is resetting. For example, variables relating to the watchdog system calibration and pre-ship test data can be stored and retrieved from the non-volatile memory. In addition, the installation date and serial number of the watchdog system can be stored for later retrieval.

Claims

WHAT IS CLAIMED IS:

1. A system for resetting a computer, comprising: first instructions that detect a signal to determine when the computer has malfunctioned; second instructions, responsive to the first instructions, for sending a signal that disconnects the power inputs to the computer when the computer has malfunctioned, wherein the second instructions are provided with power when the power inputs to the computer are disconnected; and third instructions that send a signal which reconnects the power inputs to the computer.

2. The system of Claim 1, wherein the first instructions are stored in a memory on a peripheral component interconnect (PCI) board.

3. The system of Claim 2, wherein the PCI board comprises a microprocessor.

4. The system of Claim 1 , wherein the second instructions are provided with power from a standby power signal from a power supply attached to the computer.

5. The system of Claim 1, wherein the second instructions send a signal to a power_on input on a power supply attached to the computer.

6. The system of Claim 1, wherein the third instructions send a signal to a power_on input on a power supply attached to the computer.

7. The system of Claim 1, wherein the signal is generated on an l²C bus.

8. A communication system for transmitting data from a remote unit to a hub station, comprising: first instructions stored in the remote unit that detect a signal to determine when the remote unit has malfunctioned; second instructions stored in the remote unit, responsive to the first instructions, for sending a signal that disconnects the power inputs to the remote unit when the remote unit has malfunctioned, wherein the second instructions are provided with power when the power inputs of the remote unit are disconnected; and third instructions that send a signal which reconnects the power inputs to the remote unit.

9. The communication system of Claim 8, wherein the remote unit is a personal computer system.

10. The communication system of Claim 8, wherein the first instructions comprise instructions that detect a message being sent from a microprocessor in the remote unit.

11. The communication system of Claim 8, wherein the communication system is a satellite based system from transmitting data to the Internet.

12. The system of Claim 8, wherein the second instructions are provided with power from a standby power signal from a power supply attached to the computer.

13. The system of Claim 8, wherein the second instructions send a signal to a power_on input on a power supply attached to the computer.

14. A method of curing a malfunction within a computer system, comprising: detecting that a malfunction condition has occurred in the computer system; transmitting a first signal to the power supply of the computer system, wherein the first signal turns off the power supply; and transmitting a second signal to the power supply of the computer system, wherein the second signal turns on the power supply.

15. The method of Claim 14, wherein the detecting comprises detecting signals on an l²C bus.

16. The method of Claim 14, wherein the detecting comprises detecting signals being sent from a microprocessor in the computer system.

17. The method of Claim 14, wherein the transmitting a first signal comprises asserting a HIGH signal to a Power_on signal of the power supply.

18. The method of Claim 14, wherein the transmitting a second signal comprises asserting a LOW signal to a Power_on signal of the power supply.