WO2001022659A3 - Method and apparatus for distributed synchronization signal - Google Patents

Method and apparatus for distributed synchronization signal Download PDF

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Publication number
WO2001022659A3
WO2001022659A3 PCT/US2000/026336 US0026336W WO0122659A3 WO 2001022659 A3 WO2001022659 A3 WO 2001022659A3 US 0026336 W US0026336 W US 0026336W WO 0122659 A3 WO0122659 A3 WO 0122659A3
Authority
WO
WIPO (PCT)
Prior art keywords
synchronization signal
conductor
bus
sample rate
signal
Prior art date
Application number
PCT/US2000/026336
Other languages
French (fr)
Other versions
WO2001022659A2 (en
Inventor
Donald W Moses
Robert W Moses
Original Assignee
Digital Harmony Technologies I
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Harmony Technologies I filed Critical Digital Harmony Technologies I
Priority to JP2001525899A priority Critical patent/JP2003524947A/en
Priority to AU76142/00A priority patent/AU7614200A/en
Publication of WO2001022659A2 publication Critical patent/WO2001022659A2/en
Publication of WO2001022659A3 publication Critical patent/WO2001022659A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40071—Packet processing; Packet format
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0652—Synchronisation among time division multiple access [TDMA] nodes, e.g. time triggered protocol [TTP]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40117—Interconnection of audio or video/imaging devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/436—Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home
    • H04N21/4363—Adapting the video or multiplex stream to a specific local network, e.g. a IEEE 1394 or Bluetooth® network
    • H04N21/43632—Adapting the video or multiplex stream to a specific local network, e.g. a IEEE 1394 or Bluetooth® network involving a wired protocol, e.g. IEEE 1394

Abstract

A method and apparatus is described for distributing a synchronization signal for deriving sample rate clocks in data transmitted between nodes in a system such as an IEEE 1394 bus-interconnected system. The synchronization signal is coupled onto a conductor of the IEEE 1394 bus by a clock master node, and received by all other nodes. The synchronization signal is coupled to the conductor in the bus without interfering with the signal, such as a power or data signal, carried by that conductor. Each node may derive its sample rate clocks using conventional time stamp means, or optionally referencing its sample rate clocks to the synchronization signal for higher performance. The format of the synchronization signal may be virtually any type of standard or non-standard work clock or longitudinal time code.
PCT/US2000/026336 1999-09-23 2000-09-25 Method and apparatus for distributed synchronization signal WO2001022659A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2001525899A JP2003524947A (en) 1999-09-23 2000-09-25 Method and apparatus for distributed synchronization signals
AU76142/00A AU7614200A (en) 1999-09-23 2000-09-25 Method and apparatus for distributed synchronization signal

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15573299P 1999-09-23 1999-09-23
US60/155,732 1999-09-23

Publications (2)

Publication Number Publication Date
WO2001022659A2 WO2001022659A2 (en) 2001-03-29
WO2001022659A3 true WO2001022659A3 (en) 2001-12-13

Family

ID=22556581

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/026336 WO2001022659A2 (en) 1999-09-23 2000-09-25 Method and apparatus for distributed synchronization signal

Country Status (3)

Country Link
JP (1) JP2003524947A (en)
AU (1) AU7614200A (en)
WO (1) WO2001022659A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3698074B2 (en) * 2001-06-15 2005-09-21 日本電気株式会社 Network synchronization method, LSI, bus bridge, network device, and program
KR20070001120A (en) * 2004-02-05 2007-01-03 코닌클리케 필립스 일렉트로닉스 엔.브이. Method and apparatus for synchronization over 802.3af

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0051332A1 (en) * 1980-10-31 1982-05-12 Koninklijke Philips Electronics N.V. Two-wire bus-system comprising a clock wire and a data wire for interconnecting a number of stations
US5819051A (en) * 1995-12-29 1998-10-06 Compaq Computer Corporation Low speed serial bus protocol and circuitry
WO1999035587A1 (en) * 1997-12-30 1999-07-15 Koninklijke Philips Electronics N.V. Method and apparatus for distributing a cycle clock to a plurality of bus nodes in a bus bridge

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0051332A1 (en) * 1980-10-31 1982-05-12 Koninklijke Philips Electronics N.V. Two-wire bus-system comprising a clock wire and a data wire for interconnecting a number of stations
US5819051A (en) * 1995-12-29 1998-10-06 Compaq Computer Corporation Low speed serial bus protocol and circuitry
WO1999035587A1 (en) * 1997-12-30 1999-07-15 Koninklijke Philips Electronics N.V. Method and apparatus for distributing a cycle clock to a plurality of bus nodes in a bus bridge

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
"TRANSMISSION OF AN MPEG ENCODED INFORMATION SIGNAL USING TIME STAMPS", July 1995, RESEARCH DISCLOSURE,KENNETH MASON PUBLICATIONS, HAMPSHIRE,GB, NR. 375, PAGE(S) 508, ISSN: 0374-4353, XP000524830 *
BLOKS R H J: "The IEEE-1394 high speed serial bus", 1996, PHILIPS JOURNAL OF RESEARCH,ELSEVIER, AMSTERDAM,NL, VOL. 50, NR. 1, PAGE(S) 209-216, ISSN: 0165-5817, XP004008212 *

Also Published As

Publication number Publication date
JP2003524947A (en) 2003-08-19
AU7614200A (en) 2001-04-24
WO2001022659A2 (en) 2001-03-29

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