WO2001043278A1

WO2001043278A1 - Low distortion transimpedance amplifier using distortion cancellation technique

Info

Publication number: WO2001043278A1
Application number: PCT/US2000/033016
Authority: WO
Inventors: Shutong Zhou; Richard A. Meier
Original assignee: General Instrument Corporation
Priority date: 1999-12-10
Filing date: 2000-12-06
Publication date: 2001-06-14
Also published as: AU1816801A; TW472441B

Abstract

The invention provides a transimpedance amplifier and method which reduce second order distortions generated within the amplifier at a range of input optical power levels. The amplifier has an optical to electrical transducer, an input stage amplifier, voltage amplifier and an emitter follower. The emitter follower also generates a distortion cancellation signal which is controlled to cancel second order distortions generated by the input stage amplifier.

Description

LOW DISTORTION TRANSIMPEDANCE AMPLIFIER USING DISTORTION CANCELLATION TECHNIQUE

BACKGROUND OF THE INVENTION

This invention is related to optical receivers and more particularly to a front

end amplifier for use in such receivers.

Optical receivers are typically utilized in communication systems for receiving

optical signals and transforming them into electrical signals. The electrical signals

are processed to achieve a desired electrical signal output level for further

transmission within the communication system. An example of such a

communication system is a CATV network.

A CATV network typically consists of a downstream path extending from a

service provider location known as a head end to various nodes through taps down

to settop terminals located at subscriber locations. The upstream path typically

extends from the settop terminals back to the head end. These communication

systems can be designed to be partially optical and partially electrical. For example,

communications between the head end and the nodes in both the upstream and

downstream directions can be accomplished utilizing optical signals while

communications in both directions between the nodes and settop boxes can be

electrical. Such a system requires optical receivers to be located at both the nodes

and headends.

Optical receivers are necessary at each node for receiving optical signals in

the downstream path and transmitting electrical signals to the settop terminals.

Likewise, optical receivers are necessary at the head end to receive optical communications

from the nodes traveling along the upstream path.

Since CATV systems are becoming increasingly bidirectional, bandwidth

requirements along the upstream path are also increasing. The increased bandwidth

requirements are attributable to the need for upstream communications associated

with Internet access, fax capabilities, pay per view and other upstream information

transfer.

Transimpedance amplifiers have been widely used in optical digital receivers.

The advantages of using transimpedance amplifiers are their simplicity and low

Equivalent Input Noise Current (EINC) when the feedback resistance is large.

However, the large second order distortion produced by the transimpedance design

prevents it from being used in analog applications.

Matsuoka et al. showed in Electronics Letters Volume 18, No. 9 of April 29,

1982 that, using a GaAs MESFET with a silicon PIN photo diode in a

transimpedance amplifier, the second order distortions can be much lower than the

distortions created by transimpedance amplifiers using bipolar transistors. The

results presented were limited to low optical input powers (about 30 micro watts).

In applications where the maximum optical power approaches 1 mW, a new method

which produces low second order distortions is needed. SUMMARY

The invention addresses the above mentioned problem by providing a method

and circuit for reducing second order distortion levels in a transimpedance amplifier.

A transimpedance amplifier is provided having a first input stage, a voltage amplifier

stage and an emitter follower stage. Distortion cancellation is accomplished by

determining the distortion generated by the first input stage and by controlling the

output impedance and bias current of the emitter follower stage. The second order

distortion generated by the emitter follower stage can be made equal to the

distortions produced by the first stage but with a 180° phase shift. Thus all the

second order distortions can be canceled. The advantages of transimpedance

amplifiers in simplicity and low EINC are still preserved.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will now be described by way of example with reference to the

accompanying figures of which:

Figure 1 is a block diagram of the transimpedance amplifier according to the

present invention.

Figure 2 is an exemplary schematic of an implementation of the block

diagram of Figure 1.

Figure 3 shows waveforms (including second order distortion waveforms)

at each stage of the circuit of Figure 2. Figure 4 shows a graph of negative bias voltage vs. second order distortion

performance in dBc with optical input power of 1 mW.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

The invention will first be described generally with reference to Figure 1.

The transimpedance amplifier 10 consists of four major components. First, an

optical input 15 is received into an optical to electrical transducer 20. The output of

the optical to electrical transducer 20 is a low voltage signal supplied into the input

stage 30 which serves to convert this low voltage signal to a current signal. The

voltage amplifier stage 40 receives the current signal, amplifies it, and feeds it into

an emitter follower stage 50. By design, the emitter follower stage 50 also creates

second order distortion products which are 180° out of phase with second order

distortion products created by the input stage 30. A feedback 60 flows from the

emitter follower stage 50 back to the input stage 30. The output signal 70 therefore

has reduced distortion levels because of the canceling effect of a controlled second

order distortion produced by the emitter follower stage 50.

An exemplary circuit 10 for achieving the invention of Figure 1 is shown in

Figure 2. This circuit 10 will now be described in greater detail. Exemplary

components and values are shown in Table 1. It should be understood by those

reasonably skilled in the art, however, that these components can be substituted and

the values may be modified to remain in conformance with the invention. An optical signal 15 is supplied to photo diode PD. The photo diode PD is negative biased and

supplies an electrical signal to the input stage 30.

TABLE 1

PD Epitax EPM 650 R13 2K (1%)

Qi ATF10236 by HP R14 12K

Q2 BFT 92 or BFT 92w by Philips R15 12K

Q3 AT 41511 by HP R16 22

Rl 120 R17 12K

R2 22 Cl .luF

R3 2.4K C2 .luF

R4 IK C3 .luF

RS 22 C4 Λ F

R6 39 C5 ΛuF

R7 1.8K C6 ΛuF

R8 22 C7 6pF

R9 820 C8 ΛuF

RIO 750 C9 Λ F

Rll 68 CIO 18PF

R12 3.9K Cll ΛuF

The input stage 30 consists of transistor Q_l3 resistors R,, R₂ and R₆ and

capacitors C₂ and C₄. The transistor Q, is preferably a GaAs MESFET. It should

be understood however that other active components exhibiting similar electrical

properties could be substituted. The gate of the transistor Q, is connected to the

photo diode PD. The drain of the transistor Q, is connected to the parallel

combination of resistor R₂ and capacitor C₂ while the source is connected to the

parallel combination of capacitor C₄ and resistor R₆.

The voltage amplifier stage 40 consists of transistor Q₂, and resistors R_s, R₇

and capacitor C₁₀. The transistor Q₂ is preferably a P-N-P BJT. It should be

understood, however, that other active components exhibiting similar electrical

properties could be substituted. The output of the transistor Qj goes to the emitter of the transistor Q₂ through resistor Rg and capacitor Cι₀. The base of transistor Q₂

is connected to a voltage source 35 through resistors R₃, R₄, R₁₆ and capacitor C₃.

Resistors R₂, Rg, R₁₆ and R₈ are small value resistors used to prevent unwanted high

frequency oscillations.

The emitter follower stage 50 consists of transistor Q₃, resistors R₈, R₉, R_n

and capacitor C₈. The transistor Q₃ is a N-P-N BJT. The collector of the transistor

Q₂ is connected to the base of the transistor Q₃ through resistor R₈. The collector of

the transistor Q₃ is connected to the voltage source 35. The emitter supplies a signal

to both the output 70 and the feedback loop 60. The feedback loop 60 consists of

parallel capacitor C₇ and resistor Rι₀ combination connected in series with resistor

R,₂. Resistor R₁₂ is connected to the gate of the transistor Q_j. Resistor R₇ is

connected between the collector of the transistor Q₂ and a negative bias voltage

source 52. Resistor R_<, is connected between emitter of Q₃ and the negative bias

voltage source 52. The signal S₃ from the emitter of transistor Q₃ passes through

capacitor C₈ and resistor R_n to output 70. An optional optical power monitor may

be located at either resistor R₁₃ or R_π.

Referring now to Figures 2 and 3, in operation, the photodiode PD supplies

an electrical signal S₀ corresponding to the optical input 15 to the transistor Q, gate.

This signal S₀ is usually a low voltage broadband radio frequency (RF) signal

containing many channels of data and is shown in Figure 3 as a representative

sinewave. The transistor Q, converts this voltage signal S₀ to a current signal I_j

flowing in the first stage and second input stage. This current signal generates voltage signal S_} at the output stage of transistor Q_v As shown in Figure 3, the

conversion through transistor Qj also introduces second order distortion signal S_ld

causing greater amplification on the negative half cycle Sj. than on the positive half

cycle S₁₊. The current signal Ij is then amplified by the transistor Q₂ in the output

stage of resistor R₇. The output of the transistor Q₂ collector is an amplified signal

S₂.

The signal S₂ is supplied to the transistor Q₃ at its base. The transistor Q₃ also

generates second order distortion products signal S_3d which are inherently 180° out

of phase with distortion products in signal S_2d. The amplitude of the distortion signal

S_3d must be controlled to match the amplitude of distortion signal in S_2d in order to

achieve distortion cancellation. Control of distortion signal S_3d is achieved by first

determining the level of distortion signal S_2d and then adjusting the negative bias

voltage source 52 and resistors R₉ and R_π to achieve a similar level distortion signal

S_3d. Maximum distortion cancellation is achieved when the amplitude of signal S_3d

is closely matched to the amplitude of signal S_2d. The transistor Q₃ also

characteristically amplifies the positive half cycle S₃ ⁺ more than the negative half

cycle S₃ ^" therefore correcting the amplitude variation in the half cycles of the signal

S₂. The resultant output signal S₃ as shown in Figure 3 is amplified, corresponds

with the input signal S₀ and has minimal second order distortion.

Operation of the circuit shown in Figure 2, selection of components, and

distortion cancellation methodology can be further explained mathematically by first estimating the distortion produced in the transistor Q_t and then determining the

distortion of the transistor Q₃. First, to estimate the distortion of transistor Q_λ:

g„X- C ( l- ) (Eq. l)

C is a constant. V_gs is the voltage between gate and source. V_p is the

MESFET transistor Q_j pinch-off voltage. g_m is the transconductance of the

MESFET transistor Q_j.

The output voltage of the emitter follower is basically equal to the output

voltage of the voltage amplifier stage 40. The output voltage of the voltage amplifier

stage 40 is given by:

V₂ = - g_MR,V_m (Eq. 2)

Suppose the DC bias voltage on transistor Q_j gate is V_dc, and the RF signal

is V_ιn.

The output voltage on the transistor Q₂ collector will be:

According to the transimpedance amplifier, if the gain of transistor Q₂ is large

enough, for the input optical power of P_opt,_ca, _power, the output voltage of V₃ will be:

V^ - P_opticalPower R R_n OMI (Eq.4) where R is the optical detector responsivity, OMI is the optical modulation

depth.

The voltage on the output transistor Q₂ will be:

V₂ = - CR₇ 1 - V... (Eq. 5)

Suppose the voltage amplifier stage gain is A,

According to Eq (3), the ratio of output power of the second order distortion

to the fundamental power will be:

A is the amplification of the voltage amplifier stage.

If P_opti_cai _power 1 mW, R is 0.8 ma/niW, OMI is 20%, R,₂ is 5 k ohm. A is 120.

V _p is 1.3V. V_dc is 0.6V. V₃ is approximately 0.8 volts (peak value).

The second order distortion of first stage of GaAs MESFET transistor Q_] will

be -41dB.

This means that the original PIN-GaAs MESFET transimpedance amplifier

will have a large second order distortion for lmW optical input power.

The second order distortion created by GaAs MESFET transistor Q, can be

canceled by the emitter follower stage 50 if the circuitry is designed correctly. The emitter follower second order distortion comes from the internal emitter

resistance which is part of the emitter follower output impedance. This emitter

follower's internal resistance at room temperature can be calculated by:

²⁶ R -*^■ ^intern l resis tance = ^~ IX (Eq *. 7) '

Where I_e is the emitter follower stage emitter current in milliamps. This

emitter current can be an instant current. When the emitter follower has lower output

RF impedance, the I_e swing can be large at large RF output. This I_e current swing

creates a nonlinear resistance in the output circuit, thus creates second order

distortion. Controlling the emitter follower DC part of I_e (by controlling the value

of R₉ or the negative voltage power supply) and the RF output impedance, the output

of the second order distortion level can be easily controlled over a wide range. Thus

by correct design of the transimpedance circuitry, due to the cancellation of these

two distortions, very linear output can be realized.

For the total cancellation of the two-distortion signals S_2d and S_3d, the most

important conditions are that these to distortion signals must have the same

amplitude and be 180° out of phase.

For total cancellation, the same amplitude is guaranteed by the correct design

of the input stage 30 and adjustment of the parameters of the emitter follower stage

50. The correct phase relationship at low frequency is guaranteed by the circuit

topology. The first stage MESFET transistor Qj is a current square device. In the first

stage input, the positive half cycle S,⁺ will get more amplification. At the MESFET

transistor Q_x drain, the negative voltage half cycle gets more amplification. The

emitter follower transistor Q₃ is the other second order distortion generator. At the

output terminal, positive voltage gets more amplification. Because the second stage

is a common base configuration, it has no phase inversion for the input and output.

So the two distortion signals are 180° out of phase at low frequencies.

For higher frequencies, the amplification of the voltage amplifier stage 40

becomes lower. This is because the capacitance in the output shunts the output.

This will create phase shift, thus reducing the cancellation of the second order

distortion. For transimpedance amplifiers, when input optical power is fixed, a

reduction in amplification of transistor Q₂ will cause the input voltage of the input

stage 30 to become larger. Thus the GaAs MESFET transistor Q, will generate more

distortions. Because of this, the output signal will have larger distortion levels at

higher frequencies.

Figure 4 shows the experimental second order distortion data versus negative

power supply voltage measured at optical input power at 1 mW. For the circuit of

Figure 2, the minimum distortion is achieved at a negative bias voltage of -16V.

Utilizing the formulas and analysis those skilled in the art will appreciate that

variations to the circuit of Figure 2 are possible and distortion can be minimized if

the methods presented here are followed.

Claims

CLAIMSWhat is claimed is:

1. A transimpedance amplifier circuit comprising:

a first stage amplifier for transforming a small input voltage into an

output current;

a second stage voltage amplifier for receiving the output current; and,

an emitter follower stage being connected to the second stage and

having a controlled output impedance and bias voltage for cancellation of second

order distortions generated in the first stage.

2. The transimpedance amplifier of claim 1 wherein the first stage

amplifier comprises a MESFET having a source connected to an impedance having

resistive and capacitive components.

3. The transimpedance amplifier of claim 1 wherein the second stage

amplifier comprises a transistor having an emitter connected to the first stage

amplifier and a collector connected to the emitter follower stage.

4. The transimpedance amplifier of claim 3 wherein the emitter follower

stage comprises a transistor having a base connected to the collector of the second

stage transistor, a collector connected to a voltage source and an emitter connected

to an output.

5. A transimpedance amplifier for receiving an optical input and

outputting an electrical signal comprising:

a first stage for transforming an RF signal generated by a transducer

into an output current signal having second order distortion products;

a second stage for amplifying the output signal of the first stage; and,

a third stage for generating distortion products which are 180 ° out of

phase with the second order distortion produced by the first stage.

6. The transimpedance amplifier of claim 5 wherein the first stage

amplifier comprises a MESFET having a source connected to an impedance having

resistive and capacitive components.

7. The transimpedance amplifier of claim 5 wherein the second stage

amplifier comprises a transistor having an emitter connected to the first stage

amplifier and a collector connected to the emitter follower stage.

8. The transimpedance amplifier of claim 7 wherein the third stage

comprises a transistor connected in an emitter follower configuration having a base

connected to the collector of the second stage transistor, a collector connected to a

voltage source and an emitter connected to an output.

9. A method of reducing distortion levels in a transimpedance amplifier

having a first stage, an amplifier stage and an emitter follower stage, a feedback, and

an output, the method comprising the steps of:

Determining the second order distortion generated in the first stage;

and,

Controlling the output impedance and bias voltage of the emitter

follower stage to achieve a controlled emitter follower stage second order distortion

for cancellation of the second order distortion generated in the first stage.