WO2001046874A3 - Correlation of behavioral hdl signals - Google Patents

Correlation of behavioral hdl signals Download PDF

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Publication number
WO2001046874A3
WO2001046874A3 PCT/US2000/034666 US0034666W WO0146874A3 WO 2001046874 A3 WO2001046874 A3 WO 2001046874A3 US 0034666 W US0034666 W US 0034666W WO 0146874 A3 WO0146874 A3 WO 0146874A3
Authority
WO
WIPO (PCT)
Prior art keywords
description
correlation
behavioral
modified
structural
Prior art date
Application number
PCT/US2000/034666
Other languages
French (fr)
Other versions
WO2001046874A2 (en
Inventor
Khalil Shalish
Original Assignee
Speedgate Inc
Khalil Shalish
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Speedgate Inc, Khalil Shalish filed Critical Speedgate Inc
Priority to AU32648/01A priority Critical patent/AU3264801A/en
Publication of WO2001046874A2 publication Critical patent/WO2001046874A2/en
Publication of WO2001046874A3 publication Critical patent/WO2001046874A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design

Abstract

A system and method for providing correlation of HDL signal names in the structural gate level description. In one embodiment, an HDL behavioral description of a circuit is processed by a correlation compiler to identify intermediate signals. The behavioral description is modified to specify that the intermediate signals are primary outputs of the circuit. The modified behavioral description is then processed by a synthesis tool to generate a structural description corresponding to the modified behavioral description. The structural description includes as outputs the identified intermediate signals.
PCT/US2000/034666 1999-12-21 2000-12-20 Correlation of behavioral hdl signals WO2001046874A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU32648/01A AU3264801A (en) 1999-12-21 2000-12-20 Correlation of behavioral hdl signals

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US17141699P 1999-12-21 1999-12-21
US60/171,416 1999-12-21

Publications (2)

Publication Number Publication Date
WO2001046874A2 WO2001046874A2 (en) 2001-06-28
WO2001046874A3 true WO2001046874A3 (en) 2002-06-06

Family

ID=22623650

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/034666 WO2001046874A2 (en) 1999-12-21 2000-12-20 Correlation of behavioral hdl signals

Country Status (3)

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US (2) US6557160B2 (en)
AU (1) AU3264801A (en)
WO (1) WO2001046874A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008511894A (en) * 2004-09-02 2008-04-17 ロジコン デザイン オートメーション エルティーディ． Method and system for designing a structure level description of an electronic circuit
US10078722B2 (en) 2016-06-13 2018-09-18 International Business Machines Corporation Dynamic microprocessor gate design tool for area/timing margin control

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995027948A1 (en) * 1994-04-12 1995-10-19 Synopsys, Inc. Architecture and methods for a hardware description language source level analysis and debugging system

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5146583A (en) * 1987-09-25 1992-09-08 Matsushita Electric Industrial Co., Ltd. Logic design system for creating circuit configuration by generating parse tree from hardware description language and optimizing text level redundancy thereof
US5465216A (en) * 1993-06-02 1995-11-07 Intel Corporation Automatic design verification
US6132109A (en) * 1994-04-12 2000-10-17 Synopsys, Inc. Architecture and methods for a hardware description language source level debugging system
US5537580A (en) * 1994-12-21 1996-07-16 Vlsi Technology, Inc. Integrated circuit fabrication using state machine extraction from behavioral hardware description language
US5841663A (en) * 1995-09-14 1998-11-24 Vlsi Technology, Inc. Apparatus and method for synthesizing integrated circuits using parameterized HDL modules
JPH1054726A (en) * 1996-08-08 1998-02-24 Murata Mfg Co Ltd Vibrating gyroscope and its manufacture
JPH1063707A (en) * 1996-08-15 1998-03-06 Nec Corp Device and method for logic circuit verification
JP2988521B2 (en) * 1997-08-29 1999-12-13 日本電気株式会社 Automatic synthesis of logic circuits
US6145117A (en) * 1998-01-30 2000-11-07 Tera Systems Incorporated Creating optimized physical implementations from high-level descriptions of electronic design using placement based information
US6292931B1 (en) * 1998-02-20 2001-09-18 Lsi Logic Corporation RTL analysis tool
US6223142B1 (en) * 1998-11-09 2001-04-24 International Business Machines Corporation Method and system for incrementally compiling instrumentation into a simulation model
US6292131B1 (en) * 2000-01-26 2001-09-18 Ohmart - Vega, Inc. Apparatus and method for liquid level measurement and content purity measurement in a sounding tube

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995027948A1 (en) * 1994-04-12 1995-10-19 Synopsys, Inc. Architecture and methods for a hardware description language source level analysis and debugging system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NIJHAR T P K ET AL: "HDL-SPECIFIC SOURCE LEVEL BEHAVIOURAL OPTIMISATION", IEE PROCEEDINGS: COMPUTERS AND DIGITAL TECHNIQUES, IEE, GB, vol. 144, no. 2, 1 March 1997 (1997-03-01), pages 138 - 144, XP000723692, ISSN: 1350-2387 *

Also Published As

Publication number Publication date
US7185308B2 (en) 2007-02-27
AU3264801A (en) 2001-07-03
US6557160B2 (en) 2003-04-29
WO2001046874A2 (en) 2001-06-28
US20030154459A1 (en) 2003-08-14
US20010004764A1 (en) 2001-06-21

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