WO2001063755A1

WO2001063755A1 - Differential circuit with reverse isolation

Info

Publication number: WO2001063755A1
Application number: PCT/US2000/004941
Authority: WO
Inventors: Robert E. Stengel; David E. Bockelman
Original assignee: Motorola Inc.
Priority date: 2000-02-25
Filing date: 2000-02-25
Publication date: 2001-08-30
Also published as: AU2000233807A1

Abstract

A differential circuit (200) provides for reverse isolation between input and output ports (202, 204). The differential circuit has amplification circuitry that includes active transistors (221, 222) and reverse isolation circuitry that employ transistors (223, 224) having similar manufacturing and processing characteristics to couple the input and output ports (202, 204).

Claims

DIFFERENTIAL CIRCUIT WITH REVERSE ISOLATIONTechnical FieldThis invention relates in general to differential amplifiers, and more particularly, to reverse isolation in differential amplification circuitry.Background of the Invention Circuit designers are increasingly turning to differential circuitry as a means of enhancing performance in radio circuitry. Differential amplifiers and mixers are an integral part of such circuitry, and are used in such radio applications as direct conversion receivers. For example, a direct conversion receiver may use an amplifier to amplify a received signal prior to signal processing. The amplifier is generally designed to produce a gain in a forward path with little or no reverse leakage. Reverse leakage is an unintended consequence of particular amplifier designs, and can lead to such problems as circuit instability and radio interference.It is desirable to have a differential amplifier in which reverse transmission is substantially reduced in order to improve circuit stability and to reduce the effects of interference in radio applications. Therefore, a differential amplifier with improved reverse isolation is needed.Brief Description of the DrawingsFIG. 1 is a block diagram of a differential amplifier having input and output ports, in accordance with the present invention.FIG. 2 is a schematic diagram of one embodiment of the differential amplifier, in accordance with the present invention.FIG. 3 is a block diagram of a radio communication device, in accordance with the present invention. Detailed Description of the Preferred EmbodimentWhile the specification concludes with claims defining the features of the invention that are regarded as novel, it is believed that the invention will be better understood from a consideration of the following description in conjunction with the drawing figures, in which like reference numerals are carried forward.The present invention provides for improvement in reverse isolation for differential amplifiers, mixers, and similarly situated differential circuits. The inventors have discovered that, in a differential amplifier with amplification circuitry connecting a differential input port to a differential output port, the pure differential- mode reverse transmission from the output port to the input port can be neutralized by canceling the reverse gain through the gain devices with reverse cross-coupling using devices having similar characteristics. In the preferred embodiment, such reverse isolation circuitry includes passive transistors, i.e., transistors that are biased off, which have similar manufacturing and processing characteristics to the active transistors of the amplification circuitry, i.e., transistors used for gain purposes.In developing the concepts behind the present invention, it is instructive to review some theoretical aspects concerning the transfer of signals between the ports of a differential device, and scattering parameters that describe signal transfer among terminals. FIG. 1 illustrates a differential amplifier circuit 100 having an input port 102 comprising two terminals 111, 112, and an output port 104 comprising two terminals 113, 114. For reference purposes, the input port 102 is referred to herein as Port 1, the two terminals 111, 112 as the first and second terminals, the output port 104 as Port 2, and the two terminals 113, 114 as the third and fourth terminals. In an ideal situation, an input signal presented at Port 1 is amplified by the differential amplifier 100 and the resulting amplified signal presented at Port 2. However, a major problem in many prior art amplifier designs is that there is reverse signal leakage through the amplification circuit, such that signals present at Port 2 are transmitted in a reverse manner through the amplifier to Port 1. Such input to output feedback can cause circuit instabilities. An amplifier behaves in a more unilateral fashion when reverse isolation is improved. In a differential amplifier, one is most concerned with the pure differential mode reverse transmission occurring from Port 2 to Port 1. Such reverse transmission is designated herein as Sddi2, meaning the differential signal measured at Port 1 when a differential signal is presented at Port 2. The term Sddi2 can be related to single- ended four port S-parameters as a differential transfer function Sddi2(f) representing differential signal transfer from the output port to the input port over frequency, f, such that:Sddi2( ) = 1/2 (S13(f) - S14(f) - S23(f) + S24(f)), where S13(f) is a scattering parameter representing reverse signal transfer from the third terminal to the first terminal; S14(f) is a scattering parameter representing reverse signal transfer from the fourth terminal to the first terminal; S23(f) is a scattering parameter representing reverse signal transfer from the third terminal to the second terminal; and S24(f) is a scattering parameter representing reverse signal transfer from the fourth terminal to the second terminal.The inventors have determined that Si 3(f) and S2 (f) are dominated by the reverse gain through the active devices of the amplification circuitry, while the terms S1 (f) and S 3(f) represent reverse cross-coupling and are generally very small. According to the invention, the reverse isolation circuitry is constructed to cause the sum of Sι4(f) and S23(f) to be equal to the sum of Sι3(f) and S24(f). In so doing, the differential reverse gain Sddi2(f) should be approximately zero over a substantial frequency range, even though the reverse isolation of the active devices may not be zero. Preferably, S23(f) has a non-zero value (non-zero real and imaginary components that are a function of frequency) approximately equal to S13(f). Similarly, Sι4(f) has a non-zero value approximately equal to S24(f). In contrast, the effect of prior art design techniques has been to force Sι3(f) to be equal to S24(f), and to force Sι4(f) to be equal to S23(f) and to be as small as possible, but with no requirement for S23(f) to be equal to S13(f) and for Sι4(f) to be equal to S2 (f). The present invention is particularly suitable for constructing differential amplifiers that operate at radio or microwave frequencies, such as frequencies ranging from 100 megahertz to 1 gigahertz or higher. FIG. 2 shows a schematic diagram of a differential amplifier 200 with reverse isolation constructed in accordance with present invention. The differential amplifier 200 includes amplification circuitry having a differential input port 202 and a differential output port 204. The amplification circuitry comprises transistors 221, 222 that function as gain devices. The input port 202 comprises two terminals 211, 212 that are respectively coupled to provide input to the transistors 221 , 222. The output port 204 includes two output terminals 213, 214 that are coupled to the output of the transistors 221, 222. In a normal operating mode, the transistors 221, 222 are biased on and are supplied by independent high impedance direct current voltage supplies, Vs. In the preferred embodiment, the transistors 221, 222 are NPN bipolar transistors having their bases coupled to the input terminals 211, 212, respectively, their collector nodes coupled to the supply and to the output terminals 213, 214, and their emitter nodes coupled to electrical ground. According to the present invention, the differential amplifier 200 includes reverse isolation circuitry that couples the differential output port 204 to the differential input port 202. The reverse isolation circuitry includes transistors 223, 224 having similar manufacturing and processing characteristics to the gain transistors 221, 222 in the amplification circuitry, such as would occur if implemented on a single silicon wafer or a single integrated circuit. In the preferred embodiment, the transistors 223, 224 are NPN bipolar transistors, similar to those used in the amplification circuitry. These transistors are biased off and therefore function as passive transistors, i.e., it is their reverse coupling characteristics that are used, rather than their forward gain characteristics. When the transistor 223, 224 is biased off, its reverse scattering parameter is equal to its forward scattering parameter. However, the only characteristic used is that of the reverse scattering parameter being constrained to be equal to the active transistor reverse scattering parameter. Its not a requirement that the reverse and forward scattering parameters are equal. The forward scattering parameter should be much smaller than the active transistor forward scattering parameter.Transistor 223 has its base coupled to the input terminal 211 and to the input of the transistor 221, its emitter node coupled to its base, and its collector coupled to the output terminal and to the output of transistor 222. Similarly, transistor 224 has its base coupled to the input terminal 212 and to the input of the transistor 222, its emitter node coupled to its base, and its collector node coupled to the output terminal 213 and to the output of transistor 221. Thus, in the preferred embodiment, identical transistors that generate gain in the amplification circuitry are used to generate feed forward branches across the amplification transistors, such that the feed forward branches have transmission coefficients equal to the reverse gain of the amplification transistors when viewed in a single-ended manner. It is noteworthy that these feed forward transistors 223, 224 are biased off so that they have very little forward gain. With these transistors biased off, the forward gain (or loss) is approximately equal to its reverse gain. Significantly, the forward gain of the transistors biased off is approximately equal to the reverse gain of a forward biased transistor. This approximation produces a differential amplifier having significantly reduced reverse gain. FIG. 3 is a block diagram of a radio communication device 300, in accordance with the present invention. The radio 300 is operable in a transmit mode and a receive mode to communicate over radio frequency channels. In receive mode, an antenna switch 304 couples a communication signal received by an antenna 302 to a transformer 312. The transformer converts the single-ended communication signal into a differential signal. The output of the transformer 312 is presented to a differential amplifier 314 (sometimes referred to as a pre-amplifier), which amplifies the signal to be processed by receiver circuitry 316. Such operation is under the control of radio control circuitry 330. In transmit mode, transmitter circuitry 326 prepares signals which are amplified by a differential amplifier 324. A transformer 322 converts the differential signal that is outputted from the amplifier 324, and outputs a signal that is coupled through the antenna switch 304 to be radiated by the antenna 302.According to the present invention, the pre-amplifier 314 is constructed as described with respect to FIG. 2 to reduce the likelihood that signals generated in the receiver circuitry pass in a reverse direction through the pre-amplifier 314 to be radiated out of the antenna 302, thereby causing interference. The amplifier 324 is similarly constructed to provide improved reverse isolation, thereby promoting circuit stability.The present invention provides significant advantages over the prior art. Improved signal isolation of input and output ports of an amplifier eliminates impedance interaction between input and output ports. Thus, the input and output have independent power matching at all frequencies. With Sddi2(f) equal to or approximating zero, an amplifier will be stable for all reactive impedance termination with positive real values on input and output ports, over a very broad range of frequencies. The use of devices similar to the active devices for reverse isolation purposes provides this condition, i.e., Sddi2(f) being equal to or approximating zero, over a broad frequency range, with good tolerance for manufacturing and environmental variations.While the preferred embodiments of the invention have been illustrated and described, it will be clear that the invention is not so limited. Numerous modifications, changes, variations, substitutions and equivalents will occur to those skilled in the art without departing from the spirit and scope of the present invention as defined by the appended claims. What is claimed is: Claims

1. A differential circuit, comprising: first and second active transistors, each having an input and an output; and first and second passive transistors, wherein the first passive transistor has an input coupled to the input of the first active transistor, and has an output coupled to the output of the second active transistor, and wherein the second passive transistor has an input coupled to the input of the second active transistor, and has an output coupled to the output of the first active transistor.

2. The differential circuit of claim 1, wherein the first and second passive transistors are biased off.

3. The differential circuit of claim 1, wherein the first and second active transistors, and the first and second passive transistors, all have similar manufacturing and processing characteristics.

4. A differential amplifier, comprising: amplification circuitry having a differential input port and a differential output port, and comprising first and second transistors; and reverse isolation circuitry that couple the differential output port to the differential input port, and comprising third and fourth transistors having similar manufacturing and processing characteristics to the first and second transistors.

5. The differential amplifier of claim 4, wherein the first and second transistors are active transistors, and the third and fourth transistors are passive transistors.

6. The differential amplifier of claim 4, wherein the first and second transistors are biased on, and the third and fourth transistors are biased off.

7. The differential amplifier of claim 4, wherein: the differential input port comprises first and second terminals that provide input to the first and second transistors, respectively; the differential output port comprises third and fourth terminals that provide output from the first and second transistors, respectively; the third transistor has an input coupled to first terminal and an output coupled to the fourth terminal; and the fourth transistor has an input coupled to second terminal and an output coupled to the third terminal.

8. The differential amplifier of claim 7, wherein the third and fourth transistors are transistors that are biased off.

9. The differential amplifier of claim 7, wherein the amplification circuitry has a differential transfer function S_ddi₂(f) representing differential signal transfer from the output differential port to the input differential port over frequency, f, such that: Sddi₂(i) = 1 2 (S₁₃(f) - S₁₄(f) - S₂₃(f) + S₂₄(fj), where:

Sι₃(f) is a scattering parameter representing reverse signal transfer from the third terminal to the first terminal; S₁₄(f) is a scattering parameter representing reverse signal transfer from the fourth terminal to the first terminal;

S₂₃(f) is a scattering parameter representing reverse signal transfer from the third terminal to the second terminal; S₂₄(f) is a scattering parameter representing reverse signal transfer from the fourth terminal to the second terminal; Sι₃(f) has a non-zero value approximately equal to S (f); and

S₁₄(f) has a non-zero value approximately equal to S₂₄(f)-

10. The differential circuit of claim 9, wherein S ₁₃(f) and S₁ (f) have nonzero real and imaginary components.