WO2001082356A3 - Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates - Google Patents

Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates Download PDF

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Publication number
WO2001082356A3
WO2001082356A3 PCT/US2001/013776 US0113776W WO0182356A3 WO 2001082356 A3 WO2001082356 A3 WO 2001082356A3 US 0113776 W US0113776 W US 0113776W WO 0182356 A3 WO0182356 A3 WO 0182356A3
Authority
WO
WIPO (PCT)
Prior art keywords
planarizing
corrosion
agent
chemical interactions
interactions during
Prior art date
Application number
PCT/US2001/013776
Other languages
French (fr)
Other versions
WO2001082356A2 (en
Inventor
Dinesh Chopra
Scott G Meikle
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to KR1020027014249A priority Critical patent/KR100814623B1/en
Priority to DE10196121T priority patent/DE10196121T1/en
Priority to AU2001259238A priority patent/AU2001259238A1/en
Priority to JP2001579348A priority patent/JP5088524B2/en
Publication of WO2001082356A2 publication Critical patent/WO2001082356A2/en
Publication of WO2001082356A3 publication Critical patent/WO2001082356A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • B24B37/24—Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • B24B37/24—Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials
    • B24B37/245—Pads with fixed abrasives
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24D—TOOLS FOR GRINDING, BUFFING OR SHARPENING
    • B24D3/00—Physical features of abrasive bodies, or sheets, e.g. abrasive surfaces of special nature; Abrasive bodies or sheets characterised by their constituents
    • B24D3/34—Physical features of abrasive bodies, or sheets, e.g. abrasive surfaces of special nature; Abrasive bodies or sheets characterised by their constituents characterised by additives enhancing special physical properties, e.g. wear resistance, electric conductivity, self-cleaning properties
    • B24D3/346—Physical features of abrasive bodies, or sheets, e.g. abrasive surfaces of special nature; Abrasive bodies or sheets characterised by their constituents characterised by additives enhancing special physical properties, e.g. wear resistance, electric conductivity, self-cleaning properties utilised during polishing, or grinding operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation
    • H01L21/3212—Planarisation by chemical mechanical polishing [CMP]

Abstract

A method and apparatus for planarizing a microelectronic substrate. In one embodiment, the microelectronic substrate is engaged with a planarizing medium that includes a planarizing pad and a planarizing liquid, at least one of which includes a chemical agent that removes a corrosion-inhibiting agent from discrete elements (such as abrasive particles) of the planarizing medium and/or impedes the corrosion-inhibiting agent from coupling to the discrete elements. The chemical agent can act directly on the corrosion-inhibiting agent or can first react with a constituent of the planarizing liquid to form an altered chemical agent, which then interacts with the corrosion-inhibiting agent. Alternatively, the altered chemical agent can control other aspects of the manner by which material is removed from the microelectronic substrate, for example, the material removal rate.
PCT/US2001/013776 2000-04-26 2001-04-26 Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates WO2001082356A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020027014249A KR100814623B1 (en) 2000-04-26 2001-04-26 Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates
DE10196121T DE10196121T1 (en) 2000-04-26 2001-04-26 Method and device for controlling chemical interactions during the planarization of microelectronic substrates
AU2001259238A AU2001259238A1 (en) 2000-04-26 2001-04-26 Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates
JP2001579348A JP5088524B2 (en) 2000-04-26 2001-04-26 Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/558,807 US6313038B1 (en) 2000-04-26 2000-04-26 Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates
US09/558,807 2000-04-26

Publications (2)

Publication Number Publication Date
WO2001082356A2 WO2001082356A2 (en) 2001-11-01
WO2001082356A3 true WO2001082356A3 (en) 2002-06-13

Family

ID=24231063

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/013776 WO2001082356A2 (en) 2000-04-26 2001-04-26 Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates

Country Status (6)

Country Link
US (3) US6313038B1 (en)
JP (1) JP5088524B2 (en)
KR (1) KR100814623B1 (en)
AU (1) AU2001259238A1 (en)
DE (1) DE10196121T1 (en)
WO (1) WO2001082356A2 (en)

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