WO2001086845A1

WO2001086845A1 - Communication systems and methods using time-slot modulation with ds cdma for multi-path channels

Info

Publication number: WO2001086845A1
Application number: PCT/US2000/012544
Authority: WO
Inventors: Liu Yong; Liu Chunyan
Original assignee: Liu Yong
Priority date: 2000-05-08
Filing date: 2000-05-08
Publication date: 2001-11-15

Abstract

A multi-user digital communication system (1), such as a wireless communication system, using a modified version of time-slot modulation (TSM) (3) combined with a TSM interleaving scheme (6) and the direct-sequence code-division-multiple-access (DS-CDMA) scheme (5). The invented system reduces the multi-path interference by a large amount, compared to existing CDMA-PSK methods. The TSM interleaving method is disclosed.

Description

Communication Systems and Methods

Using Time-Slot Modulation with DS CDMA for Multi-Path Channels

BACKGROUND OF THE INVENTION

Cross-Reference To Related Application: This application is related to application Serial No. 09/244,225, filed on February 2, 1999.

This invention relates to communication systems and methods using a modified version of time- slot modulation (TSM) combined with a TSM terleaving scheme and a direct-sequence code division multiple access (DS-CDMA) scheme, and accordingly to the manner of operation of communication systems with the invented system built in. More specifically, this invention relates to a multi-user digital communication system using a modified version of the TSM disclosed in the cross-referenced patent application filed by the same applicant of this patent, which uses a TSM interleaving method and overcomes the problem of multi-path interference in, e.g., a wireless communication channel.

In existing multi-user digital communication systems, such as a wireless digital communication system, the modulation method used is generally the conventional phase shift keying (PSK) or frequency shift keying (FSK). For example, in the US IS-136 TDMA wireless communication system and the US IS-95 CDMA wireless communication system, the PSK is used. In the European GSM wireless system, the FSK is used. The multiple access methods used are generally the conventional code division multiple access (CDMA), time division multiple access (TDMA) or frequency division multiple access (FDMA). The wireless communication systems using the conventional PSK or FSK modulation methods and CDMA, TDMA or FDMA multiple access schemes have been successfully manufactured and deployed all over the world. However, as the number of wireless communication users increases and more bandwidth-demanding services such as the wireless Internet become popular, it is necessary to invent more efficient modulation/multiple access methods to increase the capacity of a wireless communication system, i.e., to increase the number of users for a given bandwidth without sacrificing the communication quality.

Experiences from testing deployed systems have shown that the IS-95 CDMA scheme combined with the PSK modulation has achieved better efficiency than the TDMA and FDMA schemes by efficiently utilizing the voice-activity property (in more than 50% of time a wireless-phone user is not talking), the soft handoff and the multi-path diversity. However, the CDMA with the PSK is still not efficient enough to satisfy the demand of more and more wireless users and more bandwidth-demanding services.

An efficient method of time-slot modulation (TSM) was disclosed by the applicant of this patent in the cross-referenced application. The TSM method is capable of improving existing CDMA methods by a large amount. However, the well-known and serious multi-path problem in, e.g., wireless communications cannot be satisfactorily solved by existing CDMA methods.

It is disclosed in this application that the multi-path interference problem can be dramatically improved by modifying the TSM, that is, introducing a special interleaving (referred to as TSM interleaving hereafter) method combined with a DS-CDMA scheme. An object of this invention is to use a modified version of time-slot modulation (TSM) combined with the TSM interleaving and the DS-CDMA scheme to dramatically reduce the multi-path interference in, e.g., wireless communications. PRIOR ART

There exist many books, articles and patents which disclose methods and techniques to use the conventional PSK and FSK modulation combined with the CDMA or TDMA for a multi-user digital communication system. In Digital Communications (second Ed. , published by McQraw Hill in 1989) by J. G. Proakis, page 804, Figure 8.2.1, a DS-CDMA method with Quadrature PSK (QPSK) modulation is disclosed. This modulation method has been incorporated into real digital wireless communication systems such as the US IS-95 system. As is observed from real system experiences, the DS-CDMA with the QPSK modulation is still far from the possibly achievable efficiency suggested by the Shannon information theory and does not satisfy the demand of more and more wireless users and more bandwidth-demanding services, even though it performs much better than the TDMA and FDMA methods. In US Patent No. 4291409 by Weinberg et al. and US Patent No. 5103459 by Gilhousen et al., a number of implementation details for using the conventional PSK modulation with the DS-CDMA are disclosed. In Proakis, Weinberg and Gilhousen, each user is assigned an orthogonal code (such as a Walsh code) and/or a pseudo- noise (PN) sequence. At each symbol interval, one or two information bits are mapped to the in- phase (I) and/or the quadrature (Q) components and then modulates (multiplies or exclusively- ORs) the orthogonal code and/or the PN sequence. After modulating the orthogonal code and/or the PN sequence, each I and Q bit is converted into a number of chips which are then transmitted to the air after modulating a radio frequency (RF) carrier. If the multi-path effect and inter-cell interference did not exist and the signals for all users are exactly synchronized, then the orthogonal code could eliminate most of the interference generated by other users' orthogonal codes. However, in a real wireless communication environment, the multi-path effect and inter- cell interference are always severe enough to make the interference the most important problem to limit the capacity of the communication system.

Another CDMA scheme using a frequency-hopping (FH) method is disclosed in Digital Communications (second Ed., published by McGraw Hill in 1989) by J. G. Proakis, page 847, Figure 8.3.2. More implementation details of a frequency-hopping (FH) CDMA system is disclosed in US Patent No. 4222115 by Cooper et al. In both Proakis and Cooper, each user's information bits are used to modulate a radio frequency (RF) carrier whose frequency is determined by a number of PN sequence bits or by one of a set of orthogonal codes, and is hopping in a pseudo-random pattern according to the PN sequence or the orthogonal code. Since all users in the FH-CDMA system are sharing the same set of RF carriers and there are usually a large number of mobile users sharing the same carriers, one user's carrier has a high likelihood to collide with another user' carrier. Similar to the conventional DS-CDMA method, the FH CDMA method does not provide any effective means to reduce the interference generated by other users, which is a severe problem and limits the capacity of the communication system.

All the existing CDMA methods cannot solve the multi-path interference problem satisfactorily.

SUMMARY OF THE INVENTION The goal of this invention is to use a version of the time-slot modulation (TSM) in the cross- referenced application to overcome the multi-path interference in, e.g., wireless communications.

The invented digital communication system comprises a transmitter and/or a receiver for each of the stations (base-stations or user-stations) in the system. The transmitter comprises a time-slot- modulation (TSM), a DS-CDMA spreading integrated circuit (IC) and a TSM interleaving IC. The ICs can be implemented by using an apphcation-specific-integrated-circuit (ASIC) or a field-programmable-gate-array (FPGA) or a very high-speed digital signal processor (DSP) and are loaded with the computer-program implementing the TSM, the DS-CDMA spreading and the TSM interleaving.

In the transmitter, a pre-determined number of information bits for each user are mapped to a pre-deterrnined number N of symbols with one of the N symbols carrying non-zero-energy and all the other N-1 symbols carrying zero-energy. The symbols are then distributed to N time-slots. All time-slots are spread by using a common DS-CDMA spreading code. Then a TSM interleaving method redistributes the spread chips in such a way that N chips spread by an identical CDMA-code chip are adjacent to each other with one of the Nchips having non-zero- energy and all other N-1 chips having zero-energy.

The above TSM mapping, CDMA spreading and TSM interleaving can be operated for the in- phase (I) components and the quadrature (Q) components separately. The receiver of the invented system comprises a DS-CDMA de-spreading IC and a TSM demodulation IC. Both ICs can be implemented by using an ASIC or a FPGA or a DSP and are loaded with the computer-program implementing the TSM demodulation and the DS-CDMA de- spreading including Rake-combining. The TSM demodulation IC is similar to that disclosed in the cross-referenced application. In addition to the advantage that the overall processing gain to interference ratio of the TSM scheme is n times as large as a conventional DS-CDMA system (such as the IS-95 CDMA system), which was disclosed in the cross-referenced application, the invented TSM interleaving method is capable of reducing the multi-path interference by up to Ntimes. The reason is as follows. The N adjacent chips always have only one chip carrying non-zero-energy and all other N-1 chips carrying zero-energy. If there exists another path in addition to the main path and the delay is, e.g., one chip period, then the probability that the N chips would generate multi-path interference to other Code channels is 1/N, while the probability is 1 for existing CDMA systems. Since in most of cases the major delay spread is less than one chip period, therefore the TSM interleaving method can achieve a dramatic multi-path interference reduction of up to N times.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a schematic diagram illustrating one embodiment of a transmitter of a digital communication system employing the time-slot-modulation (TSM) and TSM interleaving of the present invention combined with a direct-sequence code-division-multiple-access (DS-CDMA) spreading circuit.

Figure 2 is a schematic diagram illustrating one embodiment of a receiver of a digital communication system employing the TSM and the TSM interleaving of the present invention combined with a DS-CDMA de-spreading circuit.

Figure 3a is a schematic diagram illustrating one implementation of the time-slot-modulation (TSM) of the present invention.

Figure 3b is a schematic diagram illustrating another implementation of the time-slot-modulation (TSM) of the present invention. Figure 4 is a schematic diagram illustrating the frame and slot structure of the TSM signal of the present invention.

Figure 5 is a schematic diagram illustrating the frame and slot structure of the TSM signal before and after DS-CDMA spreading. Figure 6a is a schematic diagram illustrating the TSM interleaving.

Figure 6b illustrates a logic flow chart of the software loaded into the TSM interleaving IC chip to implement the function of TSM interleaving.

DETAILED DESCRDPTION

Referring to Figure 1, a transmitter of the invented system comprises a time-slot-modulation (TSM) integrated-circuit (IC) 3, a direct-sequence code-division-multiple-access (DS-CDMA) spreading circuit 5, a TSM interleaving circuit 6, a speech/video/internet source (possibly with source-encoding) 10, a channel-encochngmterleaving (optional)/data-scramblingpilot-symbol- multiplexing (optional) circuit 20, an optional circuit 60 generating other channels such as a pilot-channel or other traffic channel, a summing circuit 50 combining all necessary channels together, and a pulse-shaping/RF-modulation circuit 70.

The speech/video/internet source 10 receives the input from a microphone, a computer or a telecommunication network, or any other data sources. The source bits from the source 10 are then channel-encoded, interleaved, scrambled, and optionally multiplexed with pilot symbols at the circuit 20. The channel encoding in the circuit 20 is used to correct and detect errors incurred during the data transmission. The interleaving in the circuit 20 could enhance the channel-coding capability by reducing the burst errors. The source data from the source 10 may be scrambled in the circuit 20 in order to make the TSM more effective in reducing the interference of the invented multi-user digital communication system. Optionally, pilot symbols may be inserted into the information bits in the circuit 20 and assist in a number of functions in the receiver, such as channel estimation, synchronization acquisition and symbol-timing-recovery. However, the pilot symbols may be also transmitted through a pilot channel generated in the circuit 60 and combined at the summer 50 with the traffic channel from the DS-CDMA spreading circuit 5. The preprocessed information bits from the circuit 20 are sent to the TSM circuit 3 and are converted to TSM symbols. The TSM symbols from the TSM circuit 3 are sent to the DS-CDMA spreading circuit 5, are spread and converted to DS-CDMA spread symbols. The DS-CDMA spread symbols are referred to as DS-CDMA chips. The DS-CDMA chips from the DS-CDMA spreading circuit 5 are sent to the TSM interleaving circuit 6 to be rearranged to achieve the anti- multi-path result, then are sent to the summer circuit 50 and are combined with signals from other channels if necessary. The combined DS-CDMA signal is then sent to the pulse- shapingRF-modulation circuit 70 for final processing before being sent out to an antenna or cable.

Referring to Figure 2, a receiver of the invented system comprises a TSM demodulation integrated circuit (IC) 160, a DS-CDMA de-spreading/Rake-combining circuit 120, a RF- demodulation/matched-filtering circuit 110, a channel-decoding/de-interleaving/data-de- scrambling circuit 140 and a speech/video/internet signal processing circuit 150.

The received RF signal which is transmitted by the transmitter shown in Figure 1 is received by an RF antenna or from a cable and is processed by an RF-demodulation/matched-filtering circuit 110 and is converted to a sampled baseband signal. The sampled baseband signal is sent to the DS-CDMA despreading circuit 120 and is despread by using all necessary DS-CDMA codes including PN codes and orthogonal codes, for all necessary channels including traffic channels, pilot channels etc. The despread signal is then sent to the TSM demodulation IC 160 for further processing and is converted to information bits. The demodulated information bits are then sent to the circuit 140. In the circuit 140, the bits need to be channel-decoded to correct and detect errors incurred during the transmission. A deinterleaving operation is performed if the bits are interleaved at the transmitter circuit 20. The bits also may be descrambled to restore the bit order which may be scrambled by the transmitter circuit 20. Then the detected/corrected information bits are sent to the circuit 150 for final processing before being sent to a speaker, a computer or a telecommunication network or any other data terminal.

The TSM IC 3 is illustrated in more detail in Figures 3a and 3b.

An implementation of the TSM IC is illustrated in Figure 3a, where an information bit stream ... ,h(i+R-l), ...,b(i), ... ,b(0) is generated by the circuit 20. Each b(i) represents an information bit 0 or 1 at the discrete time interval iT_b with T_b to be the period of one information bit, and R represents the number of information bits in a frame. The major TSM modulation circuit is a TSM mapping IC 35. The operation of the TSM mapping IC 35 is described as follows.

For predetermined integer numbers n and m (n>m>0 and R is integer times of n), each bit frame b(i+R-l), ...,b(i+\),b(i) is mapped to a TSM symbol frame with 2"^'mR/n=NR/n consecutive TSM symbols s(k+2"-^mR/n-l), ... ,s(k+(2"-^m-l)R/n), ... ,s(k+R/n), ... , s(k+l), s(k). Each s(k) represents a TSM symbol at the discrete time interval kT_s with T_s to be the period of one TSM symbol. Each TSM symbol frame is divided into N=2"^~m time-slots and each time-slot has JR/n TSM symbols. The N=2"^'m TSM time-slots in the frame are referred to as Slot No. ^m-\,... , Slot No. 1, Slot No. 0, respectively.

It is possible to design a system in such a way that R=n. In this case each time-slot has only one TSM symbol, and all other operations of the invented system remain the same.

For example, let n=3, m=l, R=783, R/«=261, then the first bit frame with 783 consecutive bits b(782), ... ,bβ) ,b(0) is mapped to the first TSM symbol frame with 1044 consecutive TSM symbols s(1043),...s(l),s(0) (Note: ^mR/n=2²*26\=1044). Each TSM symbol frame is first divided into 4 time-slots (Note: N=2^,MH= ), i.e., Slot No. 3, Slot No. 2, Slot No. 1, Slot No. 0. Each TSM time-slot has 261 TSM symbols.

For a bit frame b(i+R-l), ... ,b(i+l),b(i), the first consecutive n information bits bfi+n- 1),... ,b(i+l) ,b(i) are mapped to the first TSM symbols of all ^'m TSM time-slots of the TSM frame, i.e., T^'n TSM symbols s(k+(2"-^m-l)R/n), ... s(k+R/n),s(k), where the TSM symbol s(k) is the first symbol of die TSM Slot No. 0 in the TSM frame, the TSM symbol s +R/n) is the first symbol of the TSM Slot No. 1, the TSM symbol s(k+2R/n) is the first symbol of the TSM Slot No. 2, ... , and the TSM symbol s(k+(T^m-\)R/n) is the first symbol of the TSM Slot No. ^m- 1. The second consecutive n mformation bits b(i+2n-l), ... ,b(i+n+l) ,b(i+n) are mapped to the second TSM symbols of all 2"^'m TSM time-slots. And so on. Finally the R/nth consecutive n information bits b(i+R-\), ... , b(i+(R/n-l)n+l) , b(i+(R/n-l)n) are mapped to the R/nβa. TSM symbols of all T^~m TSM time-slots.

Using the same example as before, let n=3, m=l, R=783, R/n=26l, for the first bit frame b(782), ... ,b(l) ,b(0), the first 3 consecutive bits b(2),b(l) ,b(0) are mapped to the first TSM symbols of all 4 (Note: 2"^'m=2² =4) TSM time-slots of the TSM frame, i.e., 4 TSM symbols s(783), s(522), s(26\),s(0) (Note: 753=3*261, 522=2*261). The next 3 consecutive bits b(5), b(4) ,b(3) are mapped to the second TSM symbols of all 4 TSM time-slots, i.e., s(783+l), s(522+l),sβ61+l),s(l). And so on. Finally the 261st consecutive 3 bits b(782), bβ82-l) ,b(782- 2) are mapped to the 261st TSM symbols of all 4 TSM time-slots, i.e., s(783+260), s(522+260),sβ61+260),sβ60). The rule of mapping the consecutive n bits b(i+n-l), ... ,b(i+l),b(i) to 2"^'m TSM symbols s(k+(2"^~"'-l)R/n), ... s(k+R/n),s(k) is as follows. First, n-m bits of the n bits, e.g., b(i+n- l)... b(i+m+l) b(i+m), are used to determine a time-slot number Slot No. j with/= 2^n'mΛb(i+n- l)+... +4b(i+}n+2)+ 2b(i+m+l)+bfi+m), i.e.,/ is the decimal number equivalent of the (n-m)-bit unsigned-binary-integer number b(i+n-l) .,. b(i+m+l)b(i+m). Second, the TSM symbol sβ+j^'R/n) of Slot No .j is chosen to be a 2^m-ary phase-shift-keying(PSK)-modulated symbol determined by the remaining m bits of the n bits, e.g., b(i+m-l)... b(i+l)b(i). If =0, then s(k+jR/η)=l. Third, all the remaining TSM symbols of ^m TSM symbols s(k+(?^'m-l)R/n), ...s(k R/n),s(k) are chosen to be 0, i.e., s(k+ ' R/n) =0 for ally '=0, 1, ... , 2^n'm-\ and./ '≠j.

Incrementing the index k by 1, incrementing the index i by n and repeating the same operation as the above, the next consecutive n bits b(i+2n-\), ...,b(i+n+l),b(i+n) are mapped to 2"^'m TSM symbols s(k+(?-"'-l)R/n+l), ...s(k+R/n+l),s(k+l) with j= 2"-^m-¹b(i+2n- 1)+... +4b(i+n+m+2)+ 2b(i+n+m+l)+b(i+n+m), s(k+fR/n+l)= -ary-PSK(b(i+n +m- 1) ... b(i+n+l)b(i+η)) and s(k+j 'R/n+1) =0 for ally '=<?, 1, ... , 2"""-l andy ' . This operation should be repeated as long as the communication continues. It is noted that the TSM symbol s(k+j^'R/n) of Slot No.y may be also chosen to be a symbol modulated by using any other 2^m-ary modulation scheme, such as the quadrature-amplitude- modulation (QAM). Both the PSK and QAM are well-known to people with the ordinary skill in the art.

Using the same example as before, let«=3, m=l, R=783, R/n=26l, and b(2)b(l)b(0)- 001, then j=unsigned-binaιγ-to-decimal(OO) =0 (Note: b(2) b(l) =00). Then sβ61 *f) =BPSK(1) =-i (Note: b(0)= l), sβ6lf)=0 for ally '=1,2,3 (Note: ^""-1=2^1=3). Increasing the index k by 1, increasing the index / by n, and assuming b(5)b(4)b(3)=lQQ, theny= unsigned-binary-to- decimal(10)=2, sβ61 *j+l)=BPSK(0)=l, s(261j'+l)=0 for ally '=0,2,3. And so on.

It should be noted that the TSM is a combination of a 2"^" -ary orthogonal modulation and a 2^m- ary PSK modulation for m>0. If m=0, the TSM becomes a 2"-ary orthogonal modulation.

Another implementation of the TSM IC is illustrated in Figure 3b. In this case each bit frame has 2R bits b(i+2R-l), ... ,b(i+l),b(i) and is de-multiplexed at the circuit 31 into the in-phase (I) frame bfi+R-l), ... ffi+ljffi) and the quadrature (Q) frame b_Q(i+R-l), ... ,b_Q(i+l),b_Q(i). Using the same operation as before, the I-frame bits bfi+RΛ), ... ,bfi+l),b (i) are mapped at the TSM mapping circuit 32 to T^'mR/n consecutive TSM I-frame symbols sjft+ ^'∞R/n-l), ... ,s_I(k+( ^'m- l)R/n), ... ,sι(k+R/n), ... ^(k+l), sfk), and the Q-frame bits b_e(?+R-L>, ... ,b_Q(i+l),b_Q(i) are independently mapped at the TSM mapping circuit 33 to 2"^'"'R/n consecutive TSM Q-frame symbols _Q(k+2ⁿ-^mR/n-l), ... ,s_Q(k+(2"-^m-l)R/n), ... ,s_Q(k+R/n), ... ,s_Q(k+l), s_Q(k).

The frame structure of the TSM symbols is illustrated in Figure 4. Figure 5 illustrates how the TSM symbols should be spread. Let the spreading code be denoted by ... r(M-l), ... r(l)r(0) with to be the processing gain. The spreading code r(i) maybe a multiplication of an orthogonal code (e.g. Walsh codes) w(i) and a pseudo-noise (PN) codepfi), i.e. r(i)=w(i)p(i). The 1^st symbol of the slot No.O is then spread as cβf-l)=s(k)r(M-l), ... , c(l)=s(k)r(l), c(0)=s(k)r(0) . The 1^st symbol of the slot No.1 is spread by the same spreading code as cβfR/n+M-l)=s(k+R/n)rβ -l) ,..., cβfR/n +l)=sfi+R/n)r(l), cβdR/n)=s(k+R/n)r(0) . And so on. That is, the TSM symbols are

Slot#0 s(R/n-l) s(l) s(0)

Slotttl s(2R/n-l) s(R/n+l) s(R/n)

Slot#2"-^m s(T^mR/n-l) s(T^mR/n-R/n^l) s(T^mR/n-R/n)

Each of the above time-slot TSM symbols is spread by an identical spreading-code sequence ... rβd-1),... r(l)r(0), the resulting chips for all time-slots are Slot#0 cβdR/n-1) c(l) c(0)

Slot#l c(2MR/n-l) cβfR/n+1) c(MR/n)

Slot#2"-^m c( ^mMR/n-l) cβ"-^mMR/n-MR/n+l) c( ^mMR/n-MR/n)

Using the same example as before, let «=3, m=l, R=783, R/n=26l, and b(2)b(l)b(0)= 001, then j=unsigned-binary-to-decimal(00)=0 (Note: b(2) b(l) =00). Then sββl *j)=BPSK(l)=-l (Note: b(0)= 1), sβ6lf)=0 for ally '=1,2,3 (Note: 2'""-l=2²-l=3). Incrementing the index £by 1, incrementing the index / by n, and assuming b(5)b(4)b(3) -100, theny= unsigned-binaty-to- decimal(l0)=2, sβ6l*j+l)=BPSK(0)=l, sβ6lf+l)=0 for ally '=0,1,3. And so on. That is

Slot#0 s(l)=0, s(0)=-l Slot#l s(261+l) 0, s(261)=0

Slot#2 s(261*2+l)=l, s(261*2)=0

Slot#3 s(261*3+l)=0, s(261*3)=0

After TSM spreading, the spread chips are ( =S)

Slot#0 00000000, -1-1-1-1-1-1-1-1 Slot#l 00000000, 00000000

Slot#2 11111111, 00000000

Slot#3 00000000, 00000000

The TSM interleaving is illustrated in Figures 6a and 6b. They can be written as the following matrix form. cfT^mMR/n) c '( ^m) c'(0) c'(T^m MR/n+1) c '(?-"Xl) c '(l) c'(2ⁿ-"'MR/n-l) c'(2"-^m2-l) c'(T^m -1)

Comparing the matrix c(i) to the matrix c '(j), it is seen that before the TSM interleaving, the output order of the chips c(i) is row-by-row starting from the top-right corner. After the TSM interleaving, the output order of the TSM chips c '(j) is column-by-column starting from the top- right corner. Let N=2"^~m and R„=MR/n, it is seen that c '(i+jN)=c(iR_n+j) for /=0, ... ,N-1 and y=0,... , R„-Λ

Using the above example, after the TSM interleaving, the TSM chips c '(f) are output as (the right chip first) ...01000100 010001000100010001000100, 000-1 000-1 000-1 000-1 000-1 000-1 000-1 000-1

The above sequence of the TSM chips occupy one orthogonal channel (e.g., one Walsh channel) and are orthogonal to other synchronized orthogonal channels. Therefore the interference generated by the above sequence of the TSM chips is zero if there is no multi-path. If there is multi-path, then the above chips would have a delayed copy (e.g. delayed by one chip period). From the above TSM spreading and the TSM interleaving, it is seen that every adjacent 4 TSM chips ar generated by the same spreading code chip. Therefore, 3 out of the 4 TSM chips are still orthogonal to other synchronized code channels and would not generate any interference. The last (left) one of the adjacent 4 TSM chips is out of the synchronization range. In the above example, since the TSM chip out of the synchronization range has zero-energy, it still does not generate any interference to other code channels. Since only one of the 4 TSM chips has nonzero-energy, the probability that the TSM chip out of the synchronization has non-zero-energy is 1/4. That is, the multi-path interference is reduced by 4 times if the delay is not greater than one chip period (which is often true in practice).

In general, the TSM interleaving method reduces the multi-path interference by N=2"^"m times if the delay is not greater than one chip period. This large amount of interference reduction achieved by the TSM interleaving is added to the top of the TSM's excellent processing-gain-to- interference-ratio disclosed in the cross-referenced application.

While considerable emphasis has been herein on the preferred embodiment illustrated and described herein-above, it will be appreciated that other embodiments of the invention can be made and that changes can be made in the preferred embodiment without departing from die principals of the present invention. Accordingly, it is to be distinctly understood that the foregoing descriptive matter is to be interpreted merely as illustrative of the invention and not as a limitation.

Claims

What is claimed is:

1. A digital communication system comprising: a transmitter which comprises: a stream of information bits to be transmitted over a media; a modulation circuit which maps a predetermined number n of said information bits to a predetermined number N of TSM symbols with one of said N TSM symbols being a nonzero-energy TSM symbol and N-1 said TSM symbols being zero-energy TSM symbols; a spreading circuit which spreads said TSM symbols to chips; a TSM interleaving circuit which reorders said chips into TSM chips; wherein said predetermined number N of said TSM chips are generated by modulating said N TSM symbols by an identical spreading code chip, and each of said predetermined number N of said TSM cliips is adjacent to at least one of said N TSM chips with one of said N TSM chips carrying non-zero-energy and N-1 said TSM chips carrying zero- energy.

2. The digital communication system as defined in claim 1 wherein: said non-zero-energy TSM symbol is equal to 1.

3. The digital communication system as defined in claim 1 wherein: for a predetermined non-negative integer number m, said number N is equal to 2"^'m; said non-zero-energy TSM symbol is equal to a phase-shift-keying modulation symbol mapped from said m bits of said n information bits.

4. The digital communication system as defined in claim 1 wherein: said modulation circuit uses a time-slot-modulation which maps said N TSM symbols over N time-slots.

5. The digital communication system as defined in claim 4 wherein: said spreading circuit uses an identical spreading sequence to spread said TSM symbols in each of said N time-slots, and converts each of said TSM symbols to a predetermined number M of said chips.

6. The digital communication system as defined in claim 5 wherein: there are a predetermined number R„ of said chips in each of said time-slots; said chips are denoted by c(0), c(l), ... , c(R„-l), c(R„), , c(NR„-l); said TSM chips are denoted by c '(0), c '(1), ... , c '(N-1), c '(N), , c '(NR_n-l); said TSM interleaving circuit maps said chips to said TSM chips in such a way that for i=0,...,N-l mdj=0,..., R„-l, c '(i+jN)=c(iR_n+j).

7. The digital communication system as defined in claim 4 wherein: said N time-slots are numbered as Slot Number 0, Slot Number 1 , ... , Slot Number N-1 ; said n information bits form an «-bit unsigned-binary-integer and are converted to a decimal number j; said non-zero-energy TSM symbol is mapped into said Slot Number j.

8. The digital communication system as defined in claim 4 wherein: for a predetermined non-negative integer number m, said number N is equal to 2^n'm; m bits of said n information bits are mapped to said non-zero-energy modulated symbol; said N time-slots are numbered as Slot Number 0, Slot Number 1 , ... , Slot Number N-1 ; n-m bits of said n information bits which are not used for mapping to said non-zero- energy TSM symbol form an (n-m) -bit unsigned-binary-integer and are converted to a decimal number j; said non-zero-energy TSM symbol is mapped to said Slot Number j.

9. The digital communication system as defined in claim 6 wherein: said TSM interleaving circuit is programmed with a computer program implementing a process comprising the steps of: 9-0) setting integery=0,

9-1) setting integer i=0,

9-2) setting c '(i+jN)=c(iR_n+f),

9-3) incrementing / by 1 and going back to step 9-2 if / is less than N, going to step 9-4 if / is equal to N, 9-4) incrementingy by 1 and going back to step 9-1 ify is less than R„, teπninating said process ify is equal to R„.

10. The digital con-tmunication system as defined in claim 1 wherein: said modulation circuit maps a first group of said n chips to said number N of in-phase TSM symbols, said spreading circuit spreads said in-phase TSM symbols to in-phase chips, said TSM interleaving circuit reorders said in-phase chips into in-phase TSM chips, wherein said predetermined number N of said in-phase TSM chips are generated by modulating said N in-phase TSM symbols by an identical in-phase spreading code chip, and each of said predetermined number N of said in-phase TSM chips is adjacent to at least one of said N in-phase TSM chips with one of said N in-phase TSM chips carrying non-zero-energy andN-i said in-phase TSM chips carrying zero-energy, said modulation circuit maps a second group of said n chips to said number N of quadrature TSM symbols, said spreading circuit spreads said in-phase TSM symbols to quadrature chips, said TSM interleaving circuit reorders said quadrature chips into quadrature TSM chips, wherein said predetermined number N of said quadrature TSM chips are generated by modulating said N quadrature TSM symbols by an identical quadrature spreading code chip, and each of said predetermined number N of said quadrature TSM chips is adjacent to at least one of said N quadrature TSM chips with one of said N quadrature TSM chips carrying non-zero-energy and N-1 said quadrature TSM chips carrying zero-energy.