WO2001097371A1

WO2001097371A1 - A dc to dc flyback converter

Info

Publication number: WO2001097371A1
Application number: PCT/IE2001/000085
Authority: WO
Inventors: Radoslaw Nalepa; Michael Noel Barry; Peter Meaney
Original assignee: Artesyn Technologies
Priority date: 2000-06-16
Filing date: 2001-06-18
Publication date: 2001-12-20
Also published as: AU2001274437A1

Abstract

A DC to DC flyback converter (1) of the switch mode type where the pulse waveform input is width adjusted to control the current applied to the load. The control is carried out by measurements taken in the input circuit, hence obviating any need to sense output and providing cycle by cycle control.

Description

"A DC to DC flyback converter"

Introduction

The present invention relates to a DC to DC flyback converter of the switch mode type comprising a control switch which applies a pulsed waveform to a transformer or choke in which the pulsed waveform is adjusted to control the current applied to a load.

There are many types of DC to DC converters. For example, in US Patent Specification No. 5103386 (U.S. Philips Corporation), in order to regulate the output voltage of the converter, a sensing circuit and a demagnetising circuit are connected to a control device. A winding of the primary of the transformer is connected to the sensing circuit and a second coil is coupled to another coil which is connected in the demagnetising circuit. The second coil provides demagnetisation by transferring energy stored in the first coil into the demagnetising circuit. Essentially, it is an auxiliary winding using a sensing circuit, together with an averaging capacitor. The control is then carried out by pulses, the width of which are modulated in dependence on load fluctuations.

In German Patent Specification No. DE 19643136 (Siemens AG), the circuit does not have output isolation. The output voltage is taken directly from the output of the converter.

In UK Patent Specification No. 2073918 (Standard Telephones and Cables Limited), there is provided a DC to DC converter which applies an average mode control which an averaging capacitor. An error signal is derived from the primary of the transformer and applied via a rectifier to an amplifier where it is compared with a reference voltage. It is, in effect, an average mode control with an averaging capacitor.

US Patent Specification No. 5991171 (Delta Electronics Inc.) discloses that the output signal is taken directly from the output of the converter and does not propose a control strategy although it does describe a typical converter. What is apparent from the prior art is that ideally what is required is a close control of the output without having to, in any way, sense the output in the output circuit. As mentioned above, there have been some attempts to this. What is required is to provide cycle by cycle control of the converter without output sensing and without the need for isolation in the feedback path.

The present invention is directed towards this.

Statements of Invention

According to the invention, there is provided a DC to DC flyback converter of the switch mode type comprising a control switch of an input circuit which applies a pulse waveform to a transformer or choke in which the pulse waveform is width adjusted to control the voltage applied to a load characterised in that the voltage in the input circuit is sensed and compared with a reference voltage and the input current waveform on the next cycle is adjusted to provide the desired load voltage.

In one converter according to the invention, the invention is characterised in that during each off cycle, when the control switch is not conducting, the voltage across the control switch is sensed, compared with a reference voltage and an error voltage obtained and the next cycle of the pulse waveform is adjusted in response to the error voltage.

In this latter embodiment, ideally the DC to DC converter is one in which a primary winding of a transformer is connected in series with a control switch and the secondary winding is coupled to a rectifier and a charge capacitor in which there is provided on the primary side a control circuit including a pulse generator to operate the control switch, a current sensor connected to the switch, said current sensor operating to terminate the output of the pulse generator until when the current applied to the primary winding exceeds a preset level.

In a further embodiment, there is provided a DC to DC converter in which the error voltage (V_E) is calculated with signal limiting where:- V_E = (Vsw-Vin)*K1-V_D-Vref

where

Vsw voltage on switch during off time

Vin input voltage

K1 gain

V_D - rectifier voltage

Vref - reference voltage

In this latter embodiment, ideally the error voltage V_E is amplified by a gain added to the shift level voltage, its peak value is measured by a peak value detector and applied to a comparator, compared to a saw tooth wave provided by a generator to form a new on time signal held until the end of the off time.

The invention further provides that the on time for the next cycle when calculated is mirrored into the next cycle by use of two slopes and a comparator.

What will be appreciated by the present invention is that what we have is close control of the output without sensing the output directly. This is exceedingly advantageous. We have achieved this by calculating the output voltage cycle by cycle during the switches off time thus by measuring voltages on the primary side only. This gives close cycle by cycle control without output sensing and without the need for isolation in the feedback path.

Detailed Description of the Invention

The invention will be more clearly understood from the following description of an embodiment thereof, given by way of example only, with reference to the accompanying drawings, in which:

Fig. 1 is a block diagram of a flyback converter according to the present invention; Fig. 2 is a diagram showing comparison of calculated V₀ with the saw tooth wave to produce the new on time;

Fig. 3 is a diagram showing the mirroring of the new on time into the next cycle where it is to be used; and

Figs. 4 and 5 illustrate further control methods.

Referring to the block diagram of Fig. 1 , there is illustrated a DC to DC flyback converter, indicated generally by the reference numeral 1 comprising a flyback transformer, indicated generally by the reference numeral 2 and the letters (FT), having a primary winding (PW) and a secondary winding (SW). The converter 1 is fed with input power at 3 having a voltage Vin. A pulse waveform is provided by a control switch, indicated generally by the reference numeral 4 forming part of the transformer input circuit which provides a pulse waveform to the transformer 2. The control switch 4 feeds earth through a current sense resistor (RIS), identified by the reference numeral 5. A load 6 having an output voltage Vo is fed from the secondary winding (SW) which is coupled to a rectifier (D) 7 and a charge capacitor (C) 8. A control circuit 10 delineated by the interrupted lines is provided. The control circuit 10 provides the start-up pulses (logic) for the switch 4. The voltage (Vsw) of the switch is fed to an adder 11 which is also fed with the input voltage (Vin) such that the voltage (Vsw - Vin) is fed to a signal limiter (SL) 12 which is in turn fed through a gain 13 providing a gain K1 which in turn is fed to a second adder 14 to which is also applied a voltage reference (Vref) and a model of the voltage of the rectifier (D) 7 by a rectifier model 15. Thus, the output of the adder 14 is

(Vsw-Vin)* K1-V_D-Vref

This is then fed as a voltage error signal (V_E) to a gain 15 which in turn is fed to a further adder 16 and is added to a shift level voltage (Vshift). This is then fed to a peak detector 17 where the peak value is measured. The peak value of the signal is fed from the peak detector 17 to a comparator 18. Also fed to the comparator 18 from a saw tooth signal generator 19 is a saw tooth waveform. The comparison of the two waveforms and the resultant new on time is shown in Fig. 2 of the accompanying drawings. The resultant output of the comparator 18 is then sent to a hold circuit 20 which in turn is fed to a logic circuit 21 where the end of the constant off time from circuit 22 is used as the beginning of a new on time which in turn feeds the drive provided by a pulse generator 23 for the switch 4.

Once the new on time for the next cycle has been calculated it must be held until the end of the present cycle before it can be used as the new on time. This is achieved by mirroring the new on time into the next cycle by way of two slopes of constant, but different gradients and a comparator. This is clearly illustrated in Fig. 3 of the drawings.

At time T₀ the start of the new on time for the next cycle is calculated, as described above, by the comparison of the extracted signal from the peak detector 17 with the saw tooth wave from the saw tooth wave generator 19, in the comparator, 18. Time , coincides with the end of the constant off period as well as the end of the calculated new on-time for the next cycle. It also coincides with the beginning of the next cycle

At time T₀ slope M-, is activated and begins to rise gradually. At time T, a slope of different gradient, slope M₂, is started and also begins to rise. The new on time for the current cycle begins at time T Over time slopes M-, and M₂ will intersect at time T₃ this is monitored by using the comparator and this is then used as the end of the on cycle and beginning of the next constant off cycle. It will be noted that there is a small time delay involved from the point of intersection of the two slopes and the actual end of the new on time period, shown by time T₄. This is largely due to speed of comparator and other components in the circuit.

In operation, a comparison result is held in the hold circuit 20 and fed to the logic circuit 21 at the end of the off time. Due to the peak detector, the converter maintains the output voltage at the reference level also in the discontinuous conduction mode.

The actual form of pulse control is irrelevant. Thus V_E becomes :-

V_E = (Vsw-Vin)*K1-V_D-Vref where

Vsw - voltage on switch during off time

Vin - input voltage

K1 gain

V_D - rectifier voltage

Vref - reference voltage

It will be appreciated that essentially to vary the system in the present invention, the on time of the pulse wave has been varied with constant off time which effectively varies the frequency. It will be appreciated that the on time could be constant and the off time could be varied. Similarly, it would also be possible to vary on and off time simultaneously with varied frequency or constant frequency. All of these are irrelevant and any method of control may be used.

It is possible to calculate the on-time using a single slope in real time. Fig. 4 shows the signals for a variable frequency methodology, constant off-time, t_off. The On-time is initiated at the same instance as SG1. When SG1 exceeds the amplitude of PD1 , the peak detector is reset. Once the peak detector reset signal is low the On-time is terminated. So the calculated On-time, t_on, is the sum of the time taken for SG1 to exceed PD1 plus the fixed reset time of the peak detector. This fixed reset time of the peak detector represents a minimum on-time, or duty cycle limitation for this method.

Referring to Fig. 5 it will be seen that it is possible to move the reset signal to the next off-time of the DC/DC converter. The on-time is terminated when SG1 exceeds PD1. The Peak detector reset signal is activated at the end of the on-time, so the peak detector reset occurs during the off-time. This method removes the minimium on-time or duty cycle limitation of the previous method of Fig. 4.

Both of the methods described with reference to Figs. 4 and 5 are suitable for use in fixed frequency or variable frequency control methodologies. It will also be appreciated that where a diode model is used it is also possible to use a constant voltage source. The diode in the circuit can also be replaced with a mosfet synchronous rectification circuit. It is then the voltage across the mosfet that will be used.

At start-up, the start-up pulses for the switch 4 are provided by the input voltage feeding the logic circuit 21 and the current sense resistor (RIS) 5 senses a current during this magnetising phase and circuit 21 will ensure that the constant off time demagnetising phase is started.

Essentially, with the present invention, what is important is that we are measuring the primary voltage, the waveform that appears on the switch and by manipulating this waveform on the control switch, we derive the actual output voltage from it. This voltage can then be used to control the output cycle by cycle, that is what has not been done before.

In the specification the terms "comprise, comprises, comprised and comprising" or any variation thereof and the terms "include, includes, included and including" or any variation thereof are considered to be totally interchangeable and they should all be afforded the widest possible interpretation.

The invention is not limited to the embodiments hereinbefore described but may be varied in both construction and detail.

Claims

A DC to DC flyback converter (1) of the switch mode type comprising a control switch (4) of an input circuit which applies a pulse waveform to a transformer (2) or choke in which the pulse waveform is width adjusted to control the current applied to a load (6) characterised in that the voltage in the input circuit is sensed and compared with a reference voltage and the input current waveform on the next cycle is adjusted to provide the desired load voltage.

2. A converter (1) as claimed in claim 1, in which, during each off cycle, when the control switch (4) is not conducting, the voltage across the control switch (4) is sensed, compared with a reference voltage and an error voltage obtained and the next cycle of the pulsed waveform is adjusted in response to the error voltage.

3. A converter (1) as claimed in claim 2, in which a primary winding (PW) of a transformer (2) is connected in series with the control switch and the secondary winding (SW) is coupled to a rectifier (7) and a charge capacitor (8) in which there is provided on the primary side a control circuit (10) including a pulse generator (23) to operate the control switch (4), a current sensor (5) connected to the switch (4), said current sensor (5) operating to terminate the output of the pulse generator (23) until the current applied to the primary winding (PW) exceeds a preset level.

A converter (1 ) as claimed in claim 3, in which the error voltage (V_E) is calculated with signal limited where:-

V_E = (Vsw-Vin)*K1-V_D-Vref

where

Vsw - voltage on switch during off time

Vin - input voltage K1 - gain

V_D - rectifier voltage

Vref - reference voltage

A converter (1 ) as claimed in claim 4, in which the error voltage V_E is amplified by a gain added to the shift level voltage, its peak value is measured by a peak value detector and applied to a comparator (18), compared to a saw tooth wave provided by a generator (19) to form a new on time signal held until the end of the off time. 0

A converter (1 ) as claimed in claim 5, in which means are provided such that the on time for the next cycle when calculated is mirrored into the next cycle by use of two slopes and a comparator (18).

5 7. A converter (1 ) as claimed in any preceding claim in which there is a constant off-cycle, at the end of the off-cycle the on-cycle starts and continues until the saw tooth wave voltage and peak detector voltage are the same.

8. A converter (1) as claimed in claim 7 in which when the saw tooth wave o voltage and the peak detector voltage are the same the peak detector starts to reset and the on-cycle continues until the peak detector has reset.

9. A method of operating a DC to DC flyback converter (1 ) of the switch mode type comprising a control switch (4) of an input circuit which applies a pulse 5 waveform to a transformer (2) or choke in which the pulse waveform is width adjusted to control the current applied to a load (6)comprising:

sensing the voltage across the control switch;

o comparing the sensed voltage with a reference voltage;

obtaining an error voltage; and

using the error voltage to adjust the on-time of the next cycle of the pulse waveform.

10. A method as claimed in claim 9 in which during the next off-cycle:

the error voltage of the previous on-cycle is calculated and used to determine the next on-time;

the on-time is mirrored into the next on-cycle to control the length of the on-cycle.

11. A method as claimed in claim 9 in which during the next off-cycle:

the error voltage of the previous on-cycle is calculated and stored;

the next on-cycle begins; and

the stored error voltage is used to determine the duration of the cycle.

12. A method as claimed in any of claims 9 to 11 in which:

the error voltage is used to provide a peak level detector voltage;

a saw tooth waveform is generated;

the saw tooth waveform is compared to the peak detector voltage to provide the on-time.