WO2002015489A3 - Switches and routers, with parallel domains operating at a reduced speed - Google Patents

Switches and routers, with parallel domains operating at a reduced speed Download PDF

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Publication number
WO2002015489A3
WO2002015489A3 PCT/IB2001/001451 IB0101451W WO0215489A3 WO 2002015489 A3 WO2002015489 A3 WO 2002015489A3 IB 0101451 W IB0101451 W IB 0101451W WO 0215489 A3 WO0215489 A3 WO 0215489A3
Authority
WO
WIPO (PCT)
Prior art keywords
routers
switches
count
switch fabric
switching
Prior art date
Application number
PCT/IB2001/001451
Other languages
French (fr)
Other versions
WO2002015489A2 (en
Inventor
Yuanlong Wang
Kewei Yang
Feng Chen Lin
Original Assignee
Conexant Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Conexant Systems Inc filed Critical Conexant Systems Inc
Priority to EP01956728A priority Critical patent/EP1310065A2/en
Priority to AU2001278644A priority patent/AU2001278644A1/en
Publication of WO2002015489A2 publication Critical patent/WO2002015489A2/en
Publication of WO2002015489A3 publication Critical patent/WO2002015489A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478—Provisions for broadband connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1515—Non-blocking multistage, e.g. Clos
    • H04L49/1523—Parallel switch fabric planes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/20—Support for services
    • H04L49/201—Multicast operation; Broadcast operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/20—Support for services
    • H04L49/205—Quality of Service based
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H04L49/254—Centralised controller, i.e. arbitration or scheduling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3045—Virtual queuing

Abstract

Crossbar and queing chips with integrated point-to-point packet-based channel interfaces and resulting high internal aggregate bandwidths are designed as modules for a scalable CIOQ-based switch fabric that supports high-capacity fixed-length cell switching. By aggregating large amounts of traffic onto a single switching chip, the system pin-count and chip-count is dramatically reduced. The switch fabric offers improved switching capacity while operating at sub-unity speedup to relax cell-time requirments.
PCT/IB2001/001451 2000-08-15 2001-08-14 Switches and routers, with parallel domains operating at a reduced speed WO2002015489A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP01956728A EP1310065A2 (en) 2000-08-15 2001-08-14 Switches and routers, with parallel domains operating at a reduced speed
AU2001278644A AU2001278644A1 (en) 2000-08-15 2001-08-14 Switches and routers, with parallel domains operating at a reduced speed

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US64046200A 2000-08-15 2000-08-15
US09/640,462 2000-08-15

Publications (2)

Publication Number Publication Date
WO2002015489A2 WO2002015489A2 (en) 2002-02-21
WO2002015489A3 true WO2002015489A3 (en) 2002-12-12

Family

ID=24568350

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2001/001451 WO2002015489A2 (en) 2000-08-15 2001-08-14 Switches and routers, with parallel domains operating at a reduced speed

Country Status (3)

Country Link
EP (1) EP1310065A2 (en)
AU (1) AU2001278644A1 (en)
WO (1) WO2002015489A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE387828T1 (en) 2004-04-05 2008-03-15 Alcatel Lucent TIME MULTIPLEX LINKS BETWEEN A COUPLING MATRIX AND A PORT IN A NETWORK ELEMENT
US8989009B2 (en) 2011-04-29 2015-03-24 Futurewei Technologies, Inc. Port and priority based flow control mechanism for lossless ethernet
IN2014MN02332A (en) * 2012-04-18 2015-08-14 Zomojo Pty Ltd

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0497097A2 (en) * 1991-01-08 1992-08-05 Nec Corporation Switching system with time-stamped packet distribution input stage and packet sequencing output stage
US5440550A (en) * 1991-07-01 1995-08-08 Telstra Corporation Limited High speed switching architecture
US5832303A (en) * 1994-08-22 1998-11-03 Hitachi, Ltd. Large scale interconnecting switch using communication controller groups with multiple input-to-one output signal lines and adaptable crossbar unit using plurality of selectors
US5982776A (en) * 1995-07-19 1999-11-09 Fujitsu Network Communications, Inc. Multipoint-to-point arbitration in a network switch
US6052373A (en) * 1996-10-07 2000-04-18 Lau; Peter S. Y. Fault tolerant multicast ATM switch fabric, scalable speed and port expansion configurations

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5367520A (en) * 1992-11-25 1994-11-22 Bell Communcations Research, Inc. Method and system for routing cells in an ATM switch

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0497097A2 (en) * 1991-01-08 1992-08-05 Nec Corporation Switching system with time-stamped packet distribution input stage and packet sequencing output stage
US5440550A (en) * 1991-07-01 1995-08-08 Telstra Corporation Limited High speed switching architecture
US5832303A (en) * 1994-08-22 1998-11-03 Hitachi, Ltd. Large scale interconnecting switch using communication controller groups with multiple input-to-one output signal lines and adaptable crossbar unit using plurality of selectors
US5982776A (en) * 1995-07-19 1999-11-09 Fujitsu Network Communications, Inc. Multipoint-to-point arbitration in a network switch
US6052373A (en) * 1996-10-07 2000-04-18 Lau; Peter S. Y. Fault tolerant multicast ATM switch fabric, scalable speed and port expansion configurations

Also Published As

Publication number Publication date
WO2002015489A2 (en) 2002-02-21
EP1310065A2 (en) 2003-05-14
AU2001278644A1 (en) 2002-02-25

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