WO2002031678A3 - System and method for an operating system in a reconfigurable logic device - Google Patents

System and method for an operating system in a reconfigurable logic device Download PDF

Info

Publication number
WO2002031678A3
WO2002031678A3 PCT/GB2001/004551 GB0104551W WO0231678A3 WO 2002031678 A3 WO2002031678 A3 WO 2002031678A3 GB 0104551 W GB0104551 W GB 0104551W WO 0231678 A3 WO0231678 A3 WO 0231678A3
Authority
WO
WIPO (PCT)
Prior art keywords
operating system
reconfigurable logic
logic device
stored
manage
Prior art date
Application number
PCT/GB2001/004551
Other languages
French (fr)
Other versions
WO2002031678A2 (en
Inventor
Alex Wilson
Munther Hindi
Original Assignee
Celoxica Ltd
Alex Wilson
Munther Hindi
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Celoxica Ltd, Alex Wilson, Munther Hindi filed Critical Celoxica Ltd
Priority to AU2001295716A priority Critical patent/AU2001295716A1/en
Publication of WO2002031678A2 publication Critical patent/WO2002031678A2/en
Publication of WO2002031678A3 publication Critical patent/WO2002031678A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Hardware Redundancy (AREA)
  • Stored Programmes (AREA)

Abstract

In accordance with the invention, a system that utilizes an operating system stored in reconfigurable logic is provided. The system includes a reconfigurable logic device that has at least a portion of an operating system stored on it. The operating system is operable to manage one or multiple hardware and/or software processes. A method for controlling processes of a system is also provided. According to the method, an operating system is initiated. At least a portion, and preferably all, of the operating system is stored on a reconfigurable logic device. The operating system is utilized to manage at least one hardware and/or software process including applications.
PCT/GB2001/004551 2000-10-12 2001-10-11 System and method for an operating system in a reconfigurable logic device WO2002031678A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2001295716A AU2001295716A1 (en) 2000-10-12 2001-10-11 System and method for an operating system in a reconfigurable logic device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US68718600A 2000-10-12 2000-10-12
US09/687,186 2000-10-12

Publications (2)

Publication Number Publication Date
WO2002031678A2 WO2002031678A2 (en) 2002-04-18
WO2002031678A3 true WO2002031678A3 (en) 2003-12-31

Family

ID=24759423

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB2001/004551 WO2002031678A2 (en) 2000-10-12 2001-10-11 System and method for an operating system in a reconfigurable logic device

Country Status (2)

Country Link
AU (1) AU2001295716A1 (en)
WO (1) WO2002031678A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1300734C (en) * 2004-11-10 2007-02-14 中国人民解放军国防科学技术大学 Initial information element production method in ant optimizing software and hardware classification

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5970254A (en) * 1997-06-27 1999-10-19 Cooke; Laurence H. Integrated processor and programmable data path chip for reconfigurable computing
WO2000031652A2 (en) * 1998-11-20 2000-06-02 Altera Corporation Reconfigurable programmable logic device computer system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5970254A (en) * 1997-06-27 1999-10-19 Cooke; Laurence H. Integrated processor and programmable data path chip for reconfigurable computing
WO2000031652A2 (en) * 1998-11-20 2000-06-02 Altera Corporation Reconfigurable programmable logic device computer system

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
BREBNER G: "Circlets: circuits as applets", FPGAS FOR CUSTOM COMPUTING MACHINES, 1998. PROCEEDINGS. IEEE SYMPOSIUM ON NAPA VALLEY, CA, USA 15-17 APRIL 1998, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 15 April 1998 (1998-04-15), pages 300 - 301, XP010298168, ISBN: 0-8186-8900-5 *
MERINO P ET AL: "A methodology for task based partitioning and scheduling of dynamically reconfigurable systems", FPGAS FOR CUSTOM COMPUTING MACHINES, 1998. PROCEEDINGS. IEEE SYMPOSIUM ON NAPA VALLEY, CA, USA 15-17 APRIL 1998, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 15 April 1998 (1998-04-15), pages 324 - 325, XP010298205, ISBN: 0-8186-8900-5 *

Also Published As

Publication number Publication date
WO2002031678A2 (en) 2002-04-18
AU2001295716A1 (en) 2002-04-22

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