WO2002031879A3 - Select transistor architecture for a virtual ground non-volatile memory cell array - Google Patents

Select transistor architecture for a virtual ground non-volatile memory cell array Download PDF

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Publication number
WO2002031879A3
WO2002031879A3 PCT/US2001/024679 US0124679W WO0231879A3 WO 2002031879 A3 WO2002031879 A3 WO 2002031879A3 US 0124679 W US0124679 W US 0124679W WO 0231879 A3 WO0231879 A3 WO 0231879A3
Authority
WO
WIPO (PCT)
Prior art keywords
cell array
virtual ground
memory cell
volatile memory
select transistor
Prior art date
Application number
PCT/US2001/024679
Other languages
French (fr)
Other versions
WO2002031879A2 (en
Inventor
Richard M Fastow
Mark W Randolph
Shane C Hollmer
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Priority to AU8314701A priority Critical patent/AU8314701A/en
Publication of WO2002031879A2 publication Critical patent/WO2002031879A2/en
Publication of WO2002031879A3 publication Critical patent/WO2002031879A3/en

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0491—Virtual ground arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G11C16/0475—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] comprising two or more independent storage sites which store independent data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits

Abstract

A bit line selector (902) for a virtual ground non-volatile read only memory ('NROM') cell array (904) is disclosed. The selector transistors (840, 842) are oriented such that the channel (818, 820) length is perpendicular to the bit line (802, 806, 810) and the channel (818, 820) width is parallel to the bit line (802, 806, 810). subsequent reduction in the bit line (802, 806, 820) width of the select transistors (840, 842) or their drive current.
PCT/US2001/024679 2000-10-11 2001-08-06 Select transistor architecture for a virtual ground non-volatile memory cell array WO2002031879A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU8314701A AU8314701A (en) 2000-10-11 2001-08-06 Select transistor architecture for a virtual ground non-volatile memory cell array

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/686,685 2000-10-11
US09/686,685 US6477083B1 (en) 2000-10-11 2000-10-11 Select transistor architecture for a virtual ground non-volatile memory cell array

Publications (2)

Publication Number Publication Date
WO2002031879A2 WO2002031879A2 (en) 2002-04-18
WO2002031879A3 true WO2002031879A3 (en) 2002-07-04

Family

ID=24757308

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/024679 WO2002031879A2 (en) 2000-10-11 2001-08-06 Select transistor architecture for a virtual ground non-volatile memory cell array

Country Status (4)

Country Link
US (1) US6477083B1 (en)
AU (1) AU8314701A (en)
TW (1) TWI271745B (en)
WO (1) WO2002031879A2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4083975B2 (en) * 2000-12-11 2008-04-30 株式会社ルネサステクノロジ Semiconductor device
US6657894B2 (en) * 2002-03-29 2003-12-02 Macronix International Co., Ltd, Apparatus and method for programming virtual ground nonvolatile memory cell array without disturbing adjacent cells
TWI277096B (en) * 2004-07-02 2007-03-21 Elan Microelectronics Corp Flat-cell read only memory suitable for word line strap
KR100632953B1 (en) * 2005-03-07 2006-10-12 삼성전자주식회사 Memory device, memory array architecture for the memory device and operation of the memory array architecture
US7190605B1 (en) * 2005-09-30 2007-03-13 Infineon Technologies Flash Gmbh & Co. Kg Semiconductor memory and method for operating a semiconductor memory comprising a plurality of memory cells
US7593264B2 (en) * 2006-01-09 2009-09-22 Macronix International Co., Ltd. Method and apparatus for programming nonvolatile memory
US7881121B2 (en) * 2006-09-25 2011-02-01 Macronix International Co., Ltd. Decoding method in an NROM flash memory array
US8619471B2 (en) * 2011-07-27 2013-12-31 Micron Technology, Inc. Apparatuses and methods including memory array data line selection

Citations (3)

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EP0580467A2 (en) * 1992-07-24 1994-01-26 Sundisk Corporation Segmented column memory array
US5319593A (en) * 1992-12-21 1994-06-07 National Semiconductor Corp. Memory array with field oxide islands eliminated and method
WO1995030244A1 (en) * 1994-04-28 1995-11-09 Nvx Corporation Non-volatile memory with field shield

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US4870471A (en) * 1982-09-30 1989-09-26 Mitsubishi Denki Kabushiki Kaisha Complementary metal-oxide semiconductor integrated circuit device with isolation
GB2157489A (en) 1984-03-23 1985-10-23 Hitachi Ltd A semiconductor integrated circuit memory device
US5077691A (en) 1989-10-23 1991-12-31 Advanced Micro Devices, Inc. Flash EEPROM array with negative gate voltage erase operation
US5280446A (en) 1990-09-20 1994-01-18 Bright Microelectronics, Inc. Flash eprom memory circuit having source side programming
US5218569A (en) * 1991-02-08 1993-06-08 Banks Gerald J Electrically alterable non-volatile memory with n-bits per memory cell
JP3358663B2 (en) 1991-10-25 2002-12-24 ローム株式会社 Semiconductor storage device and storage information reading method thereof
EP0690452A3 (en) 1994-06-28 1999-01-07 Advanced Micro Devices, Inc. Electrically erasable memory and method of erasure
US5517448A (en) * 1994-09-09 1996-05-14 United Microelectronics Corp. Bias circuit for virtual ground non-volatile memory array with bank selector
DE19505293A1 (en) 1995-02-16 1996-08-22 Siemens Ag Multi-value read-only memory cell with improved signal-to-noise ratio
US5617357A (en) 1995-04-07 1997-04-01 Advanced Micro Devices, Inc. Flash EEPROM memory with improved discharge speed using substrate bias and method therefor
US5629893A (en) 1995-05-12 1997-05-13 Advanced Micro Devices, Inc. System for constant field erasure in a flash EPROM
EP0810606B1 (en) * 1996-05-13 2003-11-12 STMicroelectronics S.r.l. Column multiplexer
US5768192A (en) 1996-07-23 1998-06-16 Saifun Semiconductors, Ltd. Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping
US5675537A (en) 1996-08-22 1997-10-07 Advanced Micro Devices, Inc. Erase method for page mode multiple bits-per-cell flash EEPROM
US5790456A (en) 1997-05-09 1998-08-04 Advanced Micro Devices, Inc. Multiple bits-per-cell flash EEPROM memory cells with wide program and erase Vt window
US6768165B1 (en) 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
JP3211745B2 (en) * 1997-09-18 2001-09-25 日本電気株式会社 Semiconductor storage device
US5888867A (en) 1998-02-13 1999-03-30 Advanced Micro Devices, Inc. Non-uniform threshold voltage adjustment in flash eproms through gate work function alteration
JP2000101050A (en) * 1998-09-22 2000-04-07 Nec Corp Semiconductor memory device and layout method of memory cell

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0580467A2 (en) * 1992-07-24 1994-01-26 Sundisk Corporation Segmented column memory array
US5319593A (en) * 1992-12-21 1994-06-07 National Semiconductor Corp. Memory array with field oxide islands eliminated and method
WO1995030244A1 (en) * 1994-04-28 1995-11-09 Nvx Corporation Non-volatile memory with field shield

Also Published As

Publication number Publication date
US6477083B1 (en) 2002-11-05
AU8314701A (en) 2002-04-22
WO2002031879A2 (en) 2002-04-18
TWI271745B (en) 2007-01-21

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