WO2002043268A2 - Power line communication system - Google Patents
Power line communication system Download PDFInfo
- Publication number
- WO2002043268A2 WO2002043268A2 PCT/CA2001/001642 CA0101642W WO0243268A2 WO 2002043268 A2 WO2002043268 A2 WO 2002043268A2 CA 0101642 W CA0101642 W CA 0101642W WO 0243268 A2 WO0243268 A2 WO 0243268A2
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- WIPO (PCT)
- Prior art keywords
- frequency
- carrier
- signal
- power
- carrier frequency
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/54—Systems for transmission via power distribution lines
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2203/00—Indexing scheme relating to line transmission systems
- H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
- H04B2203/5404—Methods of transmitting or receiving signals via power distribution lines
- H04B2203/5425—Methods of transmitting or receiving signals via power distribution lines improving S/N by matching impedance, noise reduction, gain control
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2203/00—Indexing scheme relating to line transmission systems
- H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
- H04B2203/5429—Applications for powerline communications
- H04B2203/5433—Remote metering
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2203/00—Indexing scheme relating to line transmission systems
- H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
- H04B2203/5429—Applications for powerline communications
- H04B2203/5437—Wired telephone
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2203/00—Indexing scheme relating to line transmission systems
- H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
- H04B2203/5429—Applications for powerline communications
- H04B2203/5445—Local network
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2203/00—Indexing scheme relating to line transmission systems
- H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
- H04B2203/5462—Systems for power line communications
- H04B2203/5483—Systems for power line communications using coupling circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2203/00—Indexing scheme relating to line transmission systems
- H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
- H04B2203/5462—Systems for power line communications
- H04B2203/5491—Systems for power line communications using filtering and bypassing
Definitions
- This invention relates generally to power line communications systems. In a particular embodiment, it relates to a power line communication system for use in communicating through a distribution transformer.
- Power line or "carrier-current" communication systems employ existing alternating current power lines to transfer information which would normally require an additional hard wire installation.
- Power line communication systems are well-known and extensively used.
- power line communication systems which are capable of communicating through a distribution transformer must overcome both the attenuation of high carrier frequencies due to the impedance of the distribution transformer and the noise on power lines at lower frequencies.
- the transmitters tend to be expensive, bulky and power hungry and require special installation.
- the transmitter may be small, but the receiver is bulky and expensive and the system is not capable of sending and receiving data at a useful rate.
- Frequency shift keying is a known power line communication technique wherein the transmitter modulates a reference frequency signal based upon the data to be transmitted, so that the transmitted signal has a frequency which is either higher or lower depending on whether a logic 1 or a logic 0 is being transmitted.
- the receiver is designed to demodulate the transmitted FSK signal to produce a serial data stream at a predetermined rate (baud rate).
- baud rate a predetermined rate
- the nominal power line frequency can be used.
- U.S. Patent No. 4,556,866 issued to Gorecki.
- U.S. Patent No. 4,556,866 suffers from the disadvantage of using a phase locked loop in conjunction with the power line frequency in order to generate the reference frequency.
- Phase locked loops are a source of noise, are prone to instability, and are sensitive to component values which can change with temperature and age. These disadvantages make it undesirable to use a phase locked loop in a FSK transmitter designed to communicate through a distribution transformer.
- the power line frequency as a reference makes it easier to reduce the impact of one the major sources of noise at lower frequencies, namely deviations from the nominally sinusoidal nature of the power waveform which are manifested in the frequency spectrum as harmonic components. Performance of the data communications system may be drastically reduced if a carrier frequency is chosen equal or close in frequency to one of these harmonics. Furthermore, the harmonics change in frequency when the power frequency changes, so that it is more likely that a harmonic will accidentally align with the carrier frequency.
- the carrier frequency can be selected so as not to be in frequency with a power line harmonic. Also, the carrier frequency can float with the power-line frequency so as to follow variations in it, thereby ensuring that the carrier frequency is not at the same frequency as any power line harmonics even if the power-line frequency changes.
- Known power line communication system transmitters use amplifier circuits in which the design is optimized for parameters not related to energy efficiency.
- the presence of energy losses results in heat dissipation, which requires additional energy for producing the signal, but more significantly results in a larger physical size being required for the transmitter. This is needed to provide the extra surface area required to remove the heat without high temperatures developing which could cause failure of the device.
- efficiency of the amplifier can be improved through the use of switch mode amplifiers instead of the more common but less efficient linear amplifiers, but even such devices will not achieve the best efficiency for a power line signal transmitter if they are optimized for parameters that are not relevant to this purpose.
- a resonant circuit comprises one or more inductors and one or more capacitors either in series or in parallel so that energy is transferred back and forth between the inductors and capacitors in a cyclic manner at the power line carrier frequency, in a manner that is analogous to the way a weight bobs up and down when suspended by a spring.
- electrical resonance is achieved by selecting the inductor and the capacitor such that:
- quartz crystal oscillator based digital frequency synthesis allows the frequency pass bands to be set much more accurately. However, the accuracy is still limited by the accuracy of the quartz crystal oscillator which also may be affected by temperature and other factors. Digital signal processing methods may also suffer from digitization errors, particularly if the signal level is small in comparison with the voltage resolution of the analog-to-digital converter that is used. The effect of this is to increase the need for averaging, thereby reducing the data rate achievable.
- One advantage of such a communication scheme would be to facilitate transfer of routine and relatively small quantities of date to individual customers or electrical utility, including both residential and industrial customers of an electrical utility, including both residential and industrial customers. Indeed, one expected usage is reading of electricity meters, to enable recording of the amount of electricity used and generation of bills. Currently, reading of meters has to be done manually, wr-- h is time consuming and expensive, and if, for example, a residential or other customer is not available, the meter may not be at an external location for reading.
- the quantity of data, to be transmitted is, by telecommunication standards, low, so that it is possible to consider collecting and transmitting data for various devices together.
- a power line communications system for use in communication of data over power lines, including through a distribution transformer and capable of being installed by plugging into a wall outlet, said power line communications system comprising:
- modulator means which causes a carrier frequency to be digitally calculated from the nominal power-line frequency and selected to be a modulated non-integer multiple of the power-line frequency in accordance with the data signal being sent from time to time;
- FIG. 1. is a block diagram of an implementation of a bi-directional power line data communication system, according to the present invention.
- FIG. 2. is a schematic diagram of a power line data transmitter according to the present invention.
- FIG. 3. is a schematic diagram of a power line data receiver according to the present invention.
- FIG.4. is a flow chart of the algorithm implemented by the microcontroller shown in the transmitter in FIG. 2. and by the microcontroller in the receiver in FIG. 3 according to the present invention.
- FIG. 5 is a schematic diagram of an alternate embodiment of a power line data transmitter to that shown in FIG.2, also according to the present invention.
- FIG. 1 shows a portion of a typical high voltage electrical power distribution system 10, with distribution transformers 11 and
- the three wire transmission line voltage 14 for example in the range of 25 kV to 500 kV, and commonly in North
- America at 69 kV is stepped down and supplied to the distribution transformers 11 and 12 via the four wire power line 15, which, for example, is at voltage in the range 8 kV to 35 kV, and commonly in North America at 25 kV.
- the houses 16 and 17 are supplied with electrical power at voltage which is stepped down from the power line voltage by the distribution transformers 11 and 12. In North America two of the three phases are stepped down to 240V between phases and 120V for one phase.
- a power line-to-telephone interface unit 19 includes a power line data transmitter according to the present invention, a power line data receiver according to the present invention and a telephone data interface circuit commonly known as a modem.
- the interface unit 19 is connected to an ordinary electrical power outlet 20 by a power cord 21.
- the electrical power outlet 20 is connected to the secondary side of the distribution transformer 18.
- the interface unit 19 is also connected to the telephone line 22 by a telephone cord 23.
- a power line data transmitter and a power line data receiver both according to the present invention are also located.
- a single unit including both the transmitter and the receiver is provided for each customer. It will also be appreciated that, although residential installations are shown schematically in Figure 1, such units can . be located at any meter, e.g. an industrial customer, and for some uses could even be located at sites without electricity meters.
- An electrical utility computer (not shown), is located anywhere where there is access to a telephone line (not shown), and, in use, dials up the power line-to- telephone interface unit 19, via the telephone line 22, and causes the transmitter of the interface unit 19 to send data in the form of an instruction to be sent down power line 15, for example, to the data receiver at the electricity meter 24 of house 16.
- An example of a typical instruction is a request for a meter reading.
- the power line data transmitter located at the electricity meter 24 of house 16 could then transmit the meter reading back along the power line 15. Again, this would be encoded so that only the receiver at the interface unit 19 would respond to the data sent in response to the meter reading request.
- the power line-to-telephone interface unit 19 in turn transmits the data by telephone back to the electrical utility computer (not shown). In the process of this data communication, the data signal has had to pass through the distribution transformer 18 and the distribution transformer 11 in both directions.
- the power line-to-telephone interface unit 19 could also communicate with a power line monitor 26 which collects data on power flow, as well as monitor and control other devices.
- a carrier frequency generator which generates a carrier frequency signal using a computing device which can be synchronized to the power line at the synch input to the computing device 40.
- the circuit applies the carrier frequency signal to the power line to transmit the data.
- the circuit has a data input 30 for receiving a data signal.
- a capacitor 31 and an inductor 32 are connected in series to form a reactive network across the secondary side of the distribution transformer.
- the capacitor 31 and inductor 32 can have values of luF and 2.76 mH to give a resonant frequency of 3.03 kHz.
- An additional inductor 33 and capacitor 34 are connected in series to form an additional reactive network.
- One outside terminal of capacitor 34 is connected to the junction between the first inductor
- capacitor 31 and inductor 32 are chosen such that resonance is achieved in this reactive network at the selected carrier frequency. (Selection of the carrier frequency is detailed below).
- inductor 33 and capacitor 34 because one of the field effect transistors 38 or 39, is turned on. The other half of the time both field effect transistors are turned off and no circuit is made through inductor 33 and capacitor 34.
- the effect of inductor 33 and capacitor 34 is to control the energy which flows through the field effect transistors 38 and 39. If inductor 33 and capacitor 34 were to be replaced by a direct connection between field effect transistors 38 and 39 and the first inductor 32 and the first capacitor 31, the resulting energy flow would be greater and field effect transistors 38 and 39 may overheat. If inductor 33 and capacitor 34 were replaced by a resistor of sufficient resistance to protect field effect transistors 38 and 39 heat loss in said resistor would reduce the energy efficiency of the circuit.
- a less efficient circuit would be larger and heavier than that which is disclosed in the preferred embodiment. If, instead of the resistor, a sole capacitor were used in place of inductor 33 and capacitor 34, and the capacitor had an appropriate value, it may be able to control the said energy flow through field effect transistors 38 and 39, with less loss than using a resistor. However, due to the performance characteristics of capacitors, if a capacitor were used to control energy flow, current would spike whenever either field effect transistor 38 or 39, were turned on. These current spikes would cause additional heating in the field effect transistors 38 and 39 as heating is proportional to the square of the current. As a result, field effect transistors 38 and 39 could require heat sinks to dissipate this additional heat.
- inductor 33 and capacitor 34 are used to control the flow of energy through said field effect transistors 38 and 39 (as is done in the present embodiment) a high degree of energy efficiency is achieved.
- field effect transistor 38 When field effect transistor 38 is turned on, the current through transistor 38 builds in a controlled manner until it is impeded by the charge in capacitor 34. Once so impeded, the current through transistor 38 decreases again until said capacitor 34 is fully charged, by which point field effect transistor 38 turns off.
- field effect transistor 39 turns on, the current through it builds up in a controlled manner, but flows in the opposite direction through inductor 33 and capacitor 34, assisted by the charge on said capacitor 34. Again, this continues until impeded by the charge in capacitor 34, which occurs at the point when it becomes charged with the opposite polarity.
- a diode 35 rectifies the stepped down voltage power input 36 (120
- VAC for one phase in the United States and Canada
- inductor 32 charges up the capacitor 37; as shown the inductor 32 is connected to the neutral line.
- inductor 33 which can have a value of 7.6 mH
- capacitor 34 which can have a value of 1/10 of capacitor 31, regulates cunent flow to inductor 32 as described previously.
- the field effect transistor 38 is connected between the capacitor 37 and one terminal of the inductor 33, and correspondingly a field effect transistor 39 is connected between the neutral line and the same terminal of the inductor 33.
- Field effect transistors 38 and 39 are alternately switched on and off at the earner frequency by a computing device, such as a microcontroller 40, through field effect transistor driver 41 and field effect transistor driver 42 respectively, such that they are never simultaneously turned on, and such that excitation energy is added at the carrier/resonant frequency, as detailed below.
- a computing device such as a microcontroller 40
- field effect transistor driver 41 and field effect transistor driver 42 respectively, such that they are never simultaneously turned on, and such that excitation energy is added at the carrier/resonant frequency, as detailed below.
- the field effect transistors 38 & 39 are either fully on or fully off, and because there are no current spikes flowing through them, the amount of heat dissipation in them is low.
- Inductor 33 prevents current spikes by spreading the current flow into capacitor 34 over 1/4 of a cycle, thereby reducing heat dissipation in field effect transistors 38 & 39.
- Resistor 43 provides the microcontroller 40 with a synchronization signal at the power-line frequency so that the carrier frequency can be linked mathematically to the power-line frequency.
- the capacitor 44 helps to attenuate any spikes, which could otherwise interfere with the carrier frequency accuracy.
- the zener diodes 45 and 46 serve to limit the voltage input to the microcontroller 40 to a specified voltage range.
- An algorithm in microcontroller 40 modulates the carrier frequency according to a mathematical function of the power-line frequency and the data being transmitted.
- a receiver circuit 50 which includes a demodulator to demodulate the carrier frequency signal and recover the data.
- the power line signal is received at 49 and passes through a band pass filter 51 which allows a narrow band of frequencies to pass, including the carrier frequency, for example in a range of 2.8 kHz to 3.26 kHz.
- the power line signal is fed through resistor 52 to a computing device shown as microcontroller 53, to provide the microcontroller 53 with a synchronization signal at the power-line frequency.
- Zener diodes 54 and 55 serve to limit the voltage input to the microcontroller 53 to a specified voltage range.
- the capacitor 56 helps to attenuate any spikes, which could otherwise interfere with the accuracy of the carrier decode frequency.
- the microcontroller 53 controls a solid state switch 57 and a solid state switch 58 such that they turn on and off alternately at the carrier decode frequency to change the polarity of the output of operational amplifier 59.
- the switches 57 and 58 could again be field effect transistors or transmission gates such as RCA CD4066.
- solid state switch 57 is turned on and solid state switch 58 is turned off, the positive input of operational amplifier 59 is connected to 5 volts through resistor 60.
- Resistor 61 acts as the input resistor while resistor 62 acts as the feedback resistor, and the operational amplifier 59 acts as an inverting amplifier for the signal coming from the band pass filter 51.
- the signal from the band pass filter 51 is routed directly to the positive input of the operational amplifier 59.
- Resistor 62 then acts as a connection between the negative input and the output of the operational amplifier 59, which therefore acts as a non-inverting amplifier for the signal coming from the band pass filter 51.
- the output of the operational amplifier 59 is fed into a low pass filter 63 which averages the output of the operational amplifier 59.
- the output of said filter is an analog voltage related to the relative phase between the transmitted carrier frequency signal and the carrier decode signal from the microcontroller 53 which controls the solid state switches 57 and 58. For example, if the two signals are in phase the output voltage of the low pass filter 63 will be high.
- the output voltage of the low pass filter 63 will be low. If the two signals are 90° out of phase the output voltage will be at the halfway point, which in the preferred embodiment is 5 volts.
- the output of the low pass filter 63 is fed into the frequency selector input 64 of the microcontroller.53.
- the carrier decode signal frequency is linked mathematically to the line frequency with the same algorithm used in the transmitter microcontroller, as detailed with respect to FIG. 4. In the preferred embodiment, when the output of the low pass filter 63 is greater than 5 volts the frequency selector input will be a logic 1 or high, when it is less than 5 volts it will be considered to be a logic 0 or low.
- the decode frequency When the frequency selector input 64 is high, the decode frequency will be the lower of the two possible frequencies. If the data input of the transmitter is also high, the transmitter will also transmit the lower of the two possible carrier frequencies. If the transmitted carrier frequency matches the receiver carrier decode frequency, the phase difference between them will remain constant. Therefore, the output of the low pass filter 64 and the data input to the transmitter 30 will remain at the same level, at logic 1. When the data input at the transmitter 30 changes, to low or logic 0, the transmitted carrier frequency will change, becoming the other of the two frequencies, in the preferred embodiment, this is the higher of the two possible frequencies. When this happens, the transmitted carrier frequency will be different from the receiver carrier decode frequency and the relative phase between the two signals will begin to change. The greater the difference between the two frequencies, the faster the relative phase will change.
- the output of the low pass filter 64 As the relative phase between the two signals changes, so does the output of the low pass filter 64. After a certain period of time, the length of which depends on the difference between the two frequencies and the time constant for the low pass filter, the output of the low pass filter will change from high or logic 1 to low or logic 0. This in turn will cause the decode frequency to change to the other one of the possible two frequencies.
- the relative phase will remain the same when the frequency shifts because the circuit uses coherent frequency shift keying.
- the frequency selector input 64 will again match the data input at the transmitter and the frequencies will again match. Once the frequencies match again, the relative phase between the two signals will remain constant allowing the output from the low pass filter 64 to remain at logic 0. In this way, the frequency selector input 64 is caused to match the transmitter data input 30, and thus a data signal is transmitted.
- the analog means used for signal capture in this invention provides high resolution and therefore high information efficiency for low level signals, while the digital means for maintaining frequency control provides high accuracy, thereby minimizing signal loss due to frequency error. Additionally, because the carrier frequency is proportional to the power frequency, noise caused by the harmonics of the power frequency can be avoided by choosing a carrier frequency to be mid-way between two harmonics.
- two flow diagrams 65 and 66 are given to show the algorithm which causes the carrier frequency to be generated from the power-line frequency.
- the microcontroller for the transmitter executes both diagrams simultaneously and continuously. This is possible because each diagram has . a step where the microcontroller is instructed to wait either for a specified period of time, or for a synch input signal. During the waiting period of one flow diagram, the microcontroller can be executing instructions in the other flow diagram. At step 67 the microcontroller waits for a rising edge at the power-line frequency at the synch input.
- the time value is stored in T Crude
- the previous time value is subtracted from this time value to yield P 6Q , being the period of the power-line frequency (which is nominally 60Hz in the United States and Canada).
- P ⁇ is averaged together with P AV which is the average of the previous periods of the power-line frequency.
- a l/256th of R 60 is added to 255/256 ths of the previous average P AV to yield the new average P A V .
- the weighted average P AV of the period of the power-line frequency is continuously updated as new rising edges are received at the microcontroller synch input.
- P c the period of the carrier frequency, is calculated by dividing P AV by a constant, in this case 50.5, to give a carrier frequency of 3030 Hz.
- This constant can be any number, within limits, provided that the transmitter and the receiver use the same number.
- An additional consideration is the presence of power line harmonic frequencies which can greatly reduce the signal-to-noise ratio. These harmonic frequencies appear at integer multiples of the power-line frequency.
- the carrier frequency can be placed in between two harmonics. Then, as the power-line frequency changes, and with it the harmonic frequencies, the carrier frequency will also be changed in a direction to keep the carrier in between the harmonics.
- the data input is checked. If it is high (logic "I"), then an additional constant, in this case 109 nanoseconds, is added to P c at step 72 thereby causing the carrier frequency to become 3029 Hz. If the data input is low (logic "0"), then step 72 is omitted, and the carrier frequency is therefore 3030 Hz.
- the algorithm provides frequency modulation of the data appearing at the data input of the microcontroller.
- step 73 the time value for the most recent rising edge is loaded into the T n _, register in preparation for the next rising edge being loaded into the T n register.
- the algorithm then loops back to step 67 and the process is repeated.
- the microcontroller executes the instructions in the flow diagram 65.
- the microcontroller waits for a period of time of 1/4 P c before setting output "B" to a logic "I” at step 75.
- the microcontroller waits for the same period of time before setting output "B” to a logic "0".
- steps 78 to 81 the same process is repeated for output "A" which is therefore 180° out of phase with output "B", thereby producing the waveforms 83 and 84 at the carrier frequency.
- the transmitter could utilize only one resonant circuit. For example, minimization of current voltage and spikes could be achieved through the use of the second resonant circuit described in the preferred embodiment without the use of the first resonant circuit across the secondary of the transformer.
- FIG. 5 Such alternate embodiment of a transmitter in accordance with the present invention is shown in FIG. 5.
- the second resonant circuit controls current and voltage transients through the transistors 38, 39 and promotes efficient coupling of the carrier signal.
- the first resonant circuit that would further promote efficient coupling of the carrier signal, is no longer present. This arrangement might be suitable to cost-sensitive applications. It is to be understood that no limitation with respect to the specific methods and apparatus illustrated herein is intended or should be inferred.
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002429581A CA2429581C (en) | 2000-11-24 | 2001-11-23 | Device for sending and receiving data through power distribution transformers |
AU2002220401A AU2002220401A1 (en) | 2000-11-24 | 2001-11-23 | Power line communication system |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/718,504 | 2000-11-24 | ||
US09/718,504 US6549120B1 (en) | 2000-11-24 | 2000-11-24 | Device for sending and receiving data through power distribution transformers |
Publications (3)
Publication Number | Publication Date |
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WO2002043268A2 true WO2002043268A2 (en) | 2002-05-30 |
WO2002043268A3 WO2002043268A3 (en) | 2002-10-31 |
WO2002043268B1 WO2002043268B1 (en) | 2003-02-20 |
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Application Number | Title | Priority Date | Filing Date |
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PCT/CA2001/001642 WO2002043268A2 (en) | 2000-11-24 | 2001-11-23 | Power line communication system |
Country Status (4)
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US (1) | US6549120B1 (en) |
AU (1) | AU2002220401A1 (en) |
CA (1) | CA2429581C (en) |
WO (1) | WO2002043268A2 (en) |
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CA2429581C (en) | 2008-05-06 |
AU2002220401A1 (en) | 2002-06-03 |
US6549120B1 (en) | 2003-04-15 |
WO2002043268B1 (en) | 2003-02-20 |
WO2002043268A3 (en) | 2002-10-31 |
CA2429581A1 (en) | 2002-05-30 |
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