WO2002076054A1

WO2002076054A1 - Point-to-multipoint communication system with pre-distorsion and decision feedback equalizer to reduce interpacket interferences

Info

Publication number: WO2002076054A1
Application number: PCT/GB2002/001252
Authority: WO
Inventors: John D. Porter; David Benedict Crosby; Stephen David Greaves
Original assignee: Cambridge Broadband Limited
Priority date: 2001-03-16
Filing date: 2002-03-15
Publication date: 2002-09-26
Also published as: GB2373421B; GB2373421A; GB0106606D0

Abstract

A packet based point to multipoint wireless transmission system comprises an access point (AP, 100) communicating with a plurality of subscriber units (Sus, 101). At each SU each packet to be transmitted is linearly pre-distorted (116) to remove pre-cursors. A non-linear decision feedback equaliser (131) including a transversal feedback filter is provided at the (AP) to reduce inter-symbol interferences. The feedback filter is arranged to hold symbol decisions made for all packets received during a given period prior to the packet being currently received to enable inter-packet interference to be reduced in the same manner as inter-symbol interference. The given period is arranged to extend for a period to accommodate the largest channel excess delay spread.

Description

POINT-TO-MULTIPOINT COMMUNICATION SYSTEM WITH PRE-DISTORTION AND DECISION FEEDB AC EQUALIZER TO REDUCE INTERPACKET INTERFERENCES

The invention relates to a packet based wireless communication system, to a method of communication in such 5 a system, and to a receiver for use in such a system.

The invention has particular application in a point to multipoint system where a central access point communicates with a plurality of subscriber units. In such a system the access point may communicate with the

10 plurality of subscribers by means of a frequency division duplex arrangement, that is the access point transmits to all the subscriber units on one frequency while all the subscriber units respond to the access point on a different frequency by means of a time division multiple

15 access protocol . Thus the access point broadcasts to all the subscriber units within a given area and each subscriber unit will then transmit a response directly to the access point . As each subscriber unit transmits to the access point using the same frequency it is necessary

20 that the individual subscriber units transmit at different time allocated by means of a time division multiple access protocol . Consequently, it is desirable that the individual subscriber upstream transmissions are spaced as close together as possible in order to achieve maximum

25 system efficiency. In practice, each subscriber unit is presented with a radio channel having a distinct impulse response. Under such conditions, the post and pre-cursors of a data packet from one subscriber unit caused by that subscriber unit's channel impulse response can interfere with the data packets transmitted by the other subscriber units, as well as its own later transmissions.

Figure 1 illustrates in block schematic form a point to multipoint transmission system comprising an access point AP which communicates with two subscriber units SUl and

SU2. In this particular system the transmission protocol is by frequency division multiplex between the AP and each SU and by time division multiplex between the different SUs and the AP. Also shown in Figure 1 are sample channel responses from each of the SUs to the AP. Thus transmissions from SUl to the AP are over a channel having the channel response labelled channel 1 and transmissions from SU2 to the AP are over a channel having the channel response labelled channel 2. From these responses it can be seen that there is a main transmission which is the largest peak which is preceded by a number of pre-cursors and followed by a number of post cursors. These pre and post-cursors are formed from different physical paths between the SUs and AP, the main channel being the path which has the lowest attenuation.

Figure 2 illustrates how the various data packets and their pre-cursors and post-cursors will interfere in a system such as that shown in Figure 1 when neither guard bands nor delay equalisation is provided. The example illustrated in Figure 2 shows subscriber unit SUl transmitting a first packet then subscriber unit SU2 transmitting a first packet and finally subscriber unit SUl transmitting a second packet. Figure 2 illustrates the packets of data as received at the access point AP from the subscriber units SUl and SU2 when the channels have the impulse responses shown in Figure 1. The lines A and B in Figure 2 mark the beginning and end of packet 1 as received by the AP from the subscriber unit SU2 via the main path. It will be seen that at the instant indicated by line A the AP is also receiving the final data bits of the main packet 1 transmitted by subscriber unit SUl as well as pre-cursor 1 and 2 of the channel 2 and post- cursor 1 of packet 1 transmitted by subscriber unit SUl also starts simultaneously with the main data packet transmitted by subscriber unit SU2. Further, before the completion of the packet 1 from subscriber unit SU2 the AP also receives post-cursor 2 from the subscriber unit SUl packet 1, post-cursor 1 from subscriber unit SU2, precursor 1 of the subscriber unit SUl packet 2 and precursor 2 of subscriber unit SUl packet 2. Consequently, all these further data packets will interfere with the data packet 1 from subscriber unit SU2 and will corrupt the data in this packet making reliable decoding of the data in the packet difficult or impossible.

Conventional equalising schemes can deal with inter symbol interference introduced by the subscriber's own channel. Inter-packet interference, however, is a more difficult problem as there is no knowledge of the interfering subscriber unit's transmitted data sequence and the characteristics of the channel over which it was transmitted. Full predistortion at the subscriber terminal is an elegant solution to this problem, as all pre-cursors and post-cursors are removed by each channel and the individual packets arrive at the AP with all post- cursors and pre-cursors removed. Full predistortion is, however, an inherently unstable process. It is known to provide delay equalisation so that the problem of the packets transmitted by each of the subscriber units overlapping when received at the access point can be eliminated. This does not, however, deal with the problem of pre-cursors and post-cursors. The conventional procedure is to insert guard bands between the transmissions of the packets from the different subscriber units, these guard bands being long enough to ensure that the pre-cursors and post-cursors from neighbouring packets are received during the guard bands . This, however, significantly reduces the efficiency of transmission as much time is wasted in the guard bands.

The invention provides a packet based point to multipoint wireless transmission system comprising an access point (AP) communicating with a plurality of subscriber units (SUs) by means of a frequency division duplex time division multiple access protocol, in which at the AP a non-linear decision feedback equaliser including a transversal feedback filter is provided to reduce inter symbol interference and at each SU each packet is linearly pre-distorted to remove pre-cursors, wherein the feedback filter in the decision feedback equaliser is arranged to hold symbol decisions made for all packets received during a given period prior to the packet being currently received in order to enable reduction of inter packet interference by the decision feedback equaliser.

By retaining the symbol decisions for previous packets in the feedback filter they can be used to reduce or remove inter packet interference caused by post cursors of previously received packets. As a result if pre-cursors are removed by pre-distorting the transmitted packets at each SU then the inter-packet interference can be removed in substantially the same manner as inter-symbol interference within a packet is removed merely by extending the length of the feedback filter and retaining the symbol decisions in the feedback filter for a period equal to or greater than the channel excess delay spread.

In time-division multiple access (TD A) communication networks, different users transmit to the AP in individual timeslots, which are non-overlapping in time. However, each user transmits over a different channel having a different channel impulse response (CIR) , which causes echoes. These echoes may have a long duration. In order to prevent echoes from an individual packet from overlapping with following packets transmitted by other users, it is customary to allow a guard period at the end of each packet. This guard period must be designed to be as long as the longest CIR which is anticipated to be present. This guard period ensures that echoes from one packet have substantially died out before the start of the next packet. However, this guard period between packets represents an overhead, particularly if the packets are short and the CIR is expected to be long.

In previously known systems a decision feedback equalizer (DFE) subtracts only intersymbol interference (ISI) caused by the current packet . This is because the feedforward (FF) filter of the DFE is optimised for the CIR of each individual packet. This means that it is difficult for the conventional DFE, which has both feedforward (FF) and feedback (FB) filters, to cope with interference received over a different CIR to the CIR of the packet currently being equalized.

In the present invention, the DFE is able to deal with inter-packet interference (IPI) because it does not need feedforward (FF) filter, but only a feedback (FB) filter. This arises from the fact that all received packets are first precoded (pre-equalized) at their respective transmitters in such a way as to remove all precursor echoes. This allows each received packet to be equalized completely with the use of a feedback (FB) filter only.

It is necessary for the FB filter to keep careful track of the start and end of each data burst so that feedback taps which operate on data samples from a previous burst are deactivated as soon as data samples from the next burst reach that particular tap.

The advantage of the present invention is that the guard period between packets in a TDMA frame can be greatly reduced, so allowing higher data rates and faster turnaround times.

The feedback filter may include n delay stages and m multipliers where n and m are integers and n is greater than m, wherein the multipliers are arranged to be switchable between delay stages at each data shift.

This enables a cost reduction by reducing the number of multipliers required. Multipliers are complicated circuits, particularly when complex co-efficients have to be multiplied as will take place in the present application. When forming part of an integrated circuit such multipliers use a large area in their implementation compared with delay stages which may be simply locations within a random access memory. Thus by reducing the number of multipliers required a large saving in circuit area and hence cost can be made.

The multipliers may be allocated to filter delay stages (or taps) in accordance with the following procedure,- a) when the first data packet is to be processed allocating multipliers to filter taps as required; b) checking at each data shift to see whether the start of a subsequent data packet has reached a position where a multiplier relating to the first data packet is placed and, if so, removing it; c) checking whether any filter taps requiring multipliers currently exist and, if so, allocating the removed multiplier to the tap having the greatest significance, and d) forming the feedback estimate.

When a filter tap requires a multiplier and there is no unallocated multiplier a comparison may be made between the significance of the present filter tap and all the other filter taps having a multiplier. A multiplier may then be removed from the least significant of the other filter taps to the present filter tap if the significance of the present filter tap is greater than that of any of the other filter taps.

The invention further provides an access point for use in such a system, the access point comprising a decision feedback equaliser including a transversal feedback filter arranged to hold symbol decisions in order to enable reduction of inter symbol interference, wherein the filter is arranged to hold symbol decisions made for all packets received during a given period prior to the packet being currently received in order to enable reduction of inter packet interference.

The invention yet further provides a method of communicating between an access point (AP) and a plurality of subscriber units (SUs) in a point to multipoint communication system using a frequency division duplex time division multiple access protocol, the method comprising steps of: a) linearly pre-distorting a data signal at each SU to remove pre-cursors from the packets received at the AP from that SU; b) providing at the AP a decision feedback equaliser including a transversal feedback filter; c) applying the signal received at the AP to the decision feedback equaliser to reduce inter symbol interference therefrom; d) retaining in the feedback filter symbol decisions made on data packets received in a given period prior to receiving the current data packet; and e) reducing inter packet interference using the retained symbol decisions.

The above and other features and advantages of the invention will be apparent from the following description by way of example, of an embodiment of the invention with reference to the accompanying drawings, in which Figure 1 shows a point to multipoint communications system in which the present invention may be embodied,

Figures 2 and 3 illustrate the interference between data packets transmitted by the various subscriber units in a system such as shown in Figure 1 when the measures according to the invention are not applied,

Figures 4 and 5 illustrate how data packets from different subscriber units interfere at the access point when pre-distortion of the data at the subscriber unit is used to remove pre-cursors and delay equalisation is performed,

Figure 6 shows the data packets received at the access point after pre-distortion and delay compensation when the data packets are of constant length and the duration of each packet is longer than the excess delay spread of the channel over which it is transmitted,

Figure 7 illustrates the data as received at the access point after pre-distortion and delay compensation when data packets are of varying lengths and the duration of some packets is shorter than the individual excess delay spread of the channel over which they are transmitted, Figure 8 is a block schematic diagram of a communication system according to the invention showing in greater detail the construction of an access point and of a subscriber unit,

Figure 9 shows a non-linear decision feedback equaliser in block schematic form and illustrates the principle of inter packet interference reduction according to the invention,

Figure 10 illustrates the state of the feedback filter of the decision feedback equaliser for an arbitrary set of channels and data packets when carrying out the present invention, and

Figure 11 shows a flow diagram illustrating how the number of taps required in the delay line of the feedback filter of the decision feedback equaliser in the access point shown in Figure 8 can be achieved.

Figures 4 and 5 illustrate the data as received at the access point when the data packets from each individual subscriber unit have been pre-distorted to remove the precursors and delay compensated to ensure that the packets from each of the subscriber units arrive at the correct times. As can be seen from Figures 4 and 5 the upstream packet 1 from subscriber unit 2 is corrupted by post- cursor 1 of packet 1 from subscriber unit SUl, post- cursor 2 of packet 1 from subscriber unit SUl and post- cursor 1 of packet 1 from subscriber unit SU2. While a decision feedback equaliser will normally enable inter symbol interference to be eliminated, that is the effect of the post-cursor 1 of subscriber unit SU2 packet 1, the decision feedback equaliser will not normally have information about either the data that was contained in packet 1 transmitted by subscriber unit SUl nor the characteristics of the channel from subscriber unit SUl to the access point.

Figures 6 and 7 further illustrate this situation. Figure 6 shows the received signals as seen at the access point after pre-distortion and delay compensation when data packets are of constant length and the duration of each packet is longer than the individual channel delay spreads . It can be seen that the main sequence of packet

1 of the subscriber unit SU2 is corrupted by post-cursors 1, 2 and 3 of the upstream packet 1 from subscriber unit

SUl and by post-cursors 1, 2 and 3 of packet 1 of the subscriber unit SU2 upstream packet 1, that is post- cursors 1, 2 and 3 of itself. Figure 7 shows the data as seen at the access point after pre-distortion and delay compensation when data packets are of varying length and the duration of some packets is shorter than the individual channel delay spreads. It will be seen from Figure 7 that the packet 2 received from subscriber unit SU2 is corrupted by uncorrelated sequences formed by post- cursors 1, 2 and 3 of packet 1 from subscriber unit SUl; by post-cursors 1 and 2 of packet 1 transmitted by subscriber unit SU2 and by post-cursors 1 and 2 of packet

2 from subscriber unit SUl. It is also corrupted by post- cursors 1 and 2 of its own data packet. In a communications system the situation where multiple short uncorrelated data sequences are present when any particular data sequence is being equalised is not uncommon. It has been mentioned that full channel predistortion could be used to remove this problem. Full pre-distortion is, however, an inherently unstable process and thus unsuitable for use in a commercial communications system. An alternative is to leave a guard band between the upstream data bursts . The length of the guard band must allow for all post cursor echoes to die away. This adds a significant overhead to data transmission in channels that may have up to 20 microseconds of excess delay spread. As a result, an alternative to both of these solutions is desirable.

Figure 8 shows in block schematic form a communications system according to the invention in which an AP 100 is shown communicating with a subscriber unit 101. There will normally be a plurality of subscriber units each taking substantially the same form as that shown as subscriber unit 101. The subscriber unit 101 comprises a demodulator 110 for receiving and demodulating data transmitted by the access point 100 and received over a downstream channel 190. The demodulated data is fed to a decision feedback equaliser 111 which makes decisions on the received signal to reproduce the data sent by the access point 100. This data is fed to a data sink 112 and to a control unit 113. The control unit 113 monitors the data being received to determine whether that data is intended for the subscriber unit and is programmed to recognise various data fields in the packets being received. The control unit 113 also determines data fed from a data source 114 via a modulator 115 to a linear pre-distorter 116 in the subscriber unit. The linear pre- distorter comprises a linear transversal filter having taps which are set in response to the control unit in the knowledge of an estimation of the channel characteristics between the subscriber unit and the access point. This knowledge may be derived at the access point and transmitted to the subscriber unit. The linear pre- distorter 116 is arranged to pre-distort the transmitted signal so that pre-cursors are eliminated and also includes a variable delay line which enables the subscriber unit to be synchronised with the access point so that data packets transmitted by each subscriber unit will arrive at the access point at the correct time. Data is transmitted from the subscriber unit 101 to the access point over an upstream channel 191. It will be apparent to the skilled person that the downstream 190 and upstream 191 channels will have different characteristics depending on the locations of the subscriber units and in the embodiment described the upstream and downstream channels have different frequencies.

At the access point 100, data packets from a plurality of subscriber units are received in a time division multiplexed form. Ideally the end of one data packet from one subscriber unit should be immediately followed by the start of a data packet from a further subscriber unit in order to obtain maximum system efficiency of data throughput.. Data received by the AP is fed via a demodulator 130 to a non-linear decision feedback equaliser 131 whose output goes to a data sink 132 and to an input of the control unit 133.

As has been mentioned before, if the data packets from the different subscriber units arrive more closely spaced than the excess delay spread of the channel, then post-cursors from one data packet may interfere with the reception of a subsequent data packet. This makes it difficult for the access point to decode the data successfully as it is corrupted by the post-cursor from the previous packet. In order to overcome this problem the present invention provides that the decision feedback equaliser 131 comprises a feedback filter which has a temporal filter length which is equal to or greater than the worst case channel excess delay spread and in one embodiment each delay element has a corresponding coefficient multiplier associated with it.

The control unit 133 also controls a data source 134 where output is fed to a modulator 135 for transmission of the data via the downstream channel 190 to the subscriber unit. The control unit 133, inter alia, causes data to be transmitted to the subscriber unit 101 which enables the control unit 113 in the subscriber unit 101 to set up the pre-distorter 116 to minimise pre-cursors received at the access point 100. The control unit 133 also stores data relating to the channel characteristics between each of the subscriber units and itself to enable the appropriate multiplier co-efficients to be set in the feedback filter of the decision feedback equaliser 131.

Figure 9a shows in block schematic form the decision feedback equaliser used in the access point 100. It has an input 301 to which the demodulated signal received from the subscriber units is applied and an output 302 from which the detected data is available. Input 301 is connected to a first input of an adder 303 whose output is fed to a decision circuit 304. The output of the decision circuit 304 is connected to the output 302 from which the output data is derived and to the input of a delay stage forming part of a transversal feedback filter. There are n delay stages 305-1, 305-2 to 305-n each delay stage delays the decision by the symbol period and feeds the next delay stage. Each delay stage is also provided with a complex multiplier which receives corresponding multiplier constants CI, C2 to CN. The outputs of the delay stages are fed to a summing circuit 306 whose output is fed back to a second input of the adder 303 in a sense such as to subtract from the input signal. As described thus far, the decision feedback equaliser is a pure nonlinear decision feedback equaliser, that is there is no feedforward filter before the adder 303, this function being carried out in the subscriber units. Such a decision feedback equaliser is used to remove inter-symbol interference and consequently the delay line will be flushed at the end of each packet and the multiplier coefficients set for the next packet . Under these circumstances the number of delay stages only needs to be able to accommodate the longest data packet. It has been realised, however, that if the delay line is extended so that it covers the maximum channel excess delay spread, then the information already in the delay line as to previous packets which have been transmitted is available to enable inter-packet interference to be removed.

Figure 9b and 9c illustrate the channel responses for channels 1 and 2. Figure 9d shows the state of the feedback filter when set up to receive data packets from channel 1. The Xs show the positions where multiplier co- efficients are required for the reception of data packets from channel 1. Figure 9e shows in addition the positions where multiplier co-efficients are required when receiving packets over channel 2 and are indicated by the letter Y. The multiplier co-efficients indicated by the letter X in Figure 9e are removed when the beginning of, or first bit of, a data packet transmitted over channel 2 arrives at that position in the feedback filter delay line. The required multiplier positions and co-efficients are stored in the access point and are derived from the channel characteristics in any convenient manner.

Although multipliers are shown with each stage in the feedback filter of Figure 9a, it is not necessary to provide a multiplier for each stage but they can in fact be dynamically allocated to whichever stage needs a multiplier co-efficient at a particular time as will be decided herein after. By this means the number of multipliers required to be provided is reduced. This is particularly important as hardware multipliers are complicated circuits and in integrated decision feedback equalisers will use a large area of the semi-conductor substrate greatly increasing the cost of the integrated circuit. Consequently a reduction in circuit area and complexity can be achieved by reducing the number of multipliers provided. A switching mechanism is provided that enables the multipliers to be switched to the particular delay stage where the multiplier co-efficient is required. An algorithm for performing this switching of multipliers to the appropriate delay stages will be described with reference to Figure 11.

In order to carry out the present invention the access point 100 comprises a memory in which the channel characteristics of each of the subscriber units which communicate with the access point are stored. This enables the multiplier co-efficients and positions for each channel can be accessed to enable the feedback filter to be correctly set up for receiving the data packets. Since fewer multipliers are provided than the number of taps on the feedback filter, it may be that at some times the number of required multipliers in order to produce a theoretically perfect equalisation will be greater than the number actually available. In order to deal with this, the multipliers may be allocated on the basis of the significance of the particular tap and a register, which is a bank of memory, is provided to store the requirements which have not been met so that as soon as a multiplier becomes free, it can be allocated to the appropriate tap. The multipliers will be allocated in order of significance so that if there are insufficient multipliers they are allocated to the most important taps . A further register which is used to store the number of multipliers which are not allocated at any time is provided in the access point, so that a track can be kept of which multipliers are occupied and which are free for allocation. The multipliers currently in use are also monitored to determine their significance and if a new tap is required having a greater significance than some of the existing ones, the multiplier can be moved from the least significant to the new tap. Figure 10 a-d shows four channel impulse responses which relate to four individual subscriber upstream channels . These responses assume that the subscriber units have, by pre-distortion, successfully eliminated all the pre- cursors of the data packets sent by each of the individual subscriber units. Blocks PA1, PB1, PCI, PD1, PA2, and PB2 represent data packets sent by the individual subscriber units. Packets PA1 and PA2 represent packets 1 and 2 transmitted by subscriber unit A, PB1 and PB2 represent data packets 1 and 2 transmitted by subscriber unit B, PCI represents data packet 1 transmitted by subscriber unit C, and PD1 represents data packet 1 transmitted by subscriber unit D.

Figure lOe to lOo show the state of the delay line of the feedback filter provided in the decision feedback equaliser of the access point 100 at various times as the data packets pass through. Figure lOe shows the state when data packet 1 from subscriber unit A has fully entered the feedback filter. Figure lOf shows the state the data packet 1 from subscriber unit B has fully entered the filter and illustrates the fact that the data from data packet 1 from subscriber unit A still remains within the filter delay line, whereas under normal operation of a decision feedback equaliser the filter delay line would be flushed or reset once decisions had been made on all the data bits of the first packet. Similarly, Figure lOg shows the state of the filter delay line when the data packet 1 from subscriber unit C has entered the decision feedback equaliser feedback filter. Similarly Figures lOh to lOo show the situation when further packets are entered into the delay line feedback filter of the decision feedback equaliser and when the initial packets eventually disappear from the end of the feedback filter. Figure 10 shows the state of the feedback filter delay line at various times starting from the assumptions that packet 1 of subscriber unit A enters the feedback filter delay line when it is empty and that no subsequent packets are received after the receipt of packet 2 from subscriber unit B. It will be clear, however, that the number of consecutive packets is immaterial and that the process described can continue on indefinitely. Further it will be clear that there may be intervals when no data packets are received if no subscriber units are currently transmitting data packets to the access point.

The operation of the decision feedback equaliser 100 is as follows: as decisions are made on the symbol estimates, they are shifted along the feedback filter. When the first symbol of a transmission burst occupies a position in the delay line corresponding to a filter tap, a decision is made. If the tap belongs to the channel impulse associated with the burst, it is activated, otherwise the tap is deactivated. As time progresses the feedback filter not only holds symbol decisions made on the current upstream transmission, but also symbol decisions on all previous upstream transmissions that occurred during a set time period which is defined by the length of the feedback filter. The channel having the greatest excess delay spread defines the time period. In a conventional equaliser structure, only symbol decisions associated with the current transmission packet are retained and the filter is then flushed of symbols before the next transmission. By retaining the previous packets within the feedback filter, inter-packet interference can be removed as well as inter-symbol interference. A practical communication system will have a specification which defines the maximum permitted excess channel delay spread and the length of the feedback filter delay line will be chosen taking into account the maximum permitted excess channel delay spread.

As described above, the decision feedback equaliser will perform adequately and will cancel inter-packet interference as well as inter-symbol interference. The assumption was made, however, that every delay block had a co-efficient multiplier. In a channel having an excess delay spread of 20 microseconds and a symbol period of 100 nanoseconds, 200 complex multipliers would be required. This clearly implies a large quantity of hardware since multipliers are complicated circuits particularly, as in the case in the present application, when complex multiplier co-efficients are required.

A close inspection of Figure 10 will reveal that although there are 16 post cursor echos spread over 4 channels, a maximum of 5 co-efficient multipliers are required at any time epoch. This number is specific to this example, and a different number of multipliers will be necessary for different channel characteristics and data rates. The following refinement of the invention is based on the realisation that equalisation can be undertaken with a smaller set of multipliers . The specific number of multipliers chosen will depend on the expected number of post-cursors, the number of channels, the maximum channel delay spreads to be catered for and the performance requirements for the access point.

In the following description a tap means a delay stage to which a multiplier is attached. An unallocated tap means a delay stage which requires a multiplier but does not yet have one attached. A free tap is a multiplier which is available to be connected to a delay stage. An allocated tap is a multiplier which is connected to a delay stage.

In essence the tap selection algorithm, that is the algorithm to allocate a multiplier to a particular stage of the filter delay line, operates as follows: initially the feedback filter is empty. As the first data packet to be processed is passed along the feedback filter, new taps are allocated as required. After each data shift a check is made to see if the start of any data sequence corresponds to an existing tap position. If it does then the existing tap is removed. If there are any unallocated taps the largest is now allocated. If there are no unallocated taps then a register, the free tap register, which holds data representing those multipliers that are not currently required to be allocated to a delay stage of the filter, is updated. Next a check is made to see if the start of any data packet corresponds to a new tap position, that is a stage of the delay line that requires a multiplier to be connected. If none correspond, the feedback estimate can be calculated immediately. If any correspond, then a check is made to see if any free taps, that is unconnected multipliers, are available. If free taps are available, then a check is made to determine whether the required tap is larger than the largest stored in the free tap register. If so, then the tap is allocated and the feedback estimate can be calculated. If not,- the tap is stored in the unallocated register, the largest unallocated tap is allocated, and the feedback estimate can then be calculated. If no free taps are available the required tap is checked against currently allocated taps, if the required tap is larger than the smallest allocated tap then the smallest tap is moved to the unallocated tap register and the required tap is allocated. The feedback estimate can then be calculated. If the required tap is smaller than currently allocated taps the required tap is stored in the unallocated tap register and the feedback estimate can then be calculated. This is the end of one shift loop.

This algorithm will now be described in greater detail with reference to Figure 11. In Figure 11 step 200 represents the entry into this algorithm. The next step 201 is to determine the difference between the received symbol estimate and the estimate from the feedback filter. This is followed by step 202 consisting of making a decision on the received symbol. Step 203 represents the shifting of the decision along the feedback filter delay line. Step 204 is to take a decision as to whether the start of the data packet containing the symbol is at the position of an existing tap. If this is not the case, then in step 205 a further decision is made as to whether the start of the data packet is at a position where a new tap is required. If that is not the case, then in step

206 the symbol estimate is determined and fed back to step 201 to enable the next symbol to be processed.

If at step 205 it is determined that the start of the data packet corresponds to a new tap position, then in step 226 a further decision is made as to whether there are any free taps which may be allocated to that particular position. If the answer is yes, then the next step 207 is to make a further decision as to whether the newly required tap is larger than the largest unallocated tap. This step is necessary since while there may be free taps more than one may need to be allocated at a particular time in a multichannel system. In addition there may be a limit to the number of taps which can be allocated to a given channel, which limit is less than the total number of multipliers, so that free taps might exist which should not be allocated at this time. If the answer is yes, then the next step 208 is to allocate the required tap and step 206 is carried out to determine the estimate and feed it back to step 201 to enable the next symbol to be processed.

If it is determined in step 207 that the required tap is not greater than the largest unallocated tap, then in step 209 the required tap is stored in the unallocated tap table. The next step 210 is then to allocate the largest unallocated tap and then in step 206 to determine the estimate and feed it back to step 201 as before to enable the next symbol to be processed.

If at step 226 it is determined that there are no free taps then a further decision is made as to whether the required tap is greater than the smallest allocated tap in step 211. If the answer to that is yes, the next step 212 is to move the smallest tap to the unallocated tap table and then in step 213 to allocate the multiplier to the delay stage having the largest tap value, which translates to the largest multiplier co-efficient. Step 206 is then entered to determine the estimate and feed it back to step 201 to enable the next symbol to be processed.

If at step 211, the required tap is determined to be smaller than the smallest allocated tap, then in step 214 the required tap is moved to the unallocated tap table. Step 206 is then entered and the estimate is determined and fed back to step 201 to enable the next symbol to be processed.

If at step 204 it is determined that the start of the sequence (or data packet) has reached an existing tap position, then in step 215 the tap is removed, and in step 216 a determination is made as to whether there are any unallocated taps. If the answer if yes, then in step 217 the largest tap is allocated, while if the answer is no than in step 218 the free tap register is updated. The process then follows to step 205.

It will be apparent to the skilled person that the present invention enables the transmission of data from a plurality of subscriber units to an access point with greater efficiency than previous systems, that is guard bands can be substantially reduced or eliminated and there is no requirement for potentially unstable full predistortion of the signal from the subscriber unit to the access point . This is achieved by extending the length of the feedback filter in the decision feedback equaliser in the access point so that information from preceding data packets is still available within the filter when the current data packet is being received and consequently any inter-packet interference between those preceding packets and the current packet can be eliminated in substantially the same manner as inter-symbol interference is eliminated.

Claims

1. A packet based point to multipoint wireless transmission system comprising an access point (AP) communicating with a plurality of subscriber units (SUs) by means of a time division multiple access protocol, in which at the AP a non-linear decision feedback equaliser including a transversal feedback filter is provided to reduce inter symbol interference and at each SU each packet is linearly pre-distorted to remove pre-cursors, wherein the feedback filter in the decision feedback equaliser is arranged to hold symbol decisions made for all packets received during a given period prior to the packet being currently received in order to enable reduction of inter packet interference.

2. A system as claimed in Claim 1 in which the feedback filter includes n delay stages and m multipliers, where n and m are integers and n is greater than m, wherein the multipliers are arranged to be switchable between delay stages at each data shift.

3. A system as claimed in claim 2 in which the multipliers are allocated to filter delay stages (or taps) in accordance with the following procedure; a) when the first data packet is to be processed allocating multipliers to filter taps as required b) checking at each data shift to see whether the start of a subsequent data packet has reached a position where a multiplier relating to the first data packet is placed, and, if so, removing it c) checking whether any filter taps requiring multipliers currently exist and, if so, allocating the removed multiplier to the tap having the greatest significance, and d) forming the feedback estimate.

4. A system as claimed in claim 3 in which when a filter tap requires a multiplier and there is no unallocated multiplier a comparison is made between the significance of the present filter tap and all the other filter taps having a multiplier and a multiplier is moved from the least significant of the other filter taps to the present filter tap if the significance of the present filter tap is greater than that of any of the other filter taps .

5. A system as claimed in any preceding claim in which communication between the access point and the subscriber units is by means of a frequency division duplex arrangement .

6. An access point for use in a system as claimed in any preceding claim comprising a decision feedback equaliser including a transversal feedback filter arranged to hold symbol decisions in order to enable reduction of inter symbol interference, wherein the filter is arranged to hold symbol decisions made for all packets received during a given period prior to the packet being currently received in order to enable reduction of inter packet interference.

7. An access point as claimed in Claim 6 in which the feedback filter includes n delay stages and m multipliers, where n and m are integers and n is greater than m, wherein the multipliers are arranged to be switchable between delay stages at each data shift.

8. An access point as claimed in claim 7 in which the multipliers are allocated to filter delay stages (or taps) in accordance with the following procedure a) when the first data packet is to be processed allocating multipliers to filter taps as required b) checking at each data shift to see whether the start of a subsequent data packet has reached a position where a multiplier relating to the first data packet is placed and, if so, removing it c) checking whether any filter taps requiring multipliers currently exist and, if so, allocating the removed multiplier to the tap having the greatest significance, and d) forming the feedback estimate.

9. An access point as claimed in claim 8 in which when the filter tap requires a multiplier and there is no unallocated multiplier a comparison is made between the significance of the present filter tap and all the other filter taps having a multiplier and a multiplier is moved from the least significant of the other filter taps to the present filter tap if the significance of the present filter tap is greater than that of any of the other filter taps.

10. A method of communicating between an access point (AP) and a plurality of subscriber units (SUs) in a point to multipoint communication system using a time division multiple access protocol, the method comprising the steps of: a) linearly pre-distorting a data signal at each SU to remove pre-cursors from the packets received at the AP from that SU; b) providing at the AP a decision feedback equaliser including a transversal feedback filter; c) applying the signal received at the AP to the decision feedback equaliser to reduce inter symbol interference therefrom; d) retaining in the feedback filter symbol decisions made on data packets received in a given period prior to receiving the current data packet; and e) reducing inter packet interference using the retained symbol decisions.

11. A method as claimed in Claim 10 in which the feedback filter includes n delay stages and m multipliers, where m and n are integers and n is greater than m, wherein the method comprises the further step of allocating the multipliers to selected delay stages at each data shift.

12. A method as claimed in claim 11 in which the multipliers are allocated to filter delay stages (or taps) in accordance with the following procedure a) when the first data packet is to be processed allocating multipliers to filter taps as required b) checking at each data shift to see whether the start of a subsequent data packet has reached a position where a multiplier relating to the first data packet is placed and, if so, removing it c) checking whether any filter taps requiring multipliers currently exist and, if so, allocating the removed multiplier to the tap having the greatest significance, and d) forming the feedback estimate.

13. A method as claimed in claim 12 in which when a filter tap requires a multiplier and there is no unallocated multiplier a comparison is made between the significance of the present filter tap and all the other filter taps having a multiplier and a multiplier is moved from the least significant of the other filter taps to the present filter tap if the significance of the present filter tap is greater than that of any of the other filter taps .

14. A method as claimed in any of claims 10 to 13 in which communication between the access point and the subscriber units is by means of a frequency division duplex arrangement .