WO2002080183A3 - Memory cell structural test - Google Patents

Memory cell structural test Download PDF

Info

Publication number
WO2002080183A3
WO2002080183A3 PCT/US2002/007340 US0207340W WO02080183A3 WO 2002080183 A3 WO2002080183 A3 WO 2002080183A3 US 0207340 W US0207340 W US 0207340W WO 02080183 A3 WO02080183 A3 WO 02080183A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory cell
structural test
cell structural
bit lines
memory cells
Prior art date
Application number
PCT/US2002/007340
Other languages
French (fr)
Other versions
WO2002080183A2 (en
Inventor
Michael Tripp
Tak Mak
Michael Spica
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Priority to DE60212103T priority Critical patent/DE60212103T2/en
Priority to JP2002578510A priority patent/JP2004530243A/en
Priority to EP02717602A priority patent/EP1374250B1/en
Priority to KR1020037012883A priority patent/KR100544362B1/en
Publication of WO2002080183A2 publication Critical patent/WO2002080183A2/en
Publication of WO2002080183A3 publication Critical patent/WO2002080183A3/en
Priority to HK04103384A priority patent/HK1060437A1/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5004—Voltage

Abstract

An apparatus and method for testing memory cells comprising coupling a first and a second memory cell to a first and a second bit lines, respectively, reading data from the first and second memory cells through the first and second bit lines, and comparing the voltage levels of the first and second bit lines.
PCT/US2002/007340 2001-03-30 2002-03-08 Memory cell structural test WO2002080183A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
DE60212103T DE60212103T2 (en) 2001-03-30 2002-03-08 STRUCTURED MEMORY CELL TEST
JP2002578510A JP2004530243A (en) 2001-03-30 2002-03-08 Memory cell structural test
EP02717602A EP1374250B1 (en) 2001-03-30 2002-03-08 Memory cell structural test
KR1020037012883A KR100544362B1 (en) 2001-03-30 2002-03-08 Memory cell structural test
HK04103384A HK1060437A1 (en) 2001-03-30 2004-05-13 Memory cell structural test

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/823,642 US6757209B2 (en) 2001-03-30 2001-03-30 Memory cell structural test
US09/823,642 2001-03-30

Publications (2)

Publication Number Publication Date
WO2002080183A2 WO2002080183A2 (en) 2002-10-10
WO2002080183A3 true WO2002080183A3 (en) 2003-04-17

Family

ID=25239313

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/007340 WO2002080183A2 (en) 2001-03-30 2002-03-08 Memory cell structural test

Country Status (10)

Country Link
US (1) US6757209B2 (en)
EP (1) EP1374250B1 (en)
JP (1) JP2004530243A (en)
KR (1) KR100544362B1 (en)
CN (1) CN100538910C (en)
AT (1) ATE329354T1 (en)
DE (1) DE60212103T2 (en)
HK (1) HK1060437A1 (en)
MY (1) MY127555A (en)
WO (1) WO2002080183A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8010853B2 (en) 2005-09-30 2011-08-30 Fujitsu Semiconductor Ltd. Semiconductor storage device and memory test circuit

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7480195B2 (en) * 2005-05-11 2009-01-20 Micron Technology, Inc. Internal data comparison for memory testing
US7602778B2 (en) * 2005-06-29 2009-10-13 Cisco Technology, Inc. System and methods for compressing message headers
US7548473B2 (en) * 2006-04-14 2009-06-16 Purdue Research Foundation Apparatus and methods for determining memory device faults
CN101714407B (en) * 2009-11-12 2012-08-08 钰创科技股份有限公司 Row address reserved storage location trigger circuit and row address reserved storage location device
JP6430194B2 (en) * 2014-09-29 2018-11-28 ルネサスエレクトロニクス株式会社 Semiconductor memory device
CN108051767B (en) * 2018-01-04 2019-07-19 南京国睿安泰信科技股份有限公司 A kind of automatic diagnosis method for integrated circuit tester

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US5894445A (en) * 1997-05-06 1999-04-13 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device
DE19908513A1 (en) * 1998-05-28 1999-12-02 Samsung Electronics Co Ltd Semiconductor memory device with parallel bit test mode
US6064601A (en) * 1997-12-29 2000-05-16 Samsung Electronics Co., Ltd. Integrated circuit memory devices and controlling methods that simultaneously activate multiple column select lines during a write cycle of a parallel bit test mode

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JPS57105897A (en) * 1980-12-23 1982-07-01 Fujitsu Ltd Semiconductor storage device
US4503536A (en) 1982-09-13 1985-03-05 General Dynamics Digital circuit unit testing system utilizing signature analysis
US4527272A (en) 1982-12-06 1985-07-02 Tektronix, Inc. Signature analysis using random probing and signature memory
JPS61261895A (en) * 1985-05-16 1986-11-19 Toshiba Corp Semiconductor memory device
JPS61292300A (en) * 1985-06-18 1986-12-23 Toshiba Corp Facilitating circuit for on-chip memory test
JP2523586B2 (en) * 1987-02-27 1996-08-14 株式会社日立製作所 Semiconductor memory device
JP2831767B2 (en) * 1990-01-10 1998-12-02 株式会社アドバンテスト Semiconductor memory test equipment
JPH04212799A (en) * 1990-01-31 1992-08-04 Nec Ic Microcomput Syst Ltd Semiconductor memory built in test circuit
JPH04211160A (en) * 1990-03-20 1992-08-03 Mitsubishi Electric Corp Semiconductor memory
KR940007240B1 (en) * 1992-02-21 1994-08-10 현대전자산업 주식회사 Parallel test circuit
JP3251637B2 (en) * 1992-05-06 2002-01-28 株式会社東芝 Semiconductor storage device
JP3307473B2 (en) * 1992-09-09 2002-07-24 ソニー エレクトロニクス インコーポレイテッド Test circuit for semiconductor memory
JPH07211099A (en) * 1994-01-12 1995-08-11 Sony Corp Semiconductor storage device testing apparatus
JPH07307100A (en) * 1994-05-11 1995-11-21 Nec Corp Memory integrated circuit
US5708598A (en) * 1995-04-24 1998-01-13 Saito; Tamio System and method for reading multiple voltage level memories
JP3607407B2 (en) * 1995-04-26 2005-01-05 株式会社日立製作所 Semiconductor memory device
US5973967A (en) * 1997-01-03 1999-10-26 Programmable Microelectronics Corporation Page buffer having negative voltage level shifter
US6002623A (en) * 1997-02-12 1999-12-14 Micron Technology, Inc. Semiconductor memory with test circuit
US5963497A (en) * 1998-05-18 1999-10-05 Silicon Aquarius, Inc. Dynamic random access memory system with simultaneous access and refresh operations and methods for using the same
JP2001210095A (en) * 2000-01-24 2001-08-03 Mitsubishi Electric Corp Memory module
US6353568B1 (en) * 2000-12-29 2002-03-05 Lsi Logic Corporation Dual threshold voltage sense amplifier

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5894445A (en) * 1997-05-06 1999-04-13 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device
US6064601A (en) * 1997-12-29 2000-05-16 Samsung Electronics Co., Ltd. Integrated circuit memory devices and controlling methods that simultaneously activate multiple column select lines during a write cycle of a parallel bit test mode
DE19908513A1 (en) * 1998-05-28 1999-12-02 Samsung Electronics Co Ltd Semiconductor memory device with parallel bit test mode

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8010853B2 (en) 2005-09-30 2011-08-30 Fujitsu Semiconductor Ltd. Semiconductor storage device and memory test circuit

Also Published As

Publication number Publication date
US6757209B2 (en) 2004-06-29
CN100538910C (en) 2009-09-09
ATE329354T1 (en) 2006-06-15
EP1374250A2 (en) 2004-01-02
HK1060437A1 (en) 2004-08-06
DE60212103T2 (en) 2007-01-04
KR20030085084A (en) 2003-11-01
JP2004530243A (en) 2004-09-30
EP1374250B1 (en) 2006-06-07
MY127555A (en) 2006-12-29
DE60212103D1 (en) 2006-07-20
KR100544362B1 (en) 2006-01-23
WO2002080183A2 (en) 2002-10-10
CN1537312A (en) 2004-10-13
US20020141259A1 (en) 2002-10-03

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