WO2002080469A2 - Schaltungsanordnung zur datenstromverteilung mit konfliktauflösung - Google Patents
Schaltungsanordnung zur datenstromverteilung mit konfliktauflösung Download PDFInfo
- Publication number
- WO2002080469A2 WO2002080469A2 PCT/EP2002/001578 EP0201578W WO02080469A2 WO 2002080469 A2 WO2002080469 A2 WO 2002080469A2 EP 0201578 W EP0201578 W EP 0201578W WO 02080469 A2 WO02080469 A2 WO 02080469A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- data
- data stream
- units
- circuit arrangement
- intermediate buffer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/1302—Relay switches
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/1304—Coordinate switches, crossbar, 4/2 with relays, coupling field
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/13103—Memory
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/13166—Fault prevention
Definitions
- the present invention relates to a circuit arrangement for data stream distribution, and in particular relates to a circuit arrangement for data stream distribution with a conflict resolution.
- Circuit arrangements for data stream distribution are usually designed on the principle of "crossbar distribution".
- data streams which are present at one or more input connections can be forwarded to one or more output connections.
- bidirectional methods which allow crossbar distributor connections to function both as inputs and as outputs.
- the data streams to be forwarded - in particular bit data streams - are available in known protocols, for example in the known Ethernet V2 / IEEE 802.3 protocol.
- Conflicts can arise in particular in the case of bidirectional data stream transmission from one or more inputs / outputs to one or more outputs / inputs, since a transmission of elements of a data stream rules out elements of a second data stream to the same output at exactly the same time or transmitted from the same input.
- DE 19540160 describes a method for coordinating input-buffered ATM (asynchronous transfer mode) Switching devices to avoid output blockages.
- a crossbar distribution matrix works in a completely parallel manner, ie it switches several cells from different inputs to different outputs during the same time interval. Since individual packet transmissions through the system are normally completely independent of one another, it must be avoided that a data cell is switched to the same busbar matrix output during the same cell slot period.
- the conflict resolution unit must be implementable as a synchronous final state machine, with no asynchronous parts permitted by the data stream design regulations;
- Buffer devices must be provided in order to buffer data cells that are not switched on during the current data cell period so that they can be switched on accordingly at a later point in time.
- first connection units 502a-502n and the second connection units 503a-503m serve both as inputs and as outputs to a central distribution device 500.
- the first connection units 502a-502n and the second connection units 503a-503m are provided with a matrix switching unit 501, which in the Distribution device 500 is included, connected.
- first and second data stream connection units 504a-504n or 505a-505m are not simultaneously sent to a single one of the corresponding output connection units 502a-502n or 503a-in the same cell time slot.
- the data stream distribution method according to the prior art is based on the fact that data which cannot be passed on to a desired connection unit are buffered in the connection unit to which the corresponding data stream arrives.
- the information as to whether a corresponding desired connection unit is occupied or not is determined in the distribution device 500, so that relatively long information paths must be provided between the respective first and second connection units 502a-502n or 503a-503m and the matrix switching unit 501, since data buffering takes place in the connection units 502a - 502n or 503a - 503m.
- Long information paths mean a large time delay, which brings with it a problem of short switching times.
- Such an arrangement according to the prior art is also described, for example, in DE 19935126.0.
- a main disadvantage of such circuit arrangements for data stream distribution according to the prior art is that long information paths are available, which in turn extend the switching times for the data streams.
- a further disadvantage of devices and methods for data stream distribution according to the prior art is that conventional conflict resolution limits the total amount of data stream that can be transmitted.
- the object is achieved by a circuit arrangement for data stream distribution with conflict resolution according to claim 1 and by a method for distributing data streams according to claim 12.
- the circuit arrangement according to the invention and the method according to the invention have the main advantage that data streams can be distributed efficiently without loss of data cells with minimal delay.
- a further advantage of the present invention is that a flexible arrangement of corresponding distribution devices is made possible, which allows connection units to be arranged remotely from a distribution device without delay times in data stream distribution due to long information paths.
- the core of the invention is a circuit arrangement for data current distribution, in which intermediate buffer units are arranged within a distribution device and in which long information paths are avoided, ne provision of backflow information, the intermediate buffer units can be kept small.
- connection unit of a distribution device which is also stored in a cell header, is quickly made available for further processing.
- data streams are also effectively forwarded without data cell losses, data cell losses being avoided in particular by exceeding buffer capacities of line units.
- a matrix switching unit has 24 inputs and 24 outputs in a distribution device.
- data cells are buffered in such a way that two data cells are never transmitted simultaneously to the same connection unit within the same cell time slot.
- a data comparison is carried out using buffer blocks which are contained in first and / or second line units.
- first and second data stream connections units have one or more connections for data lines.
- information of a data stream cell which proceeds in the data stream direction is passed to a specific distributor device and a specific connection unit with regard to the information contained in a distribution device determination field and the information contained in a connection unit determination field.
- data countercurrent cells are formed which run in the data countercurrent direction and contain a backflow determination field and a backflow bit vector field.
- the intermediate buffer units are designed to be small, which enables large data throughputs.
- Such data throughputs can be on the order of a few 100 GB / s.
- FIG. 1 shows a circuit arrangement for data stream distribution with conflict resolution according to the present invention
- FIG. 2 shows the structure of a data stream with which connection units of a circuit arrangement for data current distribution according to FIG. 1 are applied;
- 3 shows the structure of a data stream cell which runs in the data stream direction;
- Fig. 5 shows a circuit arrangement for data stream distribution according to the prior art.
- FIG. 1 illustrates a circuit arrangement for data stream distribution with conflict resolution according to the present invention.
- first data stream connection units 104a-104n and second data stream connection units 105a-105m are supplied to first data stream connection units 104a-104n and second data stream connection units 105a-105m.
- the circuit arrangement and method according to the invention allow data streams to be transmitted bidirectionally, so that the first data stream connection units 104a-104n and the second data stream connection units 105a-105m serve both as input and as output connections.
- first data stream connection units 104a-104n and four second data stream connection units 105a-105m are shown in FIG.
- two or more first data stream connection units can be connected to two or more second data stream connection units, where i is the run index and n is the total number of first data stream connection units, while j is the run index and m is the total number of second data stream connection units.
- optical feeds of the data streams to be distributed to the first and second data stream connection units 104a-104n and 105a-105m are generally also provided.
- a distribution device 100 essentially consists of a matrix switching unit 101 and first intermediate buffer units 10 ⁇ a-10n and second intermediate buffer units 107a-107m, the number of first intermediate buffer units 106a-10 ⁇ n corresponding to the number of first data stream connection units 104a-104n, while the number of second intermediate buffer units 107a 107m corresponds to the number of second data stream connection units 105a-105m.
- Data streams which are supplied via the first data stream connection units 104a-104n are supplied to the first intermediate buffer units 106a-106n via first connection units 102a-102n, while data streams which are supplied to the second data stream connection units 105-105m are supplied to the second intermediate buffer units 107a via second connection units 103a-103m -107m can be fed.
- the data streams are broken down into data cells, as described below with reference to FIGS. 2-4.
- the information in the cell header is first evaluated, which, together with information about an occupancy of intermediate buffer units, determines whether a current data flow cell is forwarded directly to an assigned output connection unit or a data counterflow cell is formed which corresponds to the corresponding one Connection unit is referred back to be evaluated there.
- FIG. 2 shows the structure of a data stream with which connection units of a circuit arrangement for data stream distribution according to FIG. 1 are applied.
- the data stream 200 shown in FIG. 2 consists of data stream cells 201a-201g, where k corresponds to the running index and g to the total number of data stream cells.
- the data stream cells shown generally correspond to data packets of fixed length.
- the data stream cells 201a-201g carry the information to be transmitted and to be distributed in the circuit arrangement according to the invention, a data stream cell header being used specifically for determining connection units and distribution devices, for example, as will be described below with reference to FIGS. 3 and 4 becomes.
- Fig. 3 illustrates the structure of a data stream cell that runs in the data stream direction.
- the data stream cell 300 shown in FIG. 3 spreads in
- a cell header consists of a manifold determination field 302 and a connector unit determination field 303.
- the distributor device determination field 302 determines which distributor device 100 the data stream cell 300 is to be fed to, while the connector unit determination field 303 determines which connector unit 102a-102n and 103a-103m, respectively a data stream cell 300 is to be fed within a distribution device 100.
- Fig. 4 shows the construction of a data counter current cell which runs in the data counter current direction.
- the data counterflow cell 400 shown in FIG. 4 it is indicated whether a threshold value is exceeded, which indicates that the buffer level of a corresponding buffer unit is such that no further data stream cells can be buffered.
- the data counterflow cell 400 thus propagates in a data counterflow direction 401, the cell header now being in contrast to that in FIG. 3, the data stream cell consists of a back pressure determination field 402 and a back pressure bit vector field 403.
- the back pressure determination field 402 indicates that there is a back pressure due to an overfill of a corresponding intermediate buffer unit, while the back pressure bit vector field 403 indicates that the distributor 100 is no longer able to transfer cells to the corresponding line units from the line unit with the original data stream was transmitted.
- the circuit arrangement for data stream distribution with conflict resolution and the method according to the invention make it possible to efficiently use free available memory space in the chip space of the distribution device 100 by distributing existing buffer devices into small intermediate buffer devices which correspond to output connection units on the distribution device 100 , Thus, a period of time required to maintain communication with connected chip units is considerably reduced.
- the introduction of data counterflow cells 400 ensures that no information is lost in a data stream 200 and that transmission delays are limited. Furthermore, the distribution device collects and disseminates information about the states of chip units connected to it and uses the information in the backflow bit vector field 403 of the data counterflow cell 400 to pass on this information.
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE50211138T DE50211138D1 (de) | 2001-02-16 | 2002-02-14 | Schaltungsanordnung zur datenstromverteilung mit konfliktauflösung |
US10/467,260 US7345995B2 (en) | 2001-02-16 | 2002-02-14 | Conflict resolution in data stream distribution |
EP02757713A EP1374505B1 (de) | 2001-02-16 | 2002-02-14 | Schaltungsanordnung zur datenstromverteilung mit konfliktauflösung |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10107433A DE10107433A1 (de) | 2001-02-16 | 2001-02-16 | Schaltungsanordnung zur Datenstromverteilung mit Konfliktauflösung |
DE10107433.6 | 2001-02-16 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002080469A2 true WO2002080469A2 (de) | 2002-10-10 |
WO2002080469A3 WO2002080469A3 (de) | 2003-10-16 |
Family
ID=7674372
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2002/001578 WO2002080469A2 (de) | 2001-02-16 | 2002-02-14 | Schaltungsanordnung zur datenstromverteilung mit konfliktauflösung |
Country Status (5)
Country | Link |
---|---|
US (1) | US7345995B2 (de) |
EP (1) | EP1374505B1 (de) |
CN (1) | CN100399766C (de) |
DE (2) | DE10107433A1 (de) |
WO (1) | WO2002080469A2 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9106510B2 (en) * | 2012-04-09 | 2015-08-11 | Cisco Technology, Inc. | Distributed demand matrix computations |
CN103812701B (zh) * | 2014-02-18 | 2018-03-09 | 合肥工业大学 | 一种基于片上网络中业务流参数的交叉冲突预处理方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5687324A (en) * | 1995-11-08 | 1997-11-11 | Advanced Micro Devices, Inc. | Method of and system for pre-fetching input cells in ATM switch |
US5745489A (en) * | 1994-04-15 | 1998-04-28 | Dsc Communications Corporation | Buffered crosspoint matrix for an asynchronous transfer mode switch and method of operation |
US5862128A (en) * | 1995-12-29 | 1999-01-19 | Gte Laboratories Inc | Merged buffer signal switch |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4131780A1 (de) * | 1991-09-24 | 1993-03-25 | Siemens Ag | Schaltungsanordnung zur verarbeitung von datensignalen |
DE19707061C2 (de) * | 1997-02-21 | 1999-07-15 | Siemens Ag | ATM-Kommunikationssystem zum Vermitteln von Internet-Datenpaketen |
DE19935126B4 (de) * | 1999-07-27 | 2005-07-14 | Infineon Technologies Ag | Verfahren und Vorrichtung zur Vermittlung einer Mehrzahl von paket-orientierten Signalen |
-
2001
- 2001-02-16 DE DE10107433A patent/DE10107433A1/de not_active Ceased
-
2002
- 2002-02-14 US US10/467,260 patent/US7345995B2/en not_active Expired - Lifetime
- 2002-02-14 WO PCT/EP2002/001578 patent/WO2002080469A2/de active IP Right Grant
- 2002-02-14 EP EP02757713A patent/EP1374505B1/de not_active Expired - Lifetime
- 2002-02-14 CN CNB028050010A patent/CN100399766C/zh not_active Expired - Fee Related
- 2002-02-14 DE DE50211138T patent/DE50211138D1/de not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5745489A (en) * | 1994-04-15 | 1998-04-28 | Dsc Communications Corporation | Buffered crosspoint matrix for an asynchronous transfer mode switch and method of operation |
US5687324A (en) * | 1995-11-08 | 1997-11-11 | Advanced Micro Devices, Inc. | Method of and system for pre-fetching input cells in ATM switch |
US5862128A (en) * | 1995-12-29 | 1999-01-19 | Gte Laboratories Inc | Merged buffer signal switch |
Also Published As
Publication number | Publication date |
---|---|
EP1374505B1 (de) | 2007-10-31 |
EP1374505A2 (de) | 2004-01-02 |
US7345995B2 (en) | 2008-03-18 |
DE50211138D1 (de) | 2007-12-13 |
US20040136391A1 (en) | 2004-07-15 |
DE10107433A1 (de) | 2002-08-29 |
WO2002080469A3 (de) | 2003-10-16 |
CN100399766C (zh) | 2008-07-02 |
CN1522524A (zh) | 2004-08-18 |
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