WO2002091461A3 - Ionized pvd with sequential deposition and etching - Google Patents

Ionized pvd with sequential deposition and etching Download PDF

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Publication number
WO2002091461A3
WO2002091461A3 PCT/US2002/014145 US0214145W WO02091461A3 WO 2002091461 A3 WO2002091461 A3 WO 2002091461A3 US 0214145 W US0214145 W US 0214145W WO 02091461 A3 WO02091461 A3 WO 02091461A3
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WO
WIPO (PCT)
Prior art keywords
etching
deposition
substrate
features
during
Prior art date
Application number
PCT/US2002/014145
Other languages
French (fr)
Other versions
WO2002091461A2 (en
Inventor
Tugrul Yasar
Glyn Reynolds
Frank Cerio
Bruce Gittleman
Michael Grapperhaus
Rodney Robison
Original Assignee
Tokyo Electron Ltd
Tokyo Electron Arizona Inc
Tugrul Yasar
Glyn Reynolds
Frank Cerio
Bruce Gittleman
Michael Grapperhaus
Rodney Robison
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd, Tokyo Electron Arizona Inc, Tugrul Yasar, Glyn Reynolds, Frank Cerio, Bruce Gittleman, Michael Grapperhaus, Rodney Robison filed Critical Tokyo Electron Ltd
Priority to KR1020037014325A priority Critical patent/KR100878103B1/en
Priority to JP2002588618A priority patent/JP4429605B2/en
Priority to EP02734191A priority patent/EP1384257A2/en
Publication of WO2002091461A2 publication Critical patent/WO2002091461A2/en
Publication of WO2002091461A3 publication Critical patent/WO2002091461A3/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04Coating on selected surface areas, e.g. using masks
    • C23C14/046Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34Sputtering
    • C23C14/3435Applying energy to the substrate during sputtering
    • C23C14/345Applying energy to the substrate during sputtering using substrate bias
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34Sputtering
    • C23C14/35Sputtering by application of a magnetic field, e.g. magnetron sputtering
    • C23C14/354Introduction of auxiliary energy into the plasma
    • C23C14/358Inductive energy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/321Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/34Gas-filled discharge tubes operating with cathodic sputtering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/2855Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by physical means, e.g. sputtering, evaporation
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32131Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by physical means only
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76862Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76865Selective removal of parts of the layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76871Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76873Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material

Abstract

An iPVD apparatus (20) is programmed to deposit material (10) into high aspect ratio submicron features (11) on semiconductor substrates (21) by cycling between deposition and etch modes within a vacuum chamber (30). The modes operate at different power and pressure parameters. Pressure of more than 50 mTorr, for example, is used for sputtering material from a target while pressure of less than a few mTorr, for example, is used to etch. Bias power on the substrate is an order of magnitude higher for etching, producing several hundred volt bias for etching, but only a few tens of volts for deposition. The alternating etching modes remove deposited material that overhangs edges of features on the substrate, removes some of the deposited material from the bottoms (15) of the features, and resputters the removed deposited material onto sidewalls (16) of the features. The substrate (21) is cooled during deposition and etching, and particularly during etching to substantially below 0°C. RF energy is coupled into the chamber (30) to form a high density plasma, with substantially higher RF power coupled during deposition than during etching. The substrate (21) is moved closer to the plasma source during etching than during deposition.
PCT/US2002/014145 2001-05-04 2002-05-03 Ionized pvd with sequential deposition and etching WO2002091461A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020037014325A KR100878103B1 (en) 2001-05-04 2002-05-03 Ionized pvd with sequential deposition and etching
JP2002588618A JP4429605B2 (en) 2001-05-04 2002-05-03 Ionized PVD method and apparatus with sequential deposition and etching
EP02734191A EP1384257A2 (en) 2001-05-04 2002-05-03 Ionized pvd with sequential deposition and etching

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US28895201P 2001-05-04 2001-05-04
US60/288,952 2001-05-04

Publications (2)

Publication Number Publication Date
WO2002091461A2 WO2002091461A2 (en) 2002-11-14
WO2002091461A3 true WO2002091461A3 (en) 2003-02-27

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PCT/US2002/014145 WO2002091461A2 (en) 2001-05-04 2002-05-03 Ionized pvd with sequential deposition and etching

Country Status (7)

Country Link
US (1) US6755945B2 (en)
EP (1) EP1384257A2 (en)
JP (1) JP4429605B2 (en)
KR (1) KR100878103B1 (en)
CN (1) CN100355058C (en)
TW (1) TW552624B (en)
WO (1) WO2002091461A2 (en)

Families Citing this family (144)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050272254A1 (en) * 1997-11-26 2005-12-08 Applied Materials, Inc. Method of depositing low resistivity barrier layers for copper interconnects
US10047430B2 (en) 1999-10-08 2018-08-14 Applied Materials, Inc. Self-ionized and inductively-coupled plasma for sputtering and resputtering
US8696875B2 (en) 1999-10-08 2014-04-15 Applied Materials, Inc. Self-ionized and inductively-coupled plasma for sputtering and resputtering
US8043484B1 (en) 2001-03-13 2011-10-25 Novellus Systems, Inc. Methods and apparatus for resputtering process that improves barrier coverage
US7781327B1 (en) 2001-03-13 2010-08-24 Novellus Systems, Inc. Resputtering process for eliminating dielectric damage
US6764940B1 (en) 2001-03-13 2004-07-20 Novellus Systems, Inc. Method for depositing a diffusion barrier for copper interconnect applications
US7186648B1 (en) 2001-03-13 2007-03-06 Novellus Systems, Inc. Barrier first method for single damascene trench applications
US7744735B2 (en) * 2001-05-04 2010-06-29 Tokyo Electron Limited Ionized PVD with sequential deposition and etching
ATE419550T1 (en) 2002-02-12 2009-01-15 Oc Oerlikon Balzers Ag OPTICAL COMPONENT WITH SUBMICROMETER CAVITIES
US7901545B2 (en) * 2004-03-26 2011-03-08 Tokyo Electron Limited Ionized physical vapor deposition (iPVD) process
US7504006B2 (en) * 2002-08-01 2009-03-17 Applied Materials, Inc. Self-ionized and capacitively-coupled plasma for sputtering and resputtering
US7012266B2 (en) 2002-08-23 2006-03-14 Samsung Electronics Co., Ltd. MEMS-based two-dimensional e-beam nano lithography device and method for making the same
AU2003304297A1 (en) * 2002-08-23 2005-01-21 Sungho Jin Article comprising gated field emission structures with centralized nanowires and method for making the same
US6858521B2 (en) * 2002-12-31 2005-02-22 Samsung Electronics Co., Ltd. Method for fabricating spaced-apart nanostructures
WO2004045267A2 (en) 2002-08-23 2004-06-03 The Regents Of The University Of California Improved microscale vacuum tube device and method for making same
US7147759B2 (en) * 2002-09-30 2006-12-12 Zond, Inc. High-power pulsed magnetron sputtering
US20040087163A1 (en) * 2002-10-30 2004-05-06 Robert Steimle Method for forming magnetic clad bit line
US6896773B2 (en) * 2002-11-14 2005-05-24 Zond, Inc. High deposition rate sputtering
US20040127014A1 (en) * 2002-12-30 2004-07-01 Cheng-Lin Huang Method of improving a barrier layer in a via or contact opening
US20040140196A1 (en) * 2003-01-17 2004-07-22 Applied Materials, Inc. Shaping features in sputter deposition
US6784105B1 (en) * 2003-04-09 2004-08-31 Infineon Technologies North America Corp. Simultaneous native oxide removal and metal neutral deposition method
US8298933B2 (en) 2003-04-11 2012-10-30 Novellus Systems, Inc. Conformal films on semiconductor substrates
US7842605B1 (en) 2003-04-11 2010-11-30 Novellus Systems, Inc. Atomic layer profiling of diffusion barrier and metal seed layers
US20040211661A1 (en) * 2003-04-23 2004-10-28 Da Zhang Method for plasma deposition of a substrate barrier layer
US6929720B2 (en) 2003-06-09 2005-08-16 Tokyo Electron Limited Sputtering source for ionized physical vapor deposition of metals
JP2005033173A (en) * 2003-06-16 2005-02-03 Renesas Technology Corp Method for manufacturing semiconductor integrated circuit device
SE527180C2 (en) 2003-08-12 2006-01-17 Sandvik Intellectual Property Rack or scraper blades with abrasion resistant layer and method of manufacture thereof
US20050061251A1 (en) * 2003-09-02 2005-03-24 Ronghua Wei Apparatus and method for metal plasma immersion ion implantation and metal plasma immersion ion deposition
US20050103620A1 (en) * 2003-11-19 2005-05-19 Zond, Inc. Plasma source with segmented magnetron cathode
US9771648B2 (en) * 2004-08-13 2017-09-26 Zond, Inc. Method of ionized physical vapor deposition sputter coating high aspect-ratio structures
US9123508B2 (en) 2004-02-22 2015-09-01 Zond, Llc Apparatus and method for sputtering hard coatings
US20060066248A1 (en) * 2004-09-24 2006-03-30 Zond, Inc. Apparatus for generating high current electrical discharges
US7892406B2 (en) * 2005-03-28 2011-02-22 Tokyo Electron Limited Ionized physical vapor deposition (iPVD) process
US20090321247A1 (en) * 2004-03-05 2009-12-31 Tokyo Electron Limited IONIZED PHYSICAL VAPOR DEPOSITION (iPVD) PROCESS
US7700474B2 (en) * 2006-04-07 2010-04-20 Tokyo Electron Limited Barrier deposition using ionized physical vapor deposition (iPVD)
JP2005285820A (en) * 2004-03-26 2005-10-13 Ulvac Japan Ltd Bias spatter film deposition process and film thickness control method
DE102004015862B4 (en) 2004-03-31 2006-11-16 Advanced Micro Devices, Inc., Sunnyvale A method of forming a conductive barrier layer in critical openings by means of a final deposition step after backsputter deposition
US7071095B2 (en) * 2004-05-20 2006-07-04 Taiwan Semiconductor Manufacturing Company Barrier metal re-distribution process for resistivity reduction
US20050266679A1 (en) * 2004-05-26 2005-12-01 Jing-Cheng Lin Barrier structure for semiconductor devices
US20050266173A1 (en) * 2004-05-26 2005-12-01 Tokyo Electron Limited Method and apparatus of distributed plasma processing system for conformal ion stimulated nanoscale deposition process
US7686926B2 (en) * 2004-05-26 2010-03-30 Applied Materials, Inc. Multi-step process for forming a metal barrier in a sputter reactor
US20050263891A1 (en) * 2004-05-28 2005-12-01 Bih-Huey Lee Diffusion barrier for damascene structures
US7556718B2 (en) 2004-06-22 2009-07-07 Tokyo Electron Limited Highly ionized PVD with moving magnetic field envelope for uniform coverage of feature structure and wafer
JP2006093660A (en) * 2004-08-23 2006-04-06 Konica Minolta Holdings Inc Plasma etching method
JP2006097071A (en) * 2004-09-29 2006-04-13 Hiroshima Univ Method for hardening age-hardening metallic material, hardening apparatus, and cutting tool
DE102004047630A1 (en) * 2004-09-30 2006-04-13 Infineon Technologies Ag Method for producing a CBRAM semiconductor memory
US7268076B2 (en) * 2004-10-05 2007-09-11 Applied Materials, Inc. Apparatus and method for metal plasma vapor deposition and re-sputter with source and bias power frequencies applied through the workpiece
US7399943B2 (en) * 2004-10-05 2008-07-15 Applied Materials, Inc. Apparatus for metal plasma vapor deposition and re-sputter with source and bias power frequencies applied through the workpiece
US7214619B2 (en) * 2004-10-05 2007-05-08 Applied Materials, Inc. Method for forming a barrier layer in an integrated circuit in a plasma with source and bias power frequencies applied through the workpiece
KR100904779B1 (en) * 2004-10-19 2009-06-25 도쿄엘렉트론가부시키가이샤 Film forming method using plasma sputtering and film forming apparatus
JP2006148074A (en) * 2004-10-19 2006-06-08 Tokyo Electron Ltd Method of depositing film and equipment for plasma-deposing film
JP2006148075A (en) * 2004-10-19 2006-06-08 Tokyo Electron Ltd Method of depositing film and device for plasma-deposing film
US7256121B2 (en) * 2004-12-02 2007-08-14 Texas Instruments Incorporated Contact resistance reduction by new barrier stack process
US7205187B2 (en) * 2005-01-18 2007-04-17 Tokyo Electron Limited Micro-feature fill process and apparatus using hexachlorodisilane or other chlorine-containing silicon precursor
US7193327B2 (en) * 2005-01-25 2007-03-20 Taiwan Semiconductor Manufacturing Company, Ltd. Barrier structure for semiconductor devices
US20060172536A1 (en) * 2005-02-03 2006-08-03 Brown Karl M Apparatus for plasma-enhanced physical vapor deposition of copper with RF source power applied through the workpiece
US20060278521A1 (en) * 2005-06-14 2006-12-14 Stowell Michael W System and method for controlling ion density and energy using modulated power signals
US20070029193A1 (en) * 2005-08-03 2007-02-08 Tokyo Electron Limited Segmented biased peripheral electrode in plasma processing method and apparatus
US20070068795A1 (en) * 2005-09-26 2007-03-29 Jozef Brcka Hollow body plasma uniformity adjustment device and method
DE102005046976B4 (en) 2005-09-30 2011-12-08 Advanced Micro Devices, Inc. A method of making a tungsten interconnect structure having improved sidewall coverage of the barrier layer
US20070074968A1 (en) * 2005-09-30 2007-04-05 Mirko Vukovic ICP source for iPVD for uniform plasma in combination high pressure deposition and low pressure etch process
US7700484B2 (en) * 2005-09-30 2010-04-20 Tokyo Electron Limited Method and apparatus for a metallic dry-filling process
US7348266B2 (en) * 2005-09-30 2008-03-25 Tokyo Electron Limited Method and apparatus for a metallic dry-filling process
JP4967354B2 (en) * 2006-01-31 2012-07-04 東京エレクトロン株式会社 Seed film formation method, plasma film formation apparatus, and storage medium
JP5023505B2 (en) * 2006-02-09 2012-09-12 東京エレクトロン株式会社 Film forming method, plasma film forming apparatus, and storage medium
US7645710B2 (en) * 2006-03-09 2010-01-12 Applied Materials, Inc. Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
US7678710B2 (en) * 2006-03-09 2010-03-16 Applied Materials, Inc. Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
US20070209930A1 (en) * 2006-03-09 2007-09-13 Applied Materials, Inc. Apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
US7837838B2 (en) * 2006-03-09 2010-11-23 Applied Materials, Inc. Method of fabricating a high dielectric constant transistor gate using a low energy plasma apparatus
JP4728153B2 (en) * 2006-03-20 2011-07-20 富士通セミコンダクター株式会社 Manufacturing method of semiconductor device
US7618888B2 (en) * 2006-03-24 2009-11-17 Tokyo Electron Limited Temperature-controlled metallic dry-fill process
US7588667B2 (en) * 2006-04-07 2009-09-15 Tokyo Electron Limited Depositing rhuthenium films using ionized physical vapor deposition (IPVD)
US20070257366A1 (en) * 2006-05-03 2007-11-08 Taiwan Semiconductor Manufacturing Company, Ltd. Barrier layer for semiconductor interconnect structure
US7645696B1 (en) 2006-06-22 2010-01-12 Novellus Systems, Inc. Deposition of thin continuous PVD seed layers having improved adhesion to the barrier layer
US7855147B1 (en) * 2006-06-22 2010-12-21 Novellus Systems, Inc. Methods and apparatus for engineering an interface between a diffusion barrier layer and a seed layer
US20080029386A1 (en) * 2006-08-01 2008-02-07 Dorfman Benjamin F Method and apparatus for trans-zone sputtering
JP4690985B2 (en) * 2006-09-25 2011-06-01 株式会社東芝 Nonvolatile memory device and manufacturing method thereof
US7776748B2 (en) * 2006-09-29 2010-08-17 Tokyo Electron Limited Selective-redeposition structures for calibrating a plasma process
US7749398B2 (en) * 2006-09-29 2010-07-06 Tokyo Electron Limited Selective-redeposition sources for calibrating a plasma process
US7510634B1 (en) 2006-11-10 2009-03-31 Novellus Systems, Inc. Apparatus and methods for deposition and/or etch selectivity
US8791018B2 (en) * 2006-12-19 2014-07-29 Spansion Llc Method of depositing copper using physical vapor deposition
US7682966B1 (en) 2007-02-01 2010-03-23 Novellus Systems, Inc. Multistep method of depositing metal seed layers
US20080190760A1 (en) * 2007-02-08 2008-08-14 Applied Materials, Inc. Resputtered copper seed layer
US7922880B1 (en) 2007-05-24 2011-04-12 Novellus Systems, Inc. Method and apparatus for increasing local plasma density in magnetically confined plasma
US7897516B1 (en) 2007-05-24 2011-03-01 Novellus Systems, Inc. Use of ultra-high magnetic fields in resputter and plasma etching
DE102007025341B4 (en) * 2007-05-31 2010-11-11 Advanced Micro Devices, Inc., Sunnyvale Process and separation system with multi-step separation control
US20080311711A1 (en) * 2007-06-13 2008-12-18 Roland Hampp Gapfill for metal contacts
WO2009011801A1 (en) * 2007-07-13 2009-01-22 Sub-One Technology, Inc. Corrosion-resistant internal coating method using a germanium-containing precursor and hollow cathode techniques
CN101785088B (en) * 2007-08-08 2013-06-05 株式会社爱发科 Plasma processing method and plasma processing apparatus
US7659197B1 (en) 2007-09-21 2010-02-09 Novellus Systems, Inc. Selective resputtering of metal seed layers
KR20160031034A (en) * 2007-10-26 2016-03-21 에바텍 어드벤스드 테크놀로지스 아크티엔게젤샤프트 Application of high power magnetron sputtering to through silicon via metallization
US8252690B2 (en) * 2008-02-14 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. In situ Cu seed layer formation for improving sidewall coverage
US20090242385A1 (en) * 2008-03-28 2009-10-01 Tokyo Electron Limited Method of depositing metal-containing films by inductively coupled physical vapor deposition
WO2009122378A1 (en) * 2008-04-03 2009-10-08 Oc Oerlikon Balzers Ag Apparatus for sputtering and a method of fabricating a metallization structure
US8017523B1 (en) 2008-05-16 2011-09-13 Novellus Systems, Inc. Deposition of doped copper seed layers having improved reliability
JP5249328B2 (en) * 2008-07-11 2013-07-31 キヤノンアネルバ株式会社 Thin film deposition method
JP4638550B2 (en) * 2008-09-29 2011-02-23 東京エレクトロン株式会社 Mask pattern forming method, fine pattern forming method, and film forming apparatus
US20100096253A1 (en) * 2008-10-22 2010-04-22 Applied Materials, Inc Pvd cu seed overhang re-sputtering with enhanced cu ionization
KR101593544B1 (en) * 2008-12-15 2016-02-15 가부시키가이샤 알박 Sputtering device and sputtering method
GB2469666B (en) * 2009-04-23 2012-01-11 Univ Sheffield Hallam RF-plasma glow discharge sputtering
US20110014778A1 (en) * 2009-07-20 2011-01-20 Klepper C Christopher Boron-10 coating process for neutron detector integrated circuit with high aspect ratio trenches
TWI435386B (en) * 2009-07-21 2014-04-21 Ulvac Inc Method of processing film surface
US8846451B2 (en) * 2010-07-30 2014-09-30 Applied Materials, Inc. Methods for depositing metal in high aspect ratio features
JP5392215B2 (en) * 2010-09-28 2014-01-22 東京エレクトロン株式会社 Film forming method and film forming apparatus
CN102036460B (en) * 2010-12-10 2013-01-02 西安交通大学 Tabulate plasma generating device
TWI490051B (en) * 2011-02-18 2015-07-01 Kim Mun Hwan Method for cleaning physical vapor deposition chamber part
JP5719212B2 (en) * 2011-03-30 2015-05-13 東京エレクトロン株式会社 Film forming method, resputtering method, and film forming apparatus
US20140046475A1 (en) * 2012-08-09 2014-02-13 Applied Materials, Inc. Method and apparatus deposition process synchronization
WO2014197324A1 (en) * 2013-06-04 2014-12-11 Tokyo Electron Limited Mitigation of asymmetrical profile in self aligned patterning etch
US9960021B2 (en) * 2013-12-18 2018-05-01 Applied Materials, Inc. Physical vapor deposition (PVD) target having low friction pads
US9887072B2 (en) * 2014-01-23 2018-02-06 Taiwan Semiconductor Manufacturing Company, Ltd. Systems and methods for integrated resputtering in a physical vapor deposition chamber
CN103993294B (en) * 2014-04-17 2016-08-24 上海和辉光电有限公司 A kind of pressure reduction modification method of high temperature CVD process
US10163698B2 (en) * 2014-05-07 2018-12-25 Taiwan Semiconductor Manufacturing Company Ltd. Interconnect structure and manufacturing method thereof
US9564359B2 (en) * 2014-07-17 2017-02-07 Taiwan Semiconductor Manufacturing Company, Ltd. Conductive structure and method of forming the same
GB201420935D0 (en) * 2014-11-25 2015-01-07 Spts Technologies Ltd Plasma etching apparatus
US9576811B2 (en) * 2015-01-12 2017-02-21 Lam Research Corporation Integrating atomic scale processes: ALD (atomic layer deposition) and ALE (atomic layer etch)
US9806252B2 (en) 2015-04-20 2017-10-31 Lam Research Corporation Dry plasma etch method to pattern MRAM stack
US9870899B2 (en) 2015-04-24 2018-01-16 Lam Research Corporation Cobalt etch back
US9972504B2 (en) * 2015-08-07 2018-05-15 Lam Research Corporation Atomic layer etching of tungsten for enhanced tungsten deposition fill
US10096487B2 (en) 2015-08-19 2018-10-09 Lam Research Corporation Atomic layer etching of tungsten and other metals
US9978610B2 (en) 2015-08-21 2018-05-22 Lam Research Corporation Pulsing RF power in etch process to enhance tungsten gapfill performance
US10229837B2 (en) 2016-02-04 2019-03-12 Lam Research Corporation Control of directionality in atomic layer etching
US10727073B2 (en) 2016-02-04 2020-07-28 Lam Research Corporation Atomic layer etching 3D structures: Si and SiGe and Ge smoothness on horizontal and vertical surfaces
US9991128B2 (en) 2016-02-05 2018-06-05 Lam Research Corporation Atomic layer etching in continuous plasma
US9773643B1 (en) * 2016-06-30 2017-09-26 Lam Research Corporation Apparatus and method for deposition and etch in gap fill
US10566211B2 (en) 2016-08-30 2020-02-18 Lam Research Corporation Continuous and pulsed RF plasma for etching metals
US9905638B1 (en) * 2016-09-30 2018-02-27 Texas Instruments Incorporated Silicon epitaxy for high aspect ratio, substantially perpendicular deep silicon trench
US10818502B2 (en) * 2016-11-21 2020-10-27 Tokyo Electron Limited System and method of plasma discharge ignition to reduce surface particles
US10566212B2 (en) 2016-12-19 2020-02-18 Lam Research Corporation Designer atomic layer etching
US10559461B2 (en) 2017-04-19 2020-02-11 Lam Research Corporation Selective deposition with atomic layer etch reset
US10832909B2 (en) 2017-04-24 2020-11-10 Lam Research Corporation Atomic layer etch, reactive precursors and energetic sources for patterning applications
US10269559B2 (en) * 2017-09-13 2019-04-23 Lam Research Corporation Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer
US10763083B2 (en) 2017-10-06 2020-09-01 Lam Research Corporation High energy atomic layer etching
US11664206B2 (en) * 2017-11-08 2023-05-30 Taiwan Semiconductor Manufacturing Co., Ltd. Arcing protection method and processing tool
KR102487054B1 (en) * 2017-11-28 2023-01-13 삼성전자주식회사 Etching method and methods of manufacturing semiconductor device using the same
WO2019160674A1 (en) * 2018-02-19 2019-08-22 Applied Materials, Inc. Pvd titanium dioxide formation using sputter etch to halt onset of crystalinity in thick films
CN111937122A (en) 2018-03-30 2020-11-13 朗姆研究公司 Atomic layer etching and smoothing of refractory metals and other high surface binding energy materials
US20200048760A1 (en) * 2018-08-13 2020-02-13 Applied Materials, Inc. High power impulse magnetron sputtering physical vapor deposition of tungsten films having improved bottom coverage
US10927450B2 (en) 2018-12-19 2021-02-23 Applied Materials, Inc. Methods and apparatus for patterning substrates using asymmetric physical vapor deposition
JP7339032B2 (en) * 2019-06-28 2023-09-05 東京エレクトロン株式会社 Substrate processing method and substrate processing apparatus
CN110190020A (en) * 2019-07-03 2019-08-30 中国振华集团云科电子有限公司 A kind of lithographic method and system
US20210210355A1 (en) * 2020-01-08 2021-07-08 Tokyo Electron Limited Methods of Plasma Processing Using a Pulsed Electron Beam
US20210391176A1 (en) * 2020-06-16 2021-12-16 Applied Materials, Inc. Overhang reduction using pulsed bias
US20230017383A1 (en) * 2021-07-14 2023-01-19 Applied Materials, Inc. Methods and apparatus for processing a substrate

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000005745A1 (en) * 1998-07-20 2000-02-03 Tokyo Electron Arizona, Inc. Physical vapor processing of a surface with non-uniformity compensation
WO2000007236A2 (en) * 1998-07-31 2000-02-10 Applied Materials, Inc. Method and apparatus for forming improved metal interconnects
US6100200A (en) * 1998-12-21 2000-08-08 Advanced Technology Materials, Inc. Sputtering process for the conformal deposition of a metallization or insulating layer
US6106677A (en) * 1996-05-03 2000-08-22 Micron Technology, Inc. Method of creating low resistance contacts in high aspect ratio openings by resputtering
US6132564A (en) * 1997-11-17 2000-10-17 Tokyo Electron Limited In-situ pre-metallization clean and metallization of semiconductor wafers

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4664935A (en) * 1985-09-24 1987-05-12 Machine Technology, Inc. Thin film deposition apparatus and method
JP2602276B2 (en) * 1987-06-30 1997-04-23 株式会社日立製作所 Sputtering method and apparatus
US5658438A (en) * 1995-12-19 1997-08-19 Micron Technology, Inc. Sputter deposition method for improved bottom and side wall coverage of high aspect ratio features
TW358964B (en) * 1996-11-21 1999-05-21 Applied Materials Inc Method and apparatus for improving sidewall coverage during sputtering in a chamber having an inductively coupled plasma
US5976327A (en) * 1997-12-12 1999-11-02 Applied Materials, Inc. Step coverage and overhang improvement by pedestal bias voltage modulation
US6080287A (en) * 1998-05-06 2000-06-27 Tokyo Electron Limited Method and apparatus for ionized physical vapor deposition
US6277249B1 (en) 2000-01-21 2001-08-21 Applied Materials Inc. Integrated process for copper via filling using a magnetron and target producing highly energetic ions

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6106677A (en) * 1996-05-03 2000-08-22 Micron Technology, Inc. Method of creating low resistance contacts in high aspect ratio openings by resputtering
US6132564A (en) * 1997-11-17 2000-10-17 Tokyo Electron Limited In-situ pre-metallization clean and metallization of semiconductor wafers
WO2000005745A1 (en) * 1998-07-20 2000-02-03 Tokyo Electron Arizona, Inc. Physical vapor processing of a surface with non-uniformity compensation
WO2000007236A2 (en) * 1998-07-31 2000-02-10 Applied Materials, Inc. Method and apparatus for forming improved metal interconnects
US6100200A (en) * 1998-12-21 2000-08-08 Advanced Technology Materials, Inc. Sputtering process for the conformal deposition of a metallization or insulating layer

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