WO2002095961A2

WO2002095961A2 - A method and electronic circuit for detecting an alternating current component

Info

Publication number: WO2002095961A2
Application number: PCT/IB2002/001821
Authority: WO
Inventors: Paul H. J. M. Van Voorthuisen
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 2001-05-25
Filing date: 2002-05-22
Publication date: 2002-11-28
Also published as: WO2002095961A3; EP1396086A2; JP2004520774A

Abstract

An electronic circuit for detecting an alternating current component of a signal has a maximum-hold detector (1) for holding a maximum signal level reached by the signal, a top detector (3) having a first input coupled to an output of the maximum-hold detector for inputting of the maximum signal level, the top detector having a second input for receiving the signal and having a comparator for comparing the signal to the maximum signal level and for outputting a top detection signal if the signal falls below the maximum signal level, and corresponding minimum-hold and dale detectors (2, 3) for producing an output signal being indicative of the presence of the alternating current component. The electronic circuit provides for the detection of the alternating current component irrespective of varying direct current components of the signal. The circuit can be employed for the detection of co-channel and / or multi path interference.

Description

A method and electronic circuit for detecting an alternating current component

Field of the invention

The present invention relates to the field of detecting an alternating current component in a signal, in particular for application in communication systems, and more particularly, to the detection of co-channel interference and multi path interference.

Background and prior art

From the prior art a variety of conventional detectors for the detection of a low frequency component in a signal having a direct current (DC) offset is known. Typically such a detector contains a direct current blocker and an amplitude detector for detecting the amplitude of a residual alternating current component.

For this purpose the direct current blocker must have a very low cut-off frequency (e.g. 0,1 Hz) in order to enable the amplitude detector to detect low frequency alternating current components. As a consequence the step response of such a direct current blocker has a settlement time in the order of multiple seconds. The detection of the low- frequency alternating current component can only start after the output of the direct current blocker has settled and has reached its end value. Hence, the time required for the detection of the alternating current component is relatively long and not acceptable for some applications.

U.S. Pat.No. 4,998,289 shows an interference detecting circuit which is used in a cellular radio telephone communication system. The circuit includes a logarithmic envelope detector for receiving a channel's angular modulated signal and for providing a log envelope output signal, a high pass filter for removing a particular range of undesired frequencies from the log envelope output signal, and a level detector for indicating the level of the filtered output signal. The output of the level detector represents the amount of interference on the angular modulated frequency signal. The level detector includes a maximum peak detector and a minimum peak detector for respectively detecting the envelope's functions maxima and minima. When a threshold level is exceeded, a microcomputer is alarmed in order to indicate that the co-channel and / or multi path interference has exceeded an acceptable level. This prior art level detector is deficient as small voltage ripples are also detected as voltage swings such that the output provided by the level detector can be random.

Accordingly a detection technique for detecting an alternating current component of a signal is needed which overcomes the foregoing deficiencies.

Objects of the invention

It is therefore an object of the present invention to provide an improved electronic circuit and method for detecting an alternating current component of a signal.

It is a further object of the invention to provide a method and electronic circuit for fast detection of an alternating current component with a high degree of accuracy.

It is a more particular object of the present invention to provide a receiver with improved co-channel and / or multi-path interference detection.

Summary of the invention The objects of the invention are solved basically by applying the features of the respective independent claims.

The invention allows to detect an alternating current component in a signal having a direct current offset in an efficient and reliable way. The invention can be used even if the direct current component of the signal varies. This is particularly beneficial for applications in receivers during the tuning to a desired frequency.

It is a further advantage of the invention that the detection of the alternating current component can be performed with a minimal time delay. This is due to the fact that a direct current blocker which typically has a settlement time in the order of seconds is not required. Rather the detection of an alternating current component is directly performed on the signal containing the direct current component.

The reliability of the detection is further increased if hold detectors are used in conjunction with respective top and dale detectors. This allows to indicate a maximum or minimum of the signal only when the signal has a waveform with a predefined minimal peak to peak value. This avoids a random output signal of the detector due to small signal ripples. In a preferred embodiment of the invention the reliability of the detection is further increased by alternately enabling the top detector and the dale detector. This way only the top detector or the dale detector is enabled at a given time. This way it is ensured that a minimum can only be detected if a maximum has been detected before and vice versa. In a further aspect of the invention the detection signals for the detection of minima and maxima of the alternating current component are counted. The counter value is compared to a counter threshold value. If the counter value surpasses the counter threshold value this indicates that an acceptable level of co-channel and / or multi path interference has been exceeded.

In a preferred embodiment of the invention the counter is periodically reset at predetermined time intervals.

Brief description of the drawings Additional objects and features of the invention will be more readily apparent from the following detailed description and appended claims when taken in conjunction with the drawings, in which:

Fig. 1 is a block diagram of an embodiment of the circuit for detecting an alternating current component, Fig. 2 is a signal diagram illustrating the detection of the alternating current component by means of the circuit of Fig. 1,

Fig. 3 shows a variety of internal signals of the circuit of Fig. 1 to illustrate the operation of the circuit, and

Fig. 4 is a block diagram of a receiver including a co-channel interference detection.

Detailed description

Fig. 1 shows an electronic circuit for detecting an alternating current component of the input signal SI. The input signal SI is applied to a maximum hold detector 1, to a minimum hold detector 2 as well as to top detector 3 and dale detector 4.

The maximum hold detector 1 has an output signal S2 which is inputted into the top detector 3. The signal S2 produced by the maximum hold detector 1 is representative of a maximum value the input signal has reached after the last reset of the maximum hold detector 1. Likewise the minimum hold detector 2 has an output signal S4 which is inputted into the dale detector 4. The signal S4 produced by the minimum hold detector 2 is representative of a minimum value of the input signal after the last resets of the minimum hold detector 2. The top detector 3 has an output signal S3 which indicates the detection of a maximum in the input signal SI. Likewise the dale detector 4 has an output signal S5 which indicates the detection of a minimum in the input signal SI .

The signal S3 of the top detector 3 is provided as a reset pulse to the dale detector 4 and to the minimum hold detector 2. In other words: The detection of a maximum of the input signal as indicated by the signal S3 resets the minimum hold detector 2 and the dale detector 4 for a subsequent detection of a minimum of the input signal.

Likewise the signal S5 of the dale detector 4 is provided as a reset signal to the maximum hold detector 1 and the top detector 3 to enable the detection of a maximum of the input signal after a minimum has been detected. Further the top detector 3 and the dale detector 4 have an control input Th for entering a detector threshold signal.

The detector threshold signal is representative of a threshold value for the purposes of the detection of an input signal maximum and minimum. The detector threshold specifies the minimum peak-to-peak value between an maximum and a consecutive minimum of the input signal waveform which is to be considered as a relevant voltage swing. For this purpose the top detector 3 compares the input signal SI to the signal S2.

Only when the input signal SI has dropped below the signal S2 by the detector threshold value the signal S3 is output by the top detector 3 to indicate the detection of an input signal maximum. Likewise the dale detector 4 compares the input signal SI and the signal S4. Only when the input signal S 1 has increased relative to the signal S4 by the detector threshold value the dale detector 4 outputs the signal S5 to indicate the detection of a minimum of the input signal. This way an unacceptable level of an alternating current component which needs to be detected can be specified by means of the detector threshold value. The signals S3 and S5 are provided to a counter 5 for counting of the respective signal pulses. The counter 5 has a reset which is coupled to a timer 6. The timer 6 resets the counter 5 at predetermined time intervals.

Alternatively an AM receiver - which is not shown in Fig. 2 - is tuned to a certain frequency. The counter 5 is reset and counts the pulses provided by signals S3 and S5 for a pre-defined period. After this period has lapsed the interference-flag 9 is checked. The detector is now disabled until the receiver is tuned to a new frequency.

The counter 5 has an output coupled to a comparator 7. The comparator 7 compares the counter value of the counter 5 to a threshold provided by memory 8 which is coupled to the comparator 7. When the counter value of the counter 5 exceeds the threshold of memory 8 the comparator 7 produces an output signal in order to set the flag 9. When the flag 9 is set this indicates that an alternating current component has been detected. In particular this can be used for the detection of an unacceptable level of co-channel and / or multi path interference. Before the detection process starts the maximum hold detector 1 and the minimum hold detector 2 can be switched to a follow-mode by applying a corresponding control signal to respective inputs of the maximum hold detector 1 and the minimum hold detector 2. In this case the outputs of the maximum hold detector 1 and the minimum hold detector 2 are equal to the input signal SI such that the detectors have a correct initial value to start from. This further improves the detection speed.

Fig. 2 shows an example of the waveform of the input signal SI of Fig. 1. The signal SI has a minimum MINI and a subsequent maximum MAX1. The minimum MINI is detected by the dale detector 4 of Fig. 1 when the signal SI has increased by the detector threshold value Th with respect to the minimum MINI . The detection of the minimum MINI at this point enables the top detector 3 by resetting both the maximum hold detector 1 and the top detector 3. As a consequence the maximum MAXl is detected when the signal SI has fallen below the signal level MAXl by the detector threshold value Th. The corresponding output pulse (signal S3) of the top detector 3 enables the dale detector 4 for the detection of a subsequent minimum of the signal SI. Fig. 3 shows another example of the waveform of the input signal SI of the circuit of Fig. 1. Below the waveform of the signal SI the signal S2 produced at the output of the maximum hold detector 1 (cf. Fig. 1) is depicted in Fig. 3. Below the signal S2 the signal S3 is depicted. The signal S3 consists of a sequence of pulses which are output by the top detector 3 (cf. Fig. 1) when the signal SI has dropped back by the detector threshold value Th after having reached a maximum.

Below the signal S3 the signal S4 of the minimum hold detector 2 (cf. Fig. 1) is depicted in Fig. 3. As it is apparent from Fig. 3 each pulse of the signal S3 resets the minimum hold detector 2 such that the corresponding waveform of the signal S4 results. Further the signal S5 is shown below the signal S4. The signal S5 also consists of a series of pulses. Each pulse indicates the detection of a minimum in the signal SI. A pulse is only output by the dale detector 4 after the signal SI has increased by the detector threshold value Th after having reached a prior minimum. Fig. 4 shows a co-channel interference detector. Co-channel interference detectors typically are used in communication systems and receivers, and in particular in mobile phones and car-radio systems.

An amplitude modulated intermediate frequency signal AM-IF is provided by a receiver circuitry which is not shown in Fig. 4. The AM-IF signal is input into an intermediate frequency level detector 10 which produces a direct current output signal having a ripple in the case of co-channel and / or multi path interference. The frequency of the ripple is in the order of 1 to 40 Hz.

The output signal of the intermediate frequency level detector 10 is low pass filtered by low pass filter 11. The low pass filter 11 has a cut- off frequency of 40 Hz such that audio frequency components are removed and the direct current and ripple components are passed. The output of the low pass filter 11 is provided to a circuit 12 of the type as depicted in Fig. 1. The circuit 12 has an output signal to indicate the presence of a co-channel interference and / or of multi-path interference. This output signal of the circuit 12 can be provided to a microprocessor of the receiver of Fig. 4 (not shown in the drawing) to indicate the presence of interference.

List of reference numerals:

maximum hold detector 1 minimum hold detector 2 top detector 3 dale detector 4 counter 5 timer 6 comparator 7 memory 8 flag 9 intermediate frequency level detector 10 low pass filter 11 circuit 12

Claims

CLAIMS:

1. An electronic circuit for detecting an alternating current component of a signal, the electronic circuit comprising: maximum-hold detector means (1) for holding a maximum signal level reached by the signal, - top detector means (3) having a first input coupled to an output of the maximum-hold detector means for inputting of the maximum signal level, the top detector means having a second input for receiving the signal and having means for comparing the signal to the maximum signal level and means for outputting a top detection signal if the signal falls below the maximum signal level, - minimum-hold detector means (2) for holding a minimum signal level reached by the signal, and dale detector means (4) having a first input coupled to an output of the minimum-hold detector means for inputting of the minimum signal level, the dale detector means having a second input for receiving the signal and having means for comparing the signal to the minimum signal level and means for outputting a dale detection signal if the signal increases above the minimum signal level, the top detection signal and the dale detection signal being indicative of the alternating current component.

2. The electronic circuit of claim 1 , the means for outputting the top detection signal being adapted to output the top detection signal if the signal falls below the maximum signal level by a first threshold value and the means for outputting a dale detection signal being adapted to output the dale detection signal if the signal increases above the minimum signal level by a second threshold value.

3. The electronic circuit of claim 1 or 2, the dale detector means being enabled by the top detection signal and the top detector means being enabled by the dale detection signal.

4. The electronic circuit of claims 1 , 2 or 3, the dale detector means being disabled when the top detector means is enabled and the top detector means being disabled when the dale detector means is enabled.

5. An electronic circuit for detecting an alternating current component of a signal, the electronic circuit comprising: top detector means (3) for outputting a top detection signal if the signal falls below a maximum signal level, the top detection signal being coupled to a counter (5), dale detector means (4) for outputting a dale detection signal if the signal increases above a minimum signal level, the dale detection signal being coupled to the counter, means for comparing (7) a counter value to a counter threshold value and for outputting an alternating current detection signal if the counter value surpasses the counter threshold value.

6. The electronic circuit of claim 5, further comprising a timer (6) coupled to the counter for periodically resetting the counter.

7. The electronic circuit of claim 5 or 6, further comprising means (9) for setting a flag in response to the alternating current detection signal.

8. An interference detector comprising: intermediate frequency level detector means (10) for outputting a signal having a direct current component, and - an electronic circuit for detecting an alternating current component of the signal in accordance with anyone of the proceeding claims.

9. The interference detector of claim 8 further comprising low pass filter means (11) for filtering the signal before the signal is provided to the electronic circuit for detection of the alternating current component.

10. A receiver comprising an electronic circuit in accordance with anyone of the claims 1 to 7 and microprocessor means, the microprocessor means having an input for receiving the top detection signal and the dale detection signal or the alternating current detection signal from the electronic circuit for the purposes of interference indication.

11. A method for detecting an alternating current component of a signal, the method comprising the steps of: holding a maximum signal level reached by the signal, comparing the maximum signal level to an actual signal level, outputting a top detection signal if the actual signal falls below the maximum signal level, - holding a minimum signal level reached by the signal, comparing the actual signal to the minimum signal level, outputting a dale detection signal if the actual signal increases above the minimum signal level, and indicating the alternating current component based on the top detection signal and the dale detection signal.

12. The method of claim 11 whereby the top detection signal is outputted if the actual signal falls below the maximum signal level by a first threshold and whereby the dale detection signal is output if the signal increases above the minimum signal level by a second threshold level.

13. The method of claim 11 or 12 whereby the top detection is disabled when the dale detection is enabled and whereby the dale detection disabled when the top detection is enabled.

14. A method for detecting an alternating current component of a signal, the method comprising the steps of: outputting a top detection signal if the signal falls below a maximum signal level, - outputting a dale detection signal if the signal increases above a minimum signal level, counting the top detection signal and the dale detection signal, comparing the counter value to a counter threshold value, outputting an alternating current detection signal if the counter value surpasses the counter threshold value.

15. The method of claim 14 further comprising resetting the counter at predetermined time intervals.