WO2003003459A3 - Arrangement of a semiconductor component on a substrate - Google Patents
Arrangement of a semiconductor component on a substrate Download PDFInfo
- Publication number
- WO2003003459A3 WO2003003459A3 PCT/DE2002/001896 DE0201896W WO03003459A3 WO 2003003459 A3 WO2003003459 A3 WO 2003003459A3 DE 0201896 W DE0201896 W DE 0201896W WO 03003459 A3 WO03003459 A3 WO 03003459A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- substrate
- chip
- semiconductor component
- arrangement
- contact surfaces
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06572—Auxiliary carrier between devices, the carrier having an electrical connection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
Abstract
The invention relates to an arrangement of a semiconductor component on a substrate, whereby the substrate (30) comprises contact surfaces (32) on an assembly side (31). The semiconductor component comprises a first chip (10) and at least one second chip (20), whereby the second chip (20) is arranged on the first chip (10). The first and the second chip (10, 20) are thus electrically connected to each other. Furthermore the first chip (10) comprises contact surfaces (12) on the first main side (11) thereof, with which the above faces the assembly side (31) of the substrate (30). The contact surfaces of the first chip (10) are electrically connected to the corresponding contact surfaces (32) of the substrate (30) by means of a jointing agent.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10131011.0 | 2001-06-27 | ||
DE10131011.0A DE10131011B4 (en) | 2001-06-27 | 2001-06-27 | Semiconductor chip and arrangement of a semiconductor device on a substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2003003459A2 WO2003003459A2 (en) | 2003-01-09 |
WO2003003459A3 true WO2003003459A3 (en) | 2003-05-30 |
Family
ID=7689650
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2002/001896 WO2003003459A2 (en) | 2001-06-27 | 2002-05-23 | Arrangement of a semiconductor component on a substrate |
Country Status (3)
Country | Link |
---|---|
DE (1) | DE10131011B4 (en) |
TW (1) | TW552696B (en) |
WO (1) | WO2003003459A2 (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5977640A (en) * | 1998-06-26 | 1999-11-02 | International Business Machines Corporation | Highly integrated chip-on-chip packaging |
DE19907276A1 (en) * | 1999-02-20 | 2000-09-07 | Bosch Gmbh Robert | Producing solder connection between electrical/electronic component and carrier substrate involves solder coating of pure tin with thickness of less than 10 microns applied to metal pad |
US6121682A (en) * | 1998-12-26 | 2000-09-19 | Hyundai Electronics Industries Co., Ltd. | Multi-chip package |
US6150724A (en) * | 1998-03-02 | 2000-11-21 | Motorola, Inc. | Multi-chip semiconductor device and method for making the device by using multiple flip chip interfaces |
US6154370A (en) * | 1998-07-21 | 2000-11-28 | Lucent Technologies Inc. | Recessed flip-chip package |
US6225699B1 (en) * | 1998-06-26 | 2001-05-01 | International Business Machines Corporation | Chip-on-chip interconnections of varied characteristics |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11177020A (en) * | 1997-12-11 | 1999-07-02 | Oki Electric Ind Co Ltd | Semiconductor mounting structure and mounting method thereof |
US5897341A (en) * | 1998-07-02 | 1999-04-27 | Fujitsu Limited | Diffusion bonded interconnect |
DE19856573C1 (en) * | 1998-12-08 | 2000-05-18 | Fraunhofer Ges Forschung | Vertical integration of active circuit planes involves connecting two substrates so connection surfaces are electrically connected, reducing second substrate, freeing external connection surfaces |
JP3235589B2 (en) * | 1999-03-16 | 2001-12-04 | 日本電気株式会社 | Semiconductor device |
-
2001
- 2001-06-27 DE DE10131011.0A patent/DE10131011B4/en not_active Expired - Fee Related
-
2002
- 2002-05-23 WO PCT/DE2002/001896 patent/WO2003003459A2/en not_active Application Discontinuation
- 2002-06-12 TW TW091112788A patent/TW552696B/en active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6150724A (en) * | 1998-03-02 | 2000-11-21 | Motorola, Inc. | Multi-chip semiconductor device and method for making the device by using multiple flip chip interfaces |
US5977640A (en) * | 1998-06-26 | 1999-11-02 | International Business Machines Corporation | Highly integrated chip-on-chip packaging |
US6225699B1 (en) * | 1998-06-26 | 2001-05-01 | International Business Machines Corporation | Chip-on-chip interconnections of varied characteristics |
US6154370A (en) * | 1998-07-21 | 2000-11-28 | Lucent Technologies Inc. | Recessed flip-chip package |
US6121682A (en) * | 1998-12-26 | 2000-09-19 | Hyundai Electronics Industries Co., Ltd. | Multi-chip package |
DE19907276A1 (en) * | 1999-02-20 | 2000-09-07 | Bosch Gmbh Robert | Producing solder connection between electrical/electronic component and carrier substrate involves solder coating of pure tin with thickness of less than 10 microns applied to metal pad |
Also Published As
Publication number | Publication date |
---|---|
DE10131011A1 (en) | 2003-01-16 |
DE10131011B4 (en) | 2016-02-18 |
TW552696B (en) | 2003-09-11 |
WO2003003459A2 (en) | 2003-01-09 |
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