WO2003047004A1 - Semiconductor texturing process - Google Patents
Semiconductor texturing process Download PDFInfo
- Publication number
- WO2003047004A1 WO2003047004A1 PCT/AU2002/001625 AU0201625W WO03047004A1 WO 2003047004 A1 WO2003047004 A1 WO 2003047004A1 AU 0201625 W AU0201625 W AU 0201625W WO 03047004 A1 WO03047004 A1 WO 03047004A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- semiconductor material
- layer
- silicon
- protective substance
- etchant
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 88
- 238000000034 method Methods 0.000 title claims abstract description 87
- 230000008569 process Effects 0.000 title claims abstract description 78
- 239000000463 material Substances 0.000 claims abstract description 72
- 239000000126 substance Substances 0.000 claims abstract description 68
- 230000001681 protective effect Effects 0.000 claims abstract description 65
- 238000005530 etching Methods 0.000 claims abstract description 38
- 229910052710 silicon Inorganic materials 0.000 claims description 74
- 239000010703 silicon Substances 0.000 claims description 74
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 33
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 33
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 229920000642 polymer Polymers 0.000 claims description 7
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 4
- 239000006117 anti-reflective coating Substances 0.000 claims description 3
- 238000005229 chemical vapour deposition Methods 0.000 claims description 3
- 238000001704 evaporation Methods 0.000 claims description 3
- 230000008020 evaporation Effects 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 238000004528 spin coating Methods 0.000 claims description 3
- 238000005118 spray pyrolysis Methods 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 75
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 68
- 235000012431 wafers Nutrition 0.000 description 19
- 239000000758 substrate Substances 0.000 description 15
- 239000000243 solution Substances 0.000 description 13
- 239000000203 mixture Substances 0.000 description 10
- 150000004767 nitrides Chemical class 0.000 description 10
- 238000002310 reflectometry Methods 0.000 description 9
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 8
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 8
- 229910017604 nitric acid Inorganic materials 0.000 description 8
- 210000004027 cell Anatomy 0.000 description 6
- 238000001020 plasma etching Methods 0.000 description 6
- 238000000151 deposition Methods 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- 210000002381 plasma Anatomy 0.000 description 5
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 4
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 150000007513 acids Chemical class 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000003667 anti-reflective effect Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- MROCJMGDEKINLD-UHFFFAOYSA-N dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000000635 electron micrograph Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000011282 treatment Methods 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Definitions
- the present invention relates to processes for texturing the surface of a semiconductor, and to semiconductor materials having a textured surface so as to decrease their reflectivity and/or increase the capability of the semiconductor to trap light.
- a texturing technique which can be used for single crystal silicon of (100) orientation is to etch the silicon in a solution of potassium hydroxide (KOH) and isopropyl alcohol (IP A). This results in a surface covered in square base pyramids.
- KOH potassium hydroxide
- IP A isopropyl alcohol
- this approach cannot be used for the case where the silicon surface is not (100) crystallographic orientation.
- RIE reactive ion etching
- these techniques may prove to be expensive or to lead to other disadvantages, such as increased carrier recombination at the silicon surface.
- a process for texturing a surface of a semiconductor material comprising: applying a layer of a protective substance on said surface wherein said layer is sufficiently thin that it has a plurality of apertures therethrough; and contacting said layer and said semiconductor material with an etchant capable of etching said semiconductor material faster than said protective substance, said etchant making contact with said semiconductor material at least through said apertures, for a time and under conditions in which said semiconductor material is etched by said etchant in the vicinity of said apertures to produce a textured surface on said semiconductor material, but said protective substance is substantially unetched.
- the step of applying the layer of protective substance may be a single step, or it may involve first creating a layer of protective substance that has relatively few or no apertures in it, and then partially thinning the layer of protective substance over its entire surface until it is sufficiently thin that a plurality of apertures are formed in it.
- the layer of protective substance, as first created is not perfectly smooth and is therefore thinner in some places than in others. As a result, when the surface of the layer is contacted by an etchant that etches the protective substance, or is otherwise thinned, some parts of the layer will be thinned through more quickly than other parts, giving rise to a plurality of apertures in the layer.
- a process for texturing a surface of a semiconductor material comprising: creating a layer of a protective substance on said surface; substantially uniformly tMnning said layer of protective substance until at least some apertures are formed through said layer; and contacting said layer and said semiconductor material with an etchant capable of etching said semiconductor material faster than said protective substance, said etchant making contact with said semiconductor material at least through said apertures, for a time and under conditions in which said semiconductor material is etched by said etchant in the vicinity of said apertures to produce a textured surface on said semiconductor material, but said protective substance is substantially unetched.
- a semiconductor material at least part of at least one surface of which has a plurality of pits therein wherein said pits are substantially randomly arranged over said part of said at least one surface, and have an interior surface which is at least partially rounded.
- a semiconductor material at least part of at least one surface of which has a plurality of pits therein wherein said pits are substantially randomly arranged over said part of said at least one surface, and have a width of up to 10 ⁇ m.
- the invention provides a semiconductor, at least part of a surface of which has been textured by a process of the first or second embodiment.
- the invention provides a semiconductor having a surface, at least part of which has been textured by etching said surface through a plurality of apertures in a layer of protective substance on said surface, said layer of protective substance having said apertures by virtue of the thinness of said layer.
- the invention further provides a semiconductor material having a layer of protective substance applied to at least part of at least one surface thereof, wherein said layer of protective substance has a plurality of apertures therethrough by virtue of the thinness of said layer.
- the invention provides a solar cell comprising the semiconductor material of any of the third to sixth embodiments.
- substantially unetched is meant that the etching is carried out under conditions in which the semiconductor material is etched in the vicinity of apertures in the protective substance, but sufficient of the protective substance remains on the surface of the semiconductor material at the end of the etching to prevent the semiconductor material from being etched in regions other than in the vicinity of the apertures.
- substantially uniformly is meant that the thinning is carried out under conditions in which the protective layer is thinned at substantially the same rate over its entire surface so that, in a given time, substantially the same thickness of protective substance is removed at all points over the surface.
- the protective substance is any substance that is resistant to etching by at least one etchant capable of etching the semiconductor material, or at least is etched by at least one etchant sufficiently more slowly than the semiconductor material is etched by that etchant so as to be substantially unetched under conditions employed in the processes of the invention.
- the layer of protective substance is typically only a few atomic layers thick and may be formed by known techniques such as chemical vapour deposition or low pressure chemical vapour deposition. Other possible techniques for applying the protective substance include spray pyrolysis, evaporation, sputtering, thermal oxidation and thermal nitridation.
- the layer of protective substance may be a layer of polymer, and is applied to the surface of the semiconductor as a layer that is sufficiently thin that it has a plurality of holes through it.
- the etching step is suitably carried out by plasma etching.
- the polymer is applied by spin coating. Examples of suitable polymers include polymeric photoresists used in integrated circuit manufacture. Examples of suitable plasmas for etching silicon include SF 6 , CF 4 and mixtures of CF 4 and oxygen.
- the layer of protective substance is applied by low pressure chemical vapour deposition, is typically about 2 nm thick, and is an incomplete layer in that it contains numerous holes though which the semiconductor material beneath the protective layer can be etched.
- the layer of protective substance may be deposited on the semiconductor material by any of the ways referred to above in reference to the process of the first embodiment.
- the layer of protective substance, as deposited is typically thicker than in the process of the first embodiment so that, when the layer is applied to the semiconductor, it has no apertures passing through it.
- a layer of protective substance applied to a surface is never of perfectly uniform thickness and when such a layer is gradually thinned, eventually a plurality of apertures is formed in the layer at the positions where it was thinnest prior to the etching. That is, as the layer is thinned, the thickness of the layer is decreased by substantially the same amount over its entire extent, until at least some portions of the layer are thinned through, so creating a plurality of apertures through the layer of protective substance.
- the step of thinning the layer of protective substance is typically an etching step.
- the etchant may be any etchant capable of etching the protective substance uniformly. Such etchants are known to persons of ordinary skill in the art and include various acids and acid mixtures, and plasmas.
- the protective substance is a polymer, it is preferably thinned by plasma etching, typically using an oxygen plasma.
- the apertures in the layer of protective substance are substantially randomly arranged over the surface of the protective substance, since they arise from substantially random variations in the thickness of the layer of protective substance. After the process of the first or second embodiment is carried out, therefore, etch pits remain in the semiconductor material that are substantially randomly arranged over the surface of the semiconductor material.
- the interior surface of the etch pits which have the appearance of hollows formed in the surface of the semiconductor material, is usually, but not necessarily, at least partially rounded. That is, although there may be some faceting on the interior surface of the etch pits, at least part of the interior surface is usually not faceted and flat but has at least some concave regions as a result of the action of the etchant on the semiconductor material. More typically, at least half of the interior surface of the etch pits is rounded. Preferably, there is substantially no faceting on the interior surface of the etch pits.
- the etch pits are typically substantially circular when viewed from above the surface, except where they intersect.
- the etch pits may not appear substantially circular when viewed from above, depending on the crystal orientation of the semiconductor material. Whatever their shape, the etch pits typically range in size up to about 10 ⁇ m across. More usually, the etch pits range in size from less than 1 ⁇ m to about 5 ⁇ m across.
- the etch pits are separated by walls that are typically thinner than the widths of the pits. Usually, at least some of the walls are substantially unetched. However, the majority of the walls are usually formed between etch pits that overlap and therefore come to a point at their top.
- the etchant in the processes of the first and second embodiments may be any etchant that is capable of etching the semiconductor material faster than the protective substance. Such etchants are known to persons of ordinary skill in the art. Where an etchant is used to thin the layer of protective substance in the process of the second embodiment, it may be the same as or different to the etchant used to etch the semiconductor. When the layer of protective substance is a polymer layer, a plasma is usually used to etch the semiconductor.
- the processes of the present invention result in a decreased reflectivity of a surface of a semiconductor material, compared to a polished surface, and/or they improve the light confinement (light trapping) within the semiconductor material.
- the point where an optimal degree of texturing of the semiconductor surface has been reached and etching should be terminated can be determined in several ways.
- One way is to monitor the appearance of a surface that is being textured, such as by eye or by using an apparatus which measures the reflectance of light from the surface.
- a second way is to determine, for a given set of conditions (that is, the nature of the protecting substance, its thickness, the etchant composition and the temperature) the amount of time for optimal results. This can be done by etching samples for various lengths of time and then measuring the reflectance and/or light trapping behaviour of the etched samples under appropriate conditions. The results of such measurements then allow determination of the optimal etch time. It will be appreciated, however, that if an etch solution is used to texture many wafers or many batches of wafers, the etch properties of the solution will change over time. The etch time will then need to be adjusted to continue to obtain optimal texturing results.
- the step of contacting the semiconductor material with the etchant may result in the protective substance being etched to some extent, depending on the etchant used and the etching conditions. If the protective substance is etched to some extent during this step, this may result in more apertures being created in the protective substance, compared to the number of apertures present in the protective substance at the commencement of this step.
- the apertures in the layer of protective substance are very small, typically less than 100 nm in diameter, more typically less than 10 nm in diameter.
- the apertures tend to become enlarged and their number tends to increase.
- the number of apertures, and therefore the number of etch pits in the semiconductor surface typically ranges from about 10 per 100 square microns to about 1000 per 100 square microns.
- the semiconductor material is silicon.
- the protective substance is typically silicon nitride and the etchant is typically a mixture of hydrofluoric acid and nitric acid, such as a 1:50 by volume mixture of 49 % by weight aqueous HF (that is, 49 g of HF in 100 g of aqueous solution) and 70 % by weight aqueous nitric acid.
- aqueous HF that is, 49 g of HF in 100 g of aqueous solution
- Other chemicals may be added to the etchant solution to give desired etch properties, such as to improve wetting of the semiconductor surface. Such additives are well known to persons of ordinary skill in the art of semiconductor etching.
- the semiconductor material is silicon, it may be single crystal silicon, microcrystalline silicon, multicrystalline silicon or polycrystalline silicon.
- a further possibility as an etchant for silicon nitride is a plasma of CF and oxygen.
- the processes of the present invention typically include the further step of removing the protective substance from the surface after the step of etching the semiconductor material has proceeded sufficiently to produce a plurality of etch pits on the surface.
- the protective substance may be removed by applying an etchant that etches the protective substance much more rapidly than the semiconductor material.
- the protective substance may be removed by reactive ion etching or by contact with phosphoric acid at elevated temperature, typically about 180°C.
- silicon nitride may be removed from a silicon substrate by etching in an aqueous solution of hydrogen fluoride, typically a 5% by weight solution of hydrogen fluoride in water.
- the processes of the present invention include the additional steps of removing the layer of protective substance after the step of etching the semiconductor material has proceeded sufficiently to produce a plurality of etch pits on the surface, and then applying an antireflective layer over the entire surface by conventional methods. It has been found that in this way, a substantially greater decrease in reflectivity is obtainable, compared to applying an antireflective coating alone.
- a process of the first embodiment or the second embodiment can give rise to a surface from which about 50 % less visible light is reflected, compared to a polished surface. If an antireflective coating is applied to a surface that has been textured by a process of the present invention, an even greater decrease in the amount of visible light reflected by the surface can be achieved.
- the step of etching the semiconductor may be achieved by contacting with a 1:50 (v/v) HF/nitric acid mixture as described above for a time of a few minutes, typically 2-5 minutes, at ordinary room temperatures. In some instances it may be desirable to grow a thin (for example, 20-30nm) layer of silicon dioxide on a silicon substrate prior to silicon nitride deposition.
- the growth of the oxide is not necessary for carrying out the process of the present invention (it has been observed that the process of the present invention is unaffected by the presence of a layer of silicon dioxide below the silicon nitride protective substance, except for a small increase in the time taken for the process to be completed). It has been found, however, that the presence of such an oxide layer helps to avoid degradation of the electronic properties of the silicon substrate, which is sometimes observed when no oxide is present under the layer of silicon nitride.
- the process of the present invention are particularly advantageous for texturing surfaces which are not accessible to radiation, such as surfaces of silicon strips held in a frame of silicon and produced as described in International Patent Application No. WO 02/45143.
- the semiconductor material is a strip of silicon having a thickness of less than 100 ⁇ m and a width of up to about 3 mm and wherein at least one opposite pair of surfaces has been textured by a process according to the present invention. That is, each of at least one pair of opposite surfaces has a plurality of pits therein wherein the pits are substantially randomly distributed over the surface of the strip, and have an interior surface which is at least partially rounded, and/or have a width of up to 10 ⁇ m.
- Figure 1 is a schematic diagram of a silicon strip following surface texturing as described herein.
- FIGS. 2A - 2D are schematic diagrams illustrating a process in accordance with the present invention.
- Figure 3 is a graph showing the amount of light absorbed by strips of silicon treated by a process of the present invention (as a fraction of the amount of light entering the strip) in comparison with a silicon wafer that is polished on both sides.
- Figures 4 to 6 are electron micrographs of surfaces of silicon that have been textured by a process of the present invention. DETAILED DESCRIPTION OF THE DRAWINGS
- Figure 1 shows a cross sectional view of a silicon strip 1 following texturing by a process in accordance with the first embodiment of the present invention.
- the texturing process is as follows.
- a thin layer of silicon nitride 2 is deposited on the silicon strip substrate 1 by low pressure chemical vapour deposition (LPCVD).
- LPCVD low pressure chemical vapour deposition
- This technique results in a uniform and conforaial layer of silicon nitride 2 over the substrate surface.
- silicon nitride 2 is also deposited by LPCVD down narrow channels or slots and onto the sidewalls of silicon strips created by the process described in International Patent Application No. WO 02/45143.
- Control of the etching process can be achieved by varying the silicon nitride deposition parameters, which may influence the density of holes 5 in the layer 2, and by varying the etch time and temperature. If a lower etch temperature is used, a lower etch rate of silicon nitride 2 compared to silicon 1 can be obtained. For example, at 0°C, the etch solution etches silicon nitride 2 about 6000 times slower than silicon. It is also possible to carry out the above texturing process twice in order to obtain a further improvement in the texture properties.
- Figures 2A - 2D show, in diagrammatic form, cross sectional views of a silicon surface at various stages of a process according to the second embodiment of the present invention.
- a thin layer of silicon nitride 2 of the order of 2-4nm thick, is deposited on the surface of a silicon substrate 1 by LPCVD.
- Figure 2A shows the silicon substrate 1 following nitride deposition.
- Nitride layer 2 as applied to the surface of silicon 1, is not a completely smooth film but contains some thickness variations. This is shown diagrammatically in Figure 2 A by depressions 3, 4.
- depressions may extend all the way to the silicon substrate surface, creating a plurality of apertures in the nitride layer, or they may extend only part of the way through the nitride layer, as shown in Figure 2A. Also as shown in Figure 2A, the depressions have different depths.
- the silicon substrate is immersed in a solution which etches the silicon nitride.
- This solution could be, for example, a solution of 49% by weight aqueous hydrofluoric acid diluted with ten times its volume of water, or a mixture of hydrofluoric and nitric acid, such as a 1 :50 by volume mixture of 49% by weight aqueous HF and 70% by weight nitric acid.
- the silicon nitride layer is gradually thinned in a uniform fashion.
- nitride layer becomes sufficiently thin that the deepest depressions 3 expose the surface of silicon substrate 1, creating a plurality of apertures 5 in nitride layer 2. This is shown in Figure 2B. Less deep depressions 4 in nitride layer 2 do not penetrate all the way through to silicon substrate 1 at this stage.
- Silicon substrate 1 is now immersed in a solution which etches silicon much faster than it etches silicon nitride, such as a 1:50 by volume mixture of 49% by weight aqueous HF and 70% by weight nitric acid. This results in the formation of etch pits 6 in silicon substrate 1 at the locations where apertures 5 had been formed, as shown in Figure 2C.
- the thin layer of silicon nitride 2 overhanging the etch pits 6 is very fragile and breaks off, allowing access for fresh etchant to the etch pits 6.
- the etch pits 6 become larger as the etching process continues.
- the silicon nitride layer 2 is also thinned slightly. This may result in further apertures 7 being created in it.
- Etching can be carried out over a range of temperatures, hi particular, lower temperatures generally lead to a lower etch rate of silicon nitride compared to the etch rate of silicon, so that etching at 0°C rather than room temperature, for example, may be desirable in some circumstances.
- the silicon nitride layer may also be treated to decrease its etch rate in a range of sihcon etchants. For example, annealing of silicon nitride at high temperatures (1000-1100°C) generally results in a decrease in its etch rate in sihcon etchants.
- the above texturing technique is particularly advantageous for thin film silicon cells since it only consumes a small amount of silicon in the texturing process (approximately 2-3 microns on each textured surface).
- the texturing technique can be applied to silicon wafers or films of arbitrary grain size.
- deposition of silicon nitride was carried out by low pressure chemical vapour deposition at 750°C with a dichlorosilane flowrate of 30 standard cubic centimetres per minute (seem), an ammonia flow rate of 120 seem and a pressure of 70 Pa. Typical deposition time was 75 seconds.
- a silicon nitride layer approximately 2 nm thick was deposited on a polished silicon wafer of (111 ) orientation.
- a sample was cut out of the wafer and etched in a solution of 1 :50 hydrofluoric acid:nitric acid at 0°C.
- the sample was encapsulated behind 1mm thick low iron glass using silicone and its reflectance was measured using a spectrophotometer with an integrating sphere.
- the sample had a reflectivity of 11% at 900nm, while a polished encapsulated silicon reference wafer had a reflectivity of 24% and a sample of (100) oriented silicon textured with inverted pyramids had a reflectivity of 8% at the same wavelength.
- a 100mm diameter, 1mm thick, (110) oriented silicon wafer was used. Thin silicon strips spaced 105 microns apart and approximately 70 microns thick were produced in the wafer, following the processes described in International Patent Application no. WO 02/45143. The sidewalls of the thin silicon strips so produced are highly polished. It was desired to texture the sidewalls as they would form the sunward facing surfaces in a solar cell. A thin layer of silicon nitride was deposited on the wafer. One of the thin silicon strips was broken out of the wafer and mounted on the wafer surface. In this way, the sidewall surface of one of the silicon strips was clearly visible during the etching process. After a period of approximately 5 minutes etching at room temperature with the same etchant described in Example 1, the strips had textured optimally and etching was terrninated. The silicon strips were now approximately 65 microns thick.
- FIG. 3 shows the amount of light absorbed (as a fraction of the amount of light entering the silicon) for the textured, 65 micron thick strips in comparison with untextured, 70 micron thick strips. It is clear that the texturing process results in significantly improved light trapping in the wavelength range 850- HOOnm, thus allowing significantly improved energy conversion efficiency if the texturing process is applied to silicon solar cells.
- Example 3 Surface passivation Several (111) oriented, >1000 ohm-cm, boron doped float-zoned silicon wafers were used. An oxide approximately 30nm thick was thermally grown on the wafers.
- a thin layer of silicon nitride was then deposited and the wafers were textured as described in Example 2. Following texturing, the wafers were given a phosphorus diffusion and a 30nm thick oxide was thermally grown. The wafers were then given an anneal in a mixture of 5% hydrogen and 95% nitrogen at 430°C for 30 minutes. The emitter saturation cureent density following these treatments was measured to be 20-25fA cm per side. This low value indicates that excellent surface passivation can be achieved on the textured surfaces.
- Advanta es of the processes of the present invention provide relatively simple and inexpensive ways of reducing the reflectivity of a surface of a semiconductor material. Further, the processes of the present invention permit surfaces to be textured (and thereby have their reflectivity reduced) which are not exposed to radiation and which are therefore incapable of being textured by reactive ion etching, for example. Still further, the processes of the present invention are applicable to surfaces of (111) crystallographic orientation, which are not capable of being textured by etching with anisotropic etchants such as potassium hydroxide.
Abstract
Description
Claims
Priority Applications (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2004-7008186A KR20040068928A (en) | 2001-11-29 | 2002-11-29 | Semiconductor texturing process |
CN028268679A CN1613155B (en) | 2001-11-29 | 2002-11-29 | Semiconductor structurizing technology |
JP2003548320A JP4530662B2 (en) | 2001-11-29 | 2002-11-29 | Semiconductor texturing process |
CA2467112A CA2467112C (en) | 2001-11-29 | 2002-11-29 | Semiconductor texturing process |
EP02779038A EP1461834A4 (en) | 2001-11-29 | 2002-11-29 | Semiconductor texturing process |
US10/497,248 US7828983B2 (en) | 2001-11-29 | 2002-11-29 | Semiconductor texturing process |
IL16219002A IL162190A0 (en) | 2001-11-29 | 2002-11-29 | Semiconductor texturing process |
AU2002342438A AU2002342438C1 (en) | 2001-11-29 | 2002-11-29 | Semiconductor texturing process |
IL162190A IL162190A (en) | 2000-11-29 | 2004-05-27 | Semiconductor texturing process |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AUPCT/AU01/01546 | 2001-11-29 | ||
PCT/AU2001/001546 WO2002045143A1 (en) | 2000-11-29 | 2001-11-29 | Semiconductor wafer processing to increase the usable planar surface area |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2003047004A1 true WO2003047004A1 (en) | 2003-06-05 |
Family
ID=3700898
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/AU2002/001625 WO2003047004A1 (en) | 2000-11-29 | 2002-11-29 | Semiconductor texturing process |
Country Status (10)
Country | Link |
---|---|
US (1) | US7828983B2 (en) |
EP (1) | EP1461834A4 (en) |
JP (1) | JP4530662B2 (en) |
KR (1) | KR20040068928A (en) |
CN (1) | CN1613155B (en) |
CA (1) | CA2467112C (en) |
IL (1) | IL162190A0 (en) |
MY (1) | MY144264A (en) |
WO (1) | WO2003047004A1 (en) |
ZA (1) | ZA200405144B (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1965439A2 (en) * | 2007-02-28 | 2008-09-03 | Centrotherm Photovoltaics Technology GmbH | Method for texturising surfaces |
US7910392B2 (en) | 2007-04-02 | 2011-03-22 | Solaria Corporation | Method and system for assembling a solar cell package |
US7910035B2 (en) | 2007-12-12 | 2011-03-22 | Solaria Corporation | Method and system for manufacturing integrated molded concentrator photovoltaic device |
US7910822B1 (en) | 2005-10-17 | 2011-03-22 | Solaria Corporation | Fabrication process for photovoltaic cell |
US8049098B2 (en) | 2007-09-05 | 2011-11-01 | Solaria Corporation | Notch structure for concentrating module and method of manufacture using photovoltaic strips |
US8227688B1 (en) | 2005-10-17 | 2012-07-24 | Solaria Corporation | Method and resulting structure for assembling photovoltaic regions onto lead frame members for integration on concentrating elements for solar cells |
US9583668B2 (en) | 2000-11-29 | 2017-02-28 | The Australian National University | Semiconductor device |
Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7442629B2 (en) | 2004-09-24 | 2008-10-28 | President & Fellows Of Harvard College | Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate |
US7057256B2 (en) | 2001-05-25 | 2006-06-06 | President & Fellows Of Harvard College | Silicon-based visible and near-infrared optoelectric devices |
TWI267897B (en) * | 2005-11-10 | 2006-12-01 | Tatung Co | Substrate with anti-reflection layer and its manufacturing method |
US20110041910A1 (en) * | 2009-08-18 | 2011-02-24 | Semiconductor Energy Laboratory Co., Ltd. | Photoelectric conversion device and manufacturing method thereof |
US9673243B2 (en) | 2009-09-17 | 2017-06-06 | Sionyx, Llc | Photosensitive imaging devices and associated methods |
US9911781B2 (en) | 2009-09-17 | 2018-03-06 | Sionyx, Llc | Photosensitive imaging devices and associated methods |
US8101522B2 (en) * | 2010-02-25 | 2012-01-24 | National Taiwan University | Silicon substrate having nanostructures and method for producing the same and application thereof |
US20110212622A1 (en) * | 2010-02-26 | 2011-09-01 | International Business Machines Corporation | Surface texturing using a low quality dielectric layer |
US8692198B2 (en) | 2010-04-21 | 2014-04-08 | Sionyx, Inc. | Photosensitive imaging devices and associated methods |
CN106449684B (en) | 2010-06-18 | 2019-09-27 | 西奥尼克斯公司 | High speed photosensitive device and correlation technique |
CN102097534A (en) * | 2010-11-18 | 2011-06-15 | 中国科学院宁波材料技术与工程研究所 | Method for simultaneously forming crystal silicon solar cell PN junction and silicon nitride antireflection film |
US8440494B2 (en) | 2011-05-20 | 2013-05-14 | International Business Machines Corporation | Single-crystalline silicon alkaline texturing with glycerol or ethylene glycol additives |
USD699176S1 (en) | 2011-06-02 | 2014-02-11 | Solaria Corporation | Fastener for solar modules |
US9496308B2 (en) | 2011-06-09 | 2016-11-15 | Sionyx, Llc | Process module for increasing the response of backside illuminated photosensitive imagers and associated methods |
US8637405B2 (en) | 2011-06-21 | 2014-01-28 | International Business Machines Corporation | Silicon surface texturing method for reducing surface reflectance |
WO2013010127A2 (en) | 2011-07-13 | 2013-01-17 | Sionyx, Inc. | Biometric imaging devices and associated methods |
US9064764B2 (en) | 2012-03-22 | 2015-06-23 | Sionyx, Inc. | Pixel isolation elements, devices, and associated methods |
US20140110805A1 (en) | 2012-10-18 | 2014-04-24 | Infineon Technologies Dresden Gmbh | Silicon light trap devices, systems and methods |
US11538949B2 (en) | 2013-02-03 | 2022-12-27 | Mark R. Schroeder | Sensor comprising a photovoltaic device |
US10872988B1 (en) | 2013-02-03 | 2020-12-22 | Mark R. Schroeder | Photovoltaic device |
US9762830B2 (en) | 2013-02-15 | 2017-09-12 | Sionyx, Llc | High dynamic range CMOS image sensor having anti-blooming properties and associated methods |
US9939251B2 (en) | 2013-03-15 | 2018-04-10 | Sionyx, Llc | Three dimensional imaging utilizing stacked imager devices and associated methods |
US8957490B2 (en) | 2013-06-28 | 2015-02-17 | Infineon Technologies Dresden Gmbh | Silicon light trap devices |
US9209345B2 (en) * | 2013-06-29 | 2015-12-08 | Sionyx, Inc. | Shallow trench textured regions and associated methods |
US8951825B1 (en) | 2013-09-10 | 2015-02-10 | Palo Alto Research Center Incorporated | Solar cell texturing |
WO2015038340A1 (en) * | 2013-09-10 | 2015-03-19 | Bandgap Engineering, Inc. | Metal assisted etch combined with regularizing etch |
TWI543391B (en) * | 2015-04-09 | 2016-07-21 | 新日光能源科技股份有限公司 | Solar cell and fabrication method thereof |
DE102020111371A1 (en) * | 2020-02-27 | 2021-09-02 | Taiwan Semiconductor Manufacturing Co. Ltd. | ABSORPTION ENRICHMENT STRUCTURE TO INCREASE THE QUANTUM EFFICIENCY OF AN IMAGE SENSOR |
US11538836B2 (en) * | 2020-08-13 | 2022-12-27 | Omnivision Technologies, Inc. | Cell deep trench isolation pyramid structures for CMOS image sensors |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5139974A (en) * | 1991-01-25 | 1992-08-18 | Micron Technology, Inc. | Semiconductor manufacturing process for decreasing the optical refelctivity of a metal layer |
WO2000028602A1 (en) * | 1998-11-06 | 2000-05-18 | Pacific Solar Pty Limited | Thin films with light trapping |
Family Cites Families (150)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3278811A (en) | 1960-10-04 | 1966-10-11 | Hayakawa Denki Kogyo Kabushiki | Radiation energy transducing device |
US3422527A (en) | 1965-06-21 | 1969-01-21 | Int Rectifier Corp | Method of manufacture of high voltage solar cell |
GB1186340A (en) | 1968-07-11 | 1970-04-02 | Standard Telephones Cables Ltd | Manufacture of Semiconductor Devices |
US3690953A (en) | 1970-09-10 | 1972-09-12 | Us Air Force | Vertical junction hardened solar cell |
JPS495265A (en) | 1972-04-28 | 1974-01-17 | ||
US4409422A (en) | 1974-11-08 | 1983-10-11 | Sater Bernard L | High intensity solar cell |
US4332973A (en) | 1974-11-08 | 1982-06-01 | Sater Bernard L | High intensity solar cell |
US4516314A (en) | 1974-11-08 | 1985-05-14 | Sater Bernard L | Method of making a high intensity solar cell |
US3985579A (en) | 1975-11-26 | 1976-10-12 | The United States Of America As Represented By The Secretary Of The Air Force | Rib and channel vertical multijunction solar cell |
US4082570A (en) | 1976-02-09 | 1978-04-04 | Semicon, Inc. | High intensity solar energy converter |
US4110122A (en) | 1976-05-26 | 1978-08-29 | Massachusetts Institute Of Technology | High-intensity, solid-state-solar cell device |
US4038104A (en) | 1976-06-07 | 1977-07-26 | Kabushiki Kaisha Suwa Seikosha | Solar battery |
JPS5373075A (en) * | 1976-12-13 | 1978-06-29 | Fujitsu Ltd | Treatment method for wafer surface |
US4153476A (en) | 1978-03-29 | 1979-05-08 | Nasa | Double-sided solar cell package |
US4278473A (en) | 1979-08-24 | 1981-07-14 | Varian Associates, Inc. | Monolithic series-connected solar cell |
US4444992A (en) | 1980-11-12 | 1984-04-24 | Massachusetts Institute Of Technology | Photovoltaic-thermal collectors |
DE3047383A1 (en) | 1980-12-16 | 1982-07-15 | Siemens AG, 1000 Berlin und 8000 München | SOLAR CELL WITH INCREASED EFFICIENCY |
US4527183A (en) | 1981-07-10 | 1985-07-02 | General Electric Company | Drilled, diffused radiation detector |
US4407695A (en) * | 1981-12-31 | 1983-10-04 | Exxon Research And Engineering Co. | Natural lithographic fabrication of microstructures over large areas |
US4409423A (en) | 1982-03-09 | 1983-10-11 | The United States Of America As Represented By The Secretary Of The Air Force | Hole matrix vertical junction solar cell |
US4554727A (en) | 1982-08-04 | 1985-11-26 | Exxon Research & Engineering Company | Method for making optically enhanced thin film photovoltaic device using lithography defined random surfaces |
US4633031A (en) | 1982-09-24 | 1986-12-30 | Todorof William J | Multi-layer thin film, flexible silicon alloy photovoltaic cell |
JPS5959883A (en) * | 1982-09-30 | 1984-04-05 | Fujitsu Ltd | Surface roughening method |
JPS59123283A (en) * | 1982-12-28 | 1984-07-17 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion device |
JPS59123279A (en) * | 1982-12-28 | 1984-07-17 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric conversion device |
JPS59123279U (en) | 1983-02-09 | 1984-08-20 | オリオン機械株式会社 | Defrosting device for gas cooling equipment |
JPS59227168A (en) | 1983-06-08 | 1984-12-20 | Fuji Electric Corp Res & Dev Ltd | Semiconductor radioactive ray detector |
US4626613A (en) | 1983-12-23 | 1986-12-02 | Unisearch Limited | Laser grooved solar cell |
GB8417303D0 (en) | 1984-07-06 | 1984-08-08 | Secr Defence | Infra-red detector |
JPS61108176A (en) * | 1984-11-01 | 1986-05-26 | Fuji Electric Co Ltd | Method for coarsening surface |
JPS61108176U (en) | 1984-12-19 | 1986-07-09 | ||
DE3504705A1 (en) | 1985-02-12 | 1986-08-14 | Siemens AG, 1000 Berlin und 8000 München | APERTURE DISPLAY WITH CELL-SHAPED MULTIPLE HOLE STRUCTURE AND PUSHING ELECTRODES FOR THE GENERATION OF A MULTIPLE OF INDIVIDUALLY TESTABLE BODY BEAM PROBE FOR A LITHOGRAPH DEVICE |
JPS625671A (en) | 1985-07-02 | 1987-01-12 | Sanyo Electric Co Ltd | Manufacture of photovoltaic device |
JPS6254927A (en) * | 1985-09-03 | 1987-03-10 | Sanyo Electric Co Ltd | Photovoltaic device |
JPH0753782B2 (en) | 1985-12-23 | 1995-06-07 | 株式会社ブリヂストン | Transparent film and laminate having the film |
GB2203895B (en) | 1987-03-25 | 1990-05-09 | Matsushita Electric Works Ltd | Light receiving element |
US4892592A (en) | 1987-03-26 | 1990-01-09 | Solarex Corporation | Thin film semiconductor solar cell array and method of making |
DE3803769A1 (en) | 1988-02-08 | 1989-08-17 | Siemens Ag | Method for producing thin, strip-shaped silicon crystals having a planar surface, suitable for fabrication of solar cells |
US4883561A (en) | 1988-03-29 | 1989-11-28 | Bell Communications Research, Inc. | Lift-off and subsequent bonding of epitaxial films |
US4989059A (en) | 1988-05-13 | 1991-01-29 | Mobil Solar Energy Corporation | Solar cell with trench through pn junction |
US5082791A (en) | 1988-05-13 | 1992-01-21 | Mobil Solar Energy Corporation | Method of fabricating solar cells |
US5081049A (en) | 1988-07-18 | 1992-01-14 | Unisearch Limited | Sculpted solar cell surfaces |
US5389158A (en) | 1989-04-17 | 1995-02-14 | The Boeing Company | Low bandgap photovoltaic cell with inherent bypass diode |
US5116464A (en) | 1989-06-02 | 1992-05-26 | Massachusetts Institute Of Technology | Cesium hydroxide etch of a semiconductor crystal |
US5011544A (en) | 1989-09-08 | 1991-04-30 | Solarex Corporation | Solar panel with interconnects and masking structure, and method |
US5081409A (en) * | 1989-11-13 | 1992-01-14 | Performance Controls, Inc. | Pulse-width modulated circuit for driving a load |
US5073230A (en) | 1990-04-17 | 1991-12-17 | Arizona Board Of Regents Acting On Behalf Of Arizona State University | Means and methods of lifting and relocating an epitaxial device layer |
DK170189B1 (en) | 1990-05-30 | 1995-06-06 | Yakov Safir | Process for the manufacture of semiconductor components, as well as solar cells made therefrom |
US5067985A (en) | 1990-06-08 | 1991-11-26 | The United States Of America As Represented By The Secretary Of The Air Force | Back-contact vertical-junction solar cell and method |
KR930008580B1 (en) * | 1990-06-22 | 1993-09-09 | 현대전자산업 주식회사 | Capacitor cell having a granulated layer and manufacturing method thereof |
DE4021541C1 (en) | 1990-07-06 | 1991-12-19 | Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung Ev, 8000 Muenchen, De | |
US5136346A (en) | 1990-09-07 | 1992-08-04 | Motorola, Inc. | Photon stimulated variable capacitance effect devices |
US5098482A (en) | 1990-11-07 | 1992-03-24 | Solarex Corporation | Vertical junction solar cell |
KR920018987A (en) | 1991-03-23 | 1992-10-22 | 김광호 | Manufacturing method of capacitor |
JP2837296B2 (en) | 1991-10-17 | 1998-12-14 | シャープ株式会社 | Solar cell |
DE4202455C1 (en) | 1992-01-29 | 1993-08-19 | Siemens Ag, 8000 Muenchen, De | |
JP3276682B2 (en) | 1992-08-06 | 2002-04-22 | オリンパス光学工業株式会社 | Endoscope bending operation device |
US5266125A (en) | 1992-05-12 | 1993-11-30 | Astropower, Inc. | Interconnected silicon film solar cell array |
US5447576A (en) | 1992-08-03 | 1995-09-05 | Siemens Solar Industries International, Inc. | Composition and method for encapsulating a solar cell which minimizes thermal discoloration |
US5367217A (en) | 1992-11-18 | 1994-11-22 | Alliedsignal Inc. | Four bar resonating force transducer |
JPH06213554A (en) | 1993-01-14 | 1994-08-02 | Fuji Electric Co Ltd | Chilled air-circulating type open showcase |
DE4310206C2 (en) | 1993-03-29 | 1995-03-09 | Siemens Ag | Method for producing a solar cell from a substrate wafer |
US5344517A (en) | 1993-04-22 | 1994-09-06 | Bandgap Technology Corporation | Method for lift-off of epitaxial layers and applications thereof |
US5538902A (en) | 1993-06-29 | 1996-07-23 | Sanyo Electric Co., Ltd. | Method of fabricating a photovoltaic device having a three-dimensional shape |
US5391236A (en) | 1993-07-30 | 1995-02-21 | Spectrolab, Inc. | Photovoltaic microarray structure and fabrication method |
US5470761A (en) | 1993-09-13 | 1995-11-28 | Westinghouse Electric Corporation | Process for fabricating a front surface resonant mesh array detector |
KR970002140B1 (en) | 1993-12-27 | 1997-02-24 | 엘지반도체 주식회사 | Semiconductor device, packaging method and lead tape |
JPH07188947A (en) * | 1993-12-27 | 1995-07-25 | Sumitomo Metal Mining Co Ltd | Surface roughening method |
US5478402A (en) | 1994-02-17 | 1995-12-26 | Ase Americas, Inc. | Solar cell modules and method of making same |
JP3032422B2 (en) | 1994-04-28 | 2000-04-17 | シャープ株式会社 | Solar cell and method of manufacturing the same |
US5466302A (en) | 1994-05-09 | 1995-11-14 | Regents Of The University Of California | Solar cell array interconnects |
US5474620A (en) | 1994-05-16 | 1995-12-12 | United Solar Systems Corporation | Cut resistant laminate for the light incident surface of a photovoltaic module |
EP0718873A3 (en) | 1994-12-21 | 1998-04-15 | MEMC Electronic Materials, Inc. | Cleaning process for hydrophobic silicon wafers |
JPH08213554A (en) * | 1995-02-02 | 1996-08-20 | Miyazaki Oki Electric Co Ltd | Forming method of roughened polysilicon film |
US5538563A (en) | 1995-02-03 | 1996-07-23 | Finkl; Anthony W. | Solar energy concentrator apparatus for bifacial photovoltaic cells |
US5641381A (en) | 1995-03-27 | 1997-06-24 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Preferentially etched epitaxial liftoff of InP material |
WO1996036999A1 (en) | 1995-05-19 | 1996-11-21 | Dr. Johannes Heidenhain Gmbh | Radiation-sensitive detector element and a method of producing it |
CN1089486C (en) | 1995-06-26 | 2002-08-21 | 精工爱普生株式会社 | Method of formation of crystalline semiconductor film, method of production of thin-film transistor, method of production of solar cell, and active matrix type liquid crystal device |
JP2915327B2 (en) | 1995-07-19 | 1999-07-05 | キヤノン株式会社 | Solar cell module and method of manufacturing the same |
US5567248A (en) | 1995-09-05 | 1996-10-22 | Chung; Darius | Modular solar cell contact arrangement |
US5851928A (en) * | 1995-11-27 | 1998-12-22 | Motorola, Inc. | Method of etching a semiconductor substrate |
US5733382A (en) | 1995-12-18 | 1998-03-31 | Hanoka; Jack I. | Solar cell modules and method of making same |
US5904546A (en) | 1996-02-12 | 1999-05-18 | Micron Technology, Inc. | Method and apparatus for dicing semiconductor wafers |
US5895530A (en) | 1996-02-26 | 1999-04-20 | Applied Materials, Inc. | Method and apparatus for directing fluid through a semiconductor processing chamber |
US6107161A (en) | 1996-06-07 | 2000-08-22 | Rohm Co., Ltd. | Semiconductor chip and a method for manufacturing thereof |
US5841179A (en) | 1996-08-28 | 1998-11-24 | Advanced Micro Devices, Inc. | Conductive layer with anti-reflective surface portion |
US5773791A (en) | 1996-09-03 | 1998-06-30 | Kuykendal; Robert | Water laser machine tool |
US6162658A (en) | 1996-10-14 | 2000-12-19 | Unisearch Limited | Metallization of buried contact solar cells |
US6091021A (en) | 1996-11-01 | 2000-07-18 | Sandia Corporation | Silicon cells made by self-aligned selective-emitter plasma-etchback process |
US5904548A (en) | 1996-11-21 | 1999-05-18 | Texas Instruments Incorporated | Trench scribe line for decreased chip spacing |
KR20000057143A (en) | 1996-11-22 | 2000-09-15 | 칼 하인쯔 호르닝어 | Process for manufacturing micromechanical functional elements |
DE19650111B4 (en) | 1996-12-03 | 2004-07-01 | Siemens Solar Gmbh | Low shading solar cell and manufacturing method |
KR100243741B1 (en) * | 1996-12-27 | 2000-02-01 | 김영환 | Manufacturing method of a semiconductor device |
AUPO468697A0 (en) | 1997-01-21 | 1997-02-13 | Australian National University, The | A method of producing thin silicon epitaxial films |
JP3436858B2 (en) | 1997-02-27 | 2003-08-18 | シャープ株式会社 | Manufacturing method of thin film solar cell |
DE19710375C2 (en) | 1997-03-13 | 2002-11-07 | Micronas Semiconductor Holding | Process for the production of spatially structured components |
JP3772456B2 (en) | 1997-04-23 | 2006-05-10 | 三菱電機株式会社 | Solar cell, method for manufacturing the same, and semiconductor manufacturing apparatus |
JP3468670B2 (en) | 1997-04-28 | 2003-11-17 | シャープ株式会社 | Solar cell and manufacturing method thereof |
US6180869B1 (en) | 1997-05-06 | 2001-01-30 | Ebara Solar, Inc. | Method and apparatus for self-doping negative and positive electrodes for silicon solar cells and other devices |
US5997713A (en) * | 1997-05-08 | 1999-12-07 | Nanosciences Corporation | Silicon etching process for making microchannel plates |
US6155909A (en) | 1997-05-12 | 2000-12-05 | Silicon Genesis Corporation | Controlled cleavage system using pressurized fluid |
JP3805889B2 (en) | 1997-06-20 | 2006-08-09 | 株式会社カネカ | Solar cell module and manufacturing method thereof |
US5930644A (en) * | 1997-07-23 | 1999-07-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming a shallow trench isolation using oxide slope etching |
JPH11238689A (en) * | 1997-08-08 | 1999-08-31 | Shigeo Yamamoto | Epitaxial semiconductor wafer |
US6008449A (en) | 1997-08-19 | 1999-12-28 | Cole; Eric D. | Reflective concentrating solar cell assembly |
JPH1168131A (en) * | 1997-08-25 | 1999-03-09 | Citizen Watch Co Ltd | Manufacture of solar battery |
DE19741832A1 (en) | 1997-09-23 | 1999-03-25 | Inst Solarenergieforschung | Method of manufacturing a solar cell and solar cell |
US6320116B1 (en) | 1997-09-26 | 2001-11-20 | Evergreen Solar, Inc. | Methods for improving polymeric materials for use in solar cell applications |
JP3618973B2 (en) | 1997-10-01 | 2005-02-09 | キヤノン株式会社 | Manufacturing method of semiconductor device and photodetector |
US6005276A (en) | 1997-11-12 | 1999-12-21 | Advanced Photonix, Inc. | Solid state photodetector with light-responsive rear face |
JPH11163284A (en) * | 1997-12-01 | 1999-06-18 | Matsushita Electron Corp | Manufacture of semiconductor storage device |
US6455873B1 (en) | 1997-12-03 | 2002-09-24 | State Of Oregon Acting By And Through The State Board Of Higher Education On Behalf Of The University Of Oregon | Devices having a semiconductor/conducting polymer interface |
US5972732A (en) | 1997-12-19 | 1999-10-26 | Sandia Corporation | Method of monolithic module assembly |
JPH11186572A (en) | 1997-12-22 | 1999-07-09 | Canon Inc | Photoelectromotive force element module |
US6074514A (en) * | 1998-02-09 | 2000-06-13 | Applied Materials, Inc. | High selectivity etch using an external plasma discharge |
JPH11236689A (en) | 1998-02-25 | 1999-08-31 | Babcock Hitachi Kk | Water treating apparatus for power generating plant and water treatment |
JP3174549B2 (en) | 1998-02-26 | 2001-06-11 | 株式会社日立製作所 | Photovoltaic power generation device, photovoltaic power generation module, and method of installing photovoltaic power generation system |
US6166318A (en) | 1998-03-03 | 2000-12-26 | Interface Studies, Inc. | Single absorber layer radiated energy conversion device |
US6265741B1 (en) * | 1998-04-06 | 2001-07-24 | Siemens Aktiengesellschaft | Trench capacitor with epi buried layer |
US6156967A (en) | 1998-06-04 | 2000-12-05 | Tecstar Power Systems, Inc. | Modular glass covered solar cell array |
US5994641A (en) | 1998-04-24 | 1999-11-30 | Ase Americas, Inc. | Solar module having reflector between cells |
US6110793A (en) | 1998-06-24 | 2000-08-29 | Taiwan Semiconductor Manufacturing Company | Method for making a trench isolation having a conformal liner oxide and top and bottom rounded corners for integrated circuits |
JP2000022185A (en) * | 1998-07-03 | 2000-01-21 | Sharp Corp | Solar cell and its manufacture |
US6156620A (en) * | 1998-07-22 | 2000-12-05 | Lsi Logic Corporation | Isolation trench in semiconductor substrate with nitrogen-containing barrier region, and process for forming same |
KR100277695B1 (en) * | 1998-09-12 | 2001-02-01 | 정선종 | Method for manufacturing a substrate for hybrid optical integrated circuit using S-O optical waveguide |
JP2000101111A (en) | 1998-09-17 | 2000-04-07 | Sharp Corp | Manufacture of solar cell |
JP3259692B2 (en) | 1998-09-18 | 2002-02-25 | 株式会社日立製作所 | Concentrating photovoltaic module, method of manufacturing the same, and concentrating photovoltaic system |
DE19849902A1 (en) | 1998-10-29 | 2000-05-11 | Roland Sittig | Semiconductor device |
US6126311A (en) | 1998-11-02 | 2000-10-03 | Claud S. Gordon Company | Dew point sensor using mems |
US6265653B1 (en) | 1998-12-10 | 2001-07-24 | The Regents Of The University Of California | High voltage photovoltaic power converter |
US6262358B1 (en) | 1999-02-18 | 2001-07-17 | Sharp Kabushiki Kaisha | Solar cell module and solar cell panel using the same |
JP2000261008A (en) | 1999-03-10 | 2000-09-22 | Mitsubishi Electric Corp | Roughening method of silicon substrate surface for solar battery |
JP4017281B2 (en) * | 1999-03-23 | 2007-12-05 | 三洋電機株式会社 | Solar cell and manufacturing method thereof |
US6140603A (en) | 1999-03-31 | 2000-10-31 | Taiwan Semiconductor Manufacturing Co., Ltd | Micro-cleavage method for specimen preparation |
JP2000294813A (en) | 1999-04-07 | 2000-10-20 | Bridgestone Corp | Back cover material for solar cells and solar cell |
AU3951500A (en) | 1999-04-15 | 2000-11-02 | Trenton G. Coroy | Photodiodes with photoconductive gain enhancement |
US6406636B1 (en) | 1999-06-02 | 2002-06-18 | Megasense, Inc. | Methods for wafer to wafer bonding using microstructures |
JP3368876B2 (en) | 1999-11-05 | 2003-01-20 | 株式会社東京精密 | Semiconductor chip manufacturing method |
JP4441102B2 (en) | 1999-11-22 | 2010-03-31 | キヤノン株式会社 | Photovoltaic element and manufacturing method thereof |
JP2001148500A (en) | 1999-11-22 | 2001-05-29 | Sanyo Electric Co Ltd | Solar cell module |
KR100348177B1 (en) | 2000-01-13 | 2002-08-09 | 조동일 | Isolation Method for Single Crystalline Silicon Micro Machining using Deep Trench Dielectric Layer |
JP2001257371A (en) * | 2000-03-13 | 2001-09-21 | Hitachi Ltd | Method for manufacturing solar cell, solar cell and condensing type solar cell module |
DE10020541A1 (en) | 2000-04-27 | 2001-11-08 | Univ Konstanz | Method of manufacturing a solar cell and solar cell |
JP2001332529A (en) | 2000-05-19 | 2001-11-30 | Daido Steel Co Ltd | Surface treatment method for single crystal semiconductor substrate and electrode layer forming method thereof |
US6553729B1 (en) | 2000-06-09 | 2003-04-29 | United Solar Systems Corporation | Self-adhesive photovoltaic module |
DE10031252A1 (en) | 2000-06-27 | 2002-01-10 | Bosch Gmbh Robert | Sectioning of substrate wafer into substrate chips comprises separating substrate chips from one another by selective deep patterning |
AUPR174800A0 (en) | 2000-11-29 | 2000-12-21 | Australian National University, The | Semiconductor processing |
US6649287B2 (en) * | 2000-12-14 | 2003-11-18 | Nitronex Corporation | Gallium nitride materials and methods |
KR100378016B1 (en) | 2001-01-03 | 2003-03-29 | 삼성에스디아이 주식회사 | Method of texturing semiconductor substrate for solar cell |
US6515217B1 (en) | 2001-09-11 | 2003-02-04 | Eric Aylaian | Solar cell having a three-dimensional array of photovoltaic cells enclosed within an enclosure having reflective surfaces |
-
2002
- 2002-11-29 WO PCT/AU2002/001625 patent/WO2003047004A1/en active Application Filing
- 2002-11-29 KR KR10-2004-7008186A patent/KR20040068928A/en active Search and Examination
- 2002-11-29 EP EP02779038A patent/EP1461834A4/en not_active Withdrawn
- 2002-11-29 MY MYPI20091170A patent/MY144264A/en unknown
- 2002-11-29 IL IL16219002A patent/IL162190A0/en unknown
- 2002-11-29 US US10/497,248 patent/US7828983B2/en not_active Expired - Fee Related
- 2002-11-29 CN CN028268679A patent/CN1613155B/en not_active Expired - Fee Related
- 2002-11-29 JP JP2003548320A patent/JP4530662B2/en not_active Expired - Fee Related
- 2002-11-29 CA CA2467112A patent/CA2467112C/en not_active Expired - Fee Related
-
2004
- 2004-06-28 ZA ZA200405144A patent/ZA200405144B/en unknown
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5139974A (en) * | 1991-01-25 | 1992-08-18 | Micron Technology, Inc. | Semiconductor manufacturing process for decreasing the optical refelctivity of a metal layer |
WO2000028602A1 (en) * | 1998-11-06 | 2000-05-18 | Pacific Solar Pty Limited | Thin films with light trapping |
Non-Patent Citations (1)
Title |
---|
See also references of EP1461834A4 * |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9583668B2 (en) | 2000-11-29 | 2017-02-28 | The Australian National University | Semiconductor device |
US7910822B1 (en) | 2005-10-17 | 2011-03-22 | Solaria Corporation | Fabrication process for photovoltaic cell |
US8227688B1 (en) | 2005-10-17 | 2012-07-24 | Solaria Corporation | Method and resulting structure for assembling photovoltaic regions onto lead frame members for integration on concentrating elements for solar cells |
EP1965439A2 (en) * | 2007-02-28 | 2008-09-03 | Centrotherm Photovoltaics Technology GmbH | Method for texturising surfaces |
EP1965439A3 (en) * | 2007-02-28 | 2010-03-24 | Centrotherm Photovoltaics Technology GmbH | Method for texturising surfaces |
US7910392B2 (en) | 2007-04-02 | 2011-03-22 | Solaria Corporation | Method and system for assembling a solar cell package |
US8049098B2 (en) | 2007-09-05 | 2011-11-01 | Solaria Corporation | Notch structure for concentrating module and method of manufacture using photovoltaic strips |
US7910035B2 (en) | 2007-12-12 | 2011-03-22 | Solaria Corporation | Method and system for manufacturing integrated molded concentrator photovoltaic device |
Also Published As
Publication number | Publication date |
---|---|
CN1613155B (en) | 2010-05-05 |
CN1613155A (en) | 2005-05-04 |
KR20040068928A (en) | 2004-08-02 |
CA2467112A1 (en) | 2003-06-05 |
ZA200405144B (en) | 2006-03-29 |
US20050104163A1 (en) | 2005-05-19 |
EP1461834A4 (en) | 2010-06-09 |
JP4530662B2 (en) | 2010-08-25 |
IL162190A0 (en) | 2005-11-20 |
CA2467112C (en) | 2010-07-27 |
EP1461834A1 (en) | 2004-09-29 |
US7828983B2 (en) | 2010-11-09 |
MY144264A (en) | 2011-08-29 |
JP2005510884A (en) | 2005-04-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CA2467112C (en) | Semiconductor texturing process | |
EP2182556B1 (en) | Process for manufacturing solar cell | |
AU2022206802B2 (en) | Solar Cell, Manufacturing Method Thereof, and Photovoltaic Module | |
EP1855322A1 (en) | Crystalline silicon wafer, crystalline silicon solar cell, method for manufacturing crystalline silicon wafer and method for manufacturing crystalline silicon solar cell | |
AU2006243111A1 (en) | Solar cell manufacturing method and solar cell | |
JP2014512673A (en) | Efficient black silicon photovoltaic device with improved blue sensitivity | |
KR101630802B1 (en) | Method for manufacturing solar cell, and solar cell manufactured by the same method | |
US20200220033A1 (en) | Metal-assisted etch combined with regularizing etch | |
NL2006298C2 (en) | Solar cell and method for manufacturing such a solar cell. | |
Ayvazyan et al. | Optimization of surface reflectance for silicon solar cells | |
Addonizio et al. | Plasma etched c-Si wafer with proper pyramid-like nanostructures for photovoltaic applications | |
Marstein et al. | Acidic texturing of multicrystalline silicon wafers | |
AU2002342438C1 (en) | Semiconductor texturing process | |
Vinod et al. | Surface and optical characterization of the porous silicon textured surface | |
TWI330384B (en) | Semiconductor texturing process | |
KR20020031489A (en) | Polycrystalline silicon solar cell and manufacturing method thereof | |
KR20110054874A (en) | Method for forming a selective emitter using doping mask with dopant and method for manufacturing solar cell thereof | |
KR20090040728A (en) | Solar cell using a semiconductor wafer substrate with porous surface and fabrication thereof | |
KR100922346B1 (en) | Solar cell and fabrication method thereof | |
KR101624979B1 (en) | Method for manufacturing solar cell, and solar cell manufactured by the same method | |
JP2005229026A (en) | Silicon-substrate evaluating method | |
Khan et al. | Modeling of surface reflectance of acid textured multicrystalline silicon wafer for solar cell application | |
JP2019125766A (en) | Silicon substrate for solar cell, method for manufacturing silicon substrate for solar cell, and solar cell |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SC SD SE SG SI SK SL TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR IE IT LU MC NL PT SE SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 2467112 Country of ref document: CA Ref document number: 162190 Country of ref document: IL |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2003548320 Country of ref document: JP Ref document number: 1020047008186 Country of ref document: KR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2002779038 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1659/DELNP/2004 Country of ref document: IN |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2002342438 Country of ref document: AU |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2004/05144 Country of ref document: ZA Ref document number: 200405144 Country of ref document: ZA |
|
WWE | Wipo information: entry into national phase |
Ref document number: 20028268679 Country of ref document: CN |
|
WWP | Wipo information: published in national office |
Ref document number: 2002779038 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 10497248 Country of ref document: US |