WO2004019663A2 - The laminate structures and method for the electrical testing thereof - Google Patents

Abstract

A method for testing for defects in a thin-laminate structure suitable for use in a number of different applications, including the manufacture of capacitive PCBs, is provided in which the testing is conducted on the thin-laminate sheet immediately after lamination but prior to formation of multiple panels from the sheet. The invention includes a thin-laminate sheet that is constructed so that the two conductive layers are electrically isolated from one another along the peripheral edges of the sheet.

Description

THIN LAMINATE STRUCTURES AND METHOD FOR THE

ELECTRICAL TESTING THEREOF

Cross Reference to Related Application

This application claims the benefit of U.S. patent application serial

No. 60/406,293, filed August 26, 2002, which is hereby incorporated by reference

in its entirety.

Technical Field

This invention concerns thin-laminate sheets, and more particularly,

to thin-laminate sheet arrangements used to form capacitive printed-circuit boards,

and a process for the electrical testing of the thin-laminate sheets.

Background Conductive plates (also referred to as layers) or printed-circuit

boards (PCBs) are typically made of one or more layers of an insulating or

dielectric material with a continuous thin-layer of a conductive material, such as

copper, being laminated on at least one face and preferably both faces of the

insulating or dielectric material. A predetermined pattern of conducting paths and

connection areas of printed circuits is then made by applying a traditional mask or

the like to the conductive layer and then removing selected regions of the

conductive layer from the dielectric material using traditional techniques, such as

etching, to produce the PCB. The PCB is then used in any number of electrical

applications and typically, one or more devices are formed on the printed circuit

side of the PCB or the devices can be mounted thereto.

In many applications, the PCB is made from a thin-laminate panel

which itself is formed from a larger thin-laminate sheet. That is, several panels are

cut from a single sheet of thin laminate material. Each panel of the PCB includes a

dielectric material, such as a resin-impregnated fiberglass cloth layer ("dielectric

layer"). The panel further includes one and preferably two thin-conductive layers

(e.g., copper foil) laminated to each face of the dielectric layer. The thin-laminate

panels provide the necessary capacitance for all or a substantial number of the

integrated circuits that are formed on the face of the "capacitive" PCB. PCBs can be constructed in several different arrangements depending

upon the intended applications of the finished PCB. For example, one type of PCB

is a thick laminate type and consists of multiple thick panels that are arranged and

bonded to form the PCB. Typically, the thick panels have a thickness of about

0.059 inches or more (i.e., about 1.5 mm). However, over the recent years,

technology has advanced and customer demand has increased for structures that

have much smaller integrated circuit features. The development and popularity of

smaller integrated circuit structures requires thinner dielectric spacing between the

conductive layers that form the printed circuits. As a result, the thickness of the

dielectric material in such panels (and thus the distance between the two opposing

conductive layers) has become increasingly smaller. For example, in current

versions of such panels, the distance between the conductive layers is generally

between about 0.0005 inches (i.e., about 0.013 mm) and about 0.006 inches (i.e.,

about .15 mm). Panels that are constructed with a thin dielectric layer are often

referred to as "thin laminates" or "thin-laminate panels". When designing the PCB,

the thickness of the dielectric layer is determined according to a number of factors,

such as the level of the capacitance necessary for the successful operation of

integrated circuits to be formed on the capacitive PCB which is to be formed from

the panel. A conventional thin-laminate panel 10 is illustrated in Figure 1. The

panel 10 includes a dielectric layer 20 (e.g., a prepreg layer comprising a fiber-glass

resin web) and a first conductive layer 30 disposed on a first face 22 of the

dielectric layer 20 and an opposing second conductive layer 40 disposed on a

second face 24 of the dielectric layer 20. In one exemplary embodiment, each of

the first and second conductive layers 30, 40 is a thin copper layer. Printed circuits

25 in the form of printed conductor paths or other similar structures are formed on

an outer surface of at least one of the first and second conductive layers 30, 40 by

conventional techniques, such as exposure and etching techniques.

One of the problems encountered with thin-laminate panels is that

these devices can fail due to electrical defects or other imperfections that are created

in the manufacturing process. These defects can adversely impact the performance

of the panel and result in the panel being defective and incapable of being used for

constructing a thin laminate PCB. For example, the material that forms the

dielectric layer can contain impurities that can lead to failure of the panel, e.g., a

conductive material that is unintentionally introduced into the dielectric layer or

voids formed in the dielectric layer. It is increasingly becoming the norm to test individual panels for the

presence of defects prior to further processing of the thin-laminate panel to form the

capacitive PCB. End users generally purchase the thin-laminate panels and then

invest time and money in further processing the thin-laminate panels for their own

specific applications. For example, an end user may form specific electrical circuit

patterns on the conductive layer(s) by conventional techniques, well known in the

art, such as masking the conductive layer(s) in areas in which the circuit is to be

created, and then introducing the masked panel into an etching bath or the like to

form the defined electrical circuit. Thus, testing is designed to ensure that the

customer does not unnecessarily invest time and money in further processing a

defective thin-laminate panel. One currently accepted testing method is a "high

potential" (Hipot) electrical test which is typically performed at about 500 N. An

exemplary Hipot test is described hereinafter in the detailed description of the

preferred embodiments. Thin-laminate panels that meet this requirement and pass

this test are delivered to the customer and further processed.

In terms of manufacturing, the thin-laminate panels are usually

initially made by fabricating a larger laminate sheet and then cutting (e.g., shearing)

the sheet in selected sections to form smaller, individual panels from which the

PCBs are made. For example, one exemplary sheet size is 36"x 48", which is actually molded as a sheet with slightly larger dimensions (e.g., 37"x 49") and then

trimmed. The smaller thin-laminate panels that are sold to the customer come in a

number of different sizes, with 18"x24" being a common size. Unfortunately,

during the shearing process when the smaller panels are formed, some of the

relatively soft conductive material that forms the conductive layers is transferred

across the edge of the panel. This is undesirable since the transferred material can

act as a bridge that electrically links the two conductive layers. This can cause an

electrical short circuit between the conductive layers. The transfer of conductive

material thus makes it impossible to use Hipot testing since a panel that has such

conductive material on the edges will fail the Hipot test even though the panel may

be defect free in all other regions (except for the one or more edges where the

conductive metallic residue is present). As a result of this problem, many otherwise

defect free thin-laminate panels are rejected (using the Hipot test result) as being

defective. That is, the "transferred" conductive material on the edges (conductive

residue) results in a false positive when the panel is tested using the Hipot test. The

test result indicates the laminate as defective, when it is not, the sole problem being

the metallic (conductive) residue on the panel edges (which is customarily removed

when the panel is etched to form a circuit pattern). U.S. Patent No. 6,114,015 to Fillion et al. offers a solution to the

presence of conductive material on the edge of the panels after the panels have been

cut from the larger thin-laminate sheet. In the Fillion procedure, the edges of the

panel are finished using a number of different techniques to eliminate the presence

of the transferred conductive material. This makes it possible for the panel to be

Hipot tested to detect the presence of actual defects that may exist in the material

itself.

However, the solution disclosed in the '015 patent further

complicates and adds costs to the fabrication and testing processes related to the

thin-laminate panels. The additional finishing step increases the time needed to

manufacture a given panel and also increases the associated manufacturing costs.

More specifically, the addition of a finishing step requires an additional apparatus to

be incorporated into the overall manufacturing process and this directly leads to

increased cost and time since the cut panel must then be delivered to this apparatus

for finishing of the edges.

Thus, it would be desirable to develop a manufacturing technique for

producing a thin-laminate structure that can be Hipot tested for actual manufacture defects that are present in areas apart from the edges, while at the same time

eliminating the need for finishing the panel edges.

Summary

A method for testing for defects in a thin-laminate structure suitable

for use in a number of different applications, including the manufacture of

capacitive PCBs, is provided in which the testing is conducted on the thin-laminate

sheet immediately after lamination but prior to formation of multiple panels from

the sheet. The invention includes a thin-laminate sheet that is constructed so that

the two conductive layers are electrically isolated from one another along the

peripheral edges of the sheet.

Instead of conducting Hipot tests on individual thin-laminate panels

that have been formed from a larger thin-laminate sheet by a shearing operation or

the like, the present inventors have discovered that manufacturing defects can be

detected using a testing method in which the Hipot test (or a similar electrical defect

test) is carried out on the thin-laminate sheet prior to shearing or cutting the sheet

into multiple thin-laminate panels. Testing in this fashion detects any

manufacturing defects that exist in the actual laminate sheet product and because

the testing is performed prior to shearing the sheet, the phenomena of false positive test failures due to conductive metal residue at the sheared edges of the panel is

eliminated.

Further, the present method of testing the thin-laminate sheet instead

of the smaller, thin-laminate panels significantly reduces the manufacturing time

and associated costs since the step of finishing the sheared edges of a thin-laminate

panel prior to testing the thin-laminate panel is eliminated.

The above, and other objects, features, and advantages of the present

device will become apparent from the following description read in conjunction

with the accompanying drawings, in which like reference numerals designate the

same elements.

Brief Description of the Drawing Figures

Fig. 1 is perspective view of a conventional thin-laminate panel;

Fig. 2 is a partial cross-sectional view of a thin-laminate sheet

arrangement according to a first embodiment;

Fig. 3 is a partial cross-sectional view of a thin-laminate sheet

arrangement according to a second embodiment; and

Fig. 4 is a partial cross-sectional view of a thin-laminate sheet

arrangement according to a third embodiment. Detailed Description of Preferred Embodiments

As used herein, the term "thin-laminate sheet or panel" refers to a

laminate structure that has a thickness from about A mil (0.0005 inches) to about 6

mils (0.006 inches) and typically, between about 1 mil (0.001 inches) to about 4

mils (0.004 inches).

As used herein, the term "High Potential Testing" or "Hipot" test

refers to a voltage test that is intended to verify the discontinuity between circuits

and locate material/manufacturing defects within the thin-laminate structure. The

Hipot testing of the thin-laminate structure is used to verify process defects, such as

copper to copper spacing of vias to ground planes and laminated foreign material

introduced during lamination and resin voids. According to one exemplary Hipot

testing procedure, a Hipot tester or equivalent equipment is used and high voltage

probes that are connected to the testing device are positioned at select points of the

thin-laminate sheet. More specifically, one probe is connected to one of the

conductive layers (i.e., a power plane) and the other probe is connected to the other

of the conductive layers (i.e., a ground plane) and a high voltage is applied.

Typically, the voltage is rapidly ramped up to 500 N and applied for a

predetermined time period. The precise voltage value and the time during which it is applied can vary depending upon the laminate material and certain design

considerations. The absence of residual current leakage or arcing during the test

sequence indicates the thin-laminate sheet is free of testable defects. It will be

appreciated that this is merely one exemplary Hipot testing method and others exist.

One exemplary Hipot tester is commercially available under the trade

name QuadTech Guardian 400 AC/DC Dielectric Analyzer. The tester includes a

Hipot table that can be a stainless steel plate or a sheet of 1/0 core on which the

thin-laminate sheet to be tested is placed. A ground connector (neg. probe) is

connected to the Hipot table and then a touch test probe (pos. probe) is placed on

the thin-laminate sheet after it has been placed on the Hipot table. High voltage is

then applied through the touch probe to one of the conductive layers and the unit

(tester) detects any leakage current through the thin-laminate sheet. The tester is a

fully programmable and interactive unit so that the user can enter certain test

parameters, including a breakdown detection value. If the leakage current through

the thin-laminate sheet exceeds the inputted breakdown detection value, the unit

declares that a breakdown has occurred and the high voltage through the probe is

cut off and the unit sends a signal indicating that the thin-laminate sheet has failed

the test. Instead of performing Hipot testing of individual thin-laminate

panels that have been formed from a larger thin-laminate sheet by shearing

operation or the like, the present inventors have discovered that manufacturing

defects can be determined using a testing method where the thin-laminate sheet

itself is tested prior to the sheet being sheared into smaller thin-laminate panels.

This type of testing detects any manufacturing defects that exist in the actual

laminate sheet product and because the testing is performed prior to shearing the

sheet, the phenomena of false positive test failures due to conductive metal residue

at the sheared edge of the panel is eliminated.

Figure 2 is a partial cross-sectional view of a thin-laminate sheet 100

according to a first embodiment with a peripheral edge, generally indicated at 110,

being illustrated. The thin-laminate sheet 100 is formed of three components,

namely, a first conductive layer 120, a dielectric layer 130, and a second conductive

layer 140. The dielectric layer 130 is disposed between the first conductive layer

120 and the second conductive layer 140. After the three layers 120, 130, 140 are

orientated in this manner, the entire structure is laminated using conventional

techniques to form the thin-laminate sheet 100.

According to this first embodiment, the thin-film sheet 100 has a

stepped configuration in that one of the first and second conductive layers 120, 140 has smaller dimensions than the dielectric layer 130 and the other of the first and

second conductive layers 120, 140 has larger dimensions than the dielectric layer

130. In the illustrated embodiment, the first conductive layer 120 has smaller

dimensions than the dielectric layer 130 and the second conductive layer 140 has

greater dimensions than the dielectric layer 130. The resulting structure has a

stepped configuration along the peripheral edge 110 of the thin-laminate sheet 100

due to the differences in the dimensions of the three layers 120, 130, 140. It will be

understood that the opposite can be true in that the first conductive layer 120 can

have the greater dimensions and the second conductive layer 140 can have the

smaller dimensions .

More specifically, a first shoulder 122 is formed between the edge of

the first conductive layer 120 and the dielectric layer 130 and a second shoulder 142

is formed between the second conductive layer 140 and the dielectric layer 130.

Thus, the three layers 120, 130, 140 are not aligned at the peripheral edge 110 but

rather the layers are staggered relative to one another. This arrangement isolates the

first conductive layer 120 from the second conductive layer 140 since the dielectric

layer 130 extends beyond the edge of the first conductive layer 120.

The dielectric layer 130 extends beyond the conductive layer 120 a

first distance and the second conductive layer 140 extends beyond the dielectric layer 130 a second distance with the first and second distances being a sufficient

distance so that the first conductive layer 120 is electrically isolated from the

second conductive layer 140. It will be appreciated that the first and second

distances can be the same distances or be different distances. For example, the sum

of the first and second distances can be approximately equal to the height of the

thin-laminate sheet 100. In one exemplary embodiment, one layer extends beyond

the adjacent layer by greater than about 1/16 inch; however, the sheet can be

arranged so that one layer extends greater than 1 inch (e.g., 2 inches) relative to the

adjacent layer. It will be appreciated that the above distances are merely exemplary

and the layers can be arranged to extend other distances from one another so long as

the two conductive layers 120, 140 remain electrically isolated from each other.

Figure 3 is a partial cross-sectional view of a thin-laminate sheet 200

according to a second embodiment. The thin-laminate sheet 200 is formed of the

same components as the thin-laminate sheet 100 of Fig. 2 and therefore, includes

the first conductive layer 120, the dielectric layer 130, and the second conductive

layer 140. According to this second embodiment, the thin-laminate sheet

200 has a configuration in which the first and second conductive layers 120, 140

both have smaller dimensions than the dielectric layer 130. This results in the

dielectric layer 130 protruding beyond the first and second conductive layers 120, 140 at the peripheral edge 110. The peripheral edge 110 is thus defined by the

dielectric layer 130.

Once again, in this second embodiment, the three layers 120, 130,

140 are not aligned at the peripheral edge 110 but rather the two conductive layers

120, 140 are offset from the dielectric layer 130. This arrangement also effectively

isolates the first conductive layer 120 from the second conductive layer 140 since

the dielectric layer 130 extends beyond the edges of the first and second conductive

layers 120, 140.

It will be appreciated that the dielectric layer 130 extends beyond the

two peripheral edges of the first and second conductive layers 120, 140 a sufficient

distance so that the first and second conductive layers 120, 140 are electrically

isolated from one another. For example, the distance which the dielectric layer 130

extends beyond the peripheral edges of the first and second conductive layers 120,

140 can be approximately equal to the height of the thin-laminate sheet 200. In one

exemplary embodiment, the dielectric layer 130 extends beyond the two conductive

layers 120, 140 by greater than about 1/16 inch; however, the sheet 200 can be

arranged so that the dielectric layer 130 extends a greater distance, such as 1 inch or

more (e.g., 2 inches). It will be appreciated that the above distances are merely

exemplary and the layers can be arranged to extend other distances from one another so long as the two conductive layers 120, 140 remain electrically isolated

from each other.

Figure 4 is a partial cross-sectional view of a thin-laminate sheet 300

according to a third embodiment. The thin-laminate sheet 300 is formed of the

same components as the thin-laminate sheet 100 of Fig. 2 but also includes an

insulating member 150.

According to this third embodiment, the thin-laminate sheet 300 has

a configuration in which the first and second conductive layers 120, 140 both have

greater dimensions than the dielectric layer 130. This results in both of the first and

second conductive layers 120, 140 protruding beyond the dielectric layer 130 to

form the peripheral edge 110 of the thin-laminate sheet 300. Because the peripheral

edge of the dielectric layer 130 does not extend to the peripheral edges of the first

and second conductive layers 120, 140, an open space is formed between the first

and second conductive layers 120, 140 from the peripheral edge of the dielectric

layer 130 to the peripheral edges of the two conductive layers 120, 140.

The insulating member 150 is disposed within this open space and is

dimensioned so that the insulating member 150 abuts the peripheral edge of the

dielectric layer 130 at one end thereof and extends beyond the peripheral edges of

the two conductive layers 120, 140 at the other end thereof. One will appreciate that the insulating member 150 is generally in the form of a "picture frame" with the

dielectric layer 130 extending between a central opening defined by the insulating

member 150 and the first and second conductive layers 120, 140 extending over a

portion but not the entire width of the insulating film 150. Because the insulating

member 150 is disposed around the entire periphery of the thin-laminate sheet 300

and is disposed in the region where the open space existed, the insulating member

150 prevents electrical shorting between the first and second conductive layers 120,

140.

The insulating member 150 extends beyond the peripheral edges of

the first and second conductive layers 120, 140 a sufficient distance to ensure that

the first and second conductive layers 120, 140 are electrically isolated from one

another. According to one exemplary embodiment, the insulating member 150

extends beyond the peripheral edges of the first and second conductive layers 120,

140 a distance that is approximately equal to the height of the thin-laminate sheet

300. In one exemplary embodiment, the insulating member 150 extends beyond the

two conductive layers 120, 140 by greater than about 1/16 inch; however, the sheet

300 can be arranged so that the insulating member 150 extends a greater distance,

such as 1 inch or more (e.g., 2 inches). It will be appreciated that the above

distances are merely exemplary and the layers can be arranged to extend other distances from one another so long as the two conductive layers 120, 140 remain

electrically isolated from each other.

Because the purpose of the insulating member 150 is to electrically

isolate the first conductive layer 120 from the second conductive layer 140, the

insulating member 150 can be in the form of a film formed of a material with

sufficient electrical insulating properties for the intended application of preventing

electrical current flow between the first and second conductive layers 120, 140.

Exemplary materials for forming the insulating film 150 include but are not limited

to TEDLAR™, which is a polyvinyl fluoride (PNF) film and TEFLON®

fluoropolymer resins, commercially available from DuPont. It will also be

appreciated that certain paper products could be used as the insulating member 150,

as well as an insulating liquid and moreover, air can be used as an insulating

medium. The aforementioned insulating mediums are merely exemplary and other

insulating mediums that perform the intended purpose are within the scope of the

present application.

During the manufacturing of the thin-laminate sheet 300, the

individual layers are disposed in the illustrated arrangement and then the layers are

subjected to a conventional lamination process to form the thin-laminate sheet 300. The thin-laminate sheets of the various embodiments disclosed

herein are designed to provide necessary capacitance for all or a substantial number

of integrated circuits to be mounted on or formed on a capacitive PCB made of thin-

laminate panels that are derived from the present thin-laminate sheets. The

materials chosen to form the opposing conductive layers and the dielectric layer and

the thicknesses of the individual layers are chosen so that the resulting product is

fully satisfactory for its intended use.

The dielectric material can be any suitable dielectric material that is

suited for use in a capacitive PCB environment. The choice of dielectric material

depends on a number of different factors, including the extent of flexibility or

rigidity desired for the resulting thin-laminate sheet (and panels formed therefrom).

Suitable dielectric materials include but are not limited to a plastic film, such as

acrylics or polyimides, e.g., KAPTON® available from DuPont.

Alternatively, the dielectric material can be a reinforcement

impregnated with a resin. The dielectric material reinforcement is preferably

chosen from the group consisting of woven or non- woven fiberglass (glass fabrics),

quartz, cellulose, paper, and non-woven organic reinforcements, such as aramid,

polyester, orlon, nylon, etc., and thermoplastic or thermoset film reinforcements,

such as polyimide (e.g., aromatic polyamide fibers (such as KEVLAR® or THERMOUNT®, both of which are available from DuPont)), polyester, fluorinated

polymers, etc., and mixtures thereof. The resin is preferably chosen from the group

consisting of thermoplastic resins, thermoset resins, and mixtures thereof. A group

of exemplary resin systems include epoxy, bismaleimide triazine, polyimide,

allylated polyphenylene ether, cyanate ester, fluorinated polymers, phenolics,

polyesters, as well as combinations and modifications thereof. In one exemplary

embodiment, the dielectric layer is a woven glass fabric reinforced high Tg

multifunctional epoxy resin system. Typically, the dielectric layer of the thin-

laminate sheet has a thickness from about 0.0005 inches to about 0.010 inches, and

preferably from about 0.0009 inches to about 0.006 inches.

The conductive layers are formed of conductive materials that are

suitable for use in the intended applications. The conductive layer is formed of

sufficient material, either in terms of mass per unit area or in terms of thickness, to

permit adequate current flow necessary to provide each integrated circuit formed on

the PCB with sufficient capacitance for its proper operation. The conductive

material can be formed from any number of different types of conductive materials,

such as conductive metals or conductive inks. Typically, the conductive material is

a conductive metal that is selected from the group consisting of aluminum, silver,

gold, copper, and mixtures thereof. Because copper has superior conductive properties, it is typically the material of choice and in one exemplary embodiment,

the conductive layer has a thickness from about 0.0001 inches to about 0.01 inches.

The thin-laminate sheets can be made according to standard

techniques that are used in the industry, such as those manufacturing methods

disclosed in U.S. patent No. 5,079,069, to Howard et al.; U.S. patent No. 5, 155,655

to Howard et al.; U.S. patent No. 5,161,086 to Howard et al.; and U.S. patent No.

5,261,153 to Lucas, each of which is hereby incorporated by reference in its entirety.

As described hereinbefore, it is becoming commonplace for the thin-

laminate sheet to be tested for electrical (manufacturing) defects, such as the

presence of conductive impurities within the dielectric layer by use of standard tests

for electrical conductance. For example, a high potential (high- voltage) ("Hipot")

test can be performed using a Hipot tester (e.g., QuadTech Guardian 400 AC/DC

Dielectric Analyzer) or equivalent equipment. A relatively high-voltage (e.g., 500

V) is applied through a high voltage probe to one of the conductive layers (e.g., the

power plane) of the thin-laminate sheet. Any corresponding voltage at the other

conductive layer (e.g., the ground plane) is then detected. A defective thin-laminate

sheet will conduct current from the one conductive layer to the other conductive

layer (in other words, there is a current leak or arc condition between the layers).

As soon as the unit detects the presence of this current conduction between the two conductive layers, the unit preferably generates a signal to indicate the existence of

a defect/failure of the thin-laminate sheet. The thin-laminate sheet can then be

removed for further inspection and processing or discarded. The below Example

further describes an entire exemplary testing process in greater detail.

The present method of testing the thin-laminate sheet and not the

smaller, thin-laminate panels significantly reduces the manufacturing time and cost

since the step of finishing the sheared edges of a thin-laminate panel prior to testing

the thin-laminate panel is eliminated. In actual use, the customer who purchases the

thin-laminate panel subjects the panel to further processing to form the printed

circuits and during this further processing, the edges of the panel are etched away or

otherwise processed. Consequently, the finishing step that is conventionally done

to the edges prior to subjecting the panel to testing is purely for purpose of ensuring

that the test properly detects the presence of actual defects instead of conductive

metallic residue at one or more edges of the panel. While the thin-laminate sheet

and the resulting panels can be used in the manufacture of a capacitance PCB, this

is merely one exemplary use and there are a number of other uses for the resulting

thin-laminate panels.

It will be appreciated that the embodiments described and illustrated

herein are merely exemplary in nature and other arrangements can be performed so as to electrically isolate the two conductive layers from one another along the entire

peripheral edge of the thin-laminate sheet, thereby eliminating the possibility that

the thin-laminate sheet will fail the Hipot test due to touching of the conductive

layers along a peripheral edge section.

The following Example is for purpose of illustration only and does

not limit the scope of the claims in any manner.

Example

A thin-laminate sheet having the configuration illustrated in Fig. 3 is

prepared using a dielectric sheet 130 that is formed of a woven glass fabric

reinforced high Tg multifunctional epoxy resin system. This material is fully cured

under heat and pressure to form a uniform, homogeneous structure. The cure takes

place at a temperature of 375°F (191°C) for 95 minutes, under a pressure of 350 psi.

The first and second conductive layers 120, 140 are then disposed

about the dielectric layer 130 so as to sandwich the dielectric layer 130

therebetween and then the entire structure is subjected to a lamination process to

produce the thin-laminate sheet. Conventional laminate conditions and techniques

are used and therefore are not explained in detail herein. Once the lamination process is completed, the thin-laminate sheet is

subjected to a Hipot test using the QuadTech Guardian 400 AC/DC Dielectric

Analyzer as the Hipot test unit. To conduct the test, the power of the unit is

switched on using the power switch and from a power up display, the user selects

"PARAM" and then selects "HIPOT". The NOLTAGE is set to 500NDC and the

TIME is set to Auto with a predetermined HOLD time period. The user uses keys

to arrow down LMAX limit and then uses UP/DOWΝ keys to set the limit to a

predetermined value. The arrow down key is selected to LMIΝ LIMIT and the limit

is set. The user then arrows down to DETECT and then selects LMAX. A ground

connector is connected to the Hipot table and the tester is ready for the high-

potential testing to proceed.

The power is turned on in the tester and the user selects HIPOT from

the power-up display. The thin-laminate sheet that is to be tested is placed on the

Hipot test table with one of the conductive layers resting against the conductive top

surface of the table and one test probe (e.g., a neg. probe) is attached to the

conductive table surface and another test probe (e.g., a pos. probe) is placed on the

other conductive layer. To begin the test, the user presses the

MEASURED/DISCHARGE switch. If the leakage current through the thin-

laminate under test exceeds the breakdown detection values (LMAX), the unit signals that a breakdown has occurred and the unit cuts off the high voltage and

displays the voltage and leakage current at breakdown. The RED and GREEN

lights of the unit indicate pass or fail according to programmed test limits. To end

the test, the MEASURE/DISCHARGE switch is presses again and this results in the

probe being discharged.

While the invention has been particularly shown and described with

reference to preferred embodiments thereof, it will be understood by those skilled in

the art that various changes in form and details can be made without departing from

the spirit and scope of the invention.

Claims

WHAT IS CLAIMED IS:

1. A thin-laminate sheet for forming panels, the thin-laminate

sheet comprising:

a first conductive layer having a peripheral edge;

a dielectric layer having a first surface that is joined to the first

conductive layer and a peripheral edge; and

a second conductive layer having a peripheral edge and being joined

to an opposing second surface of the dielectric layer;

wherein the peripheral edge of the dielectric layer extends beyond

the peripheral edge of one of the first and second conductive layers but not to the

peripheral edge of the other of the first and second conductive layers, the dielectric

layer extending beyond the peripheral edge of the one of the first and second

conductive layers a sufficient distance so that the first and second conductive layers

are electrically isolated.

2. The thin-laminate sheet of claim 1, wherein the first and

second conductive layers comprise copper layers and the dielectric layer comprises

a high Tg multifunctional epoxy resin system reinforced with a woven glass fabric.

3. The thin-laminate sheet of claim 1, wherein the sheet has a

thickness between about 0.0005 inches to about 0.006 inches.

4. The thin-laminate sheet of claim 1, wherein the dielectric

layer is arranged relative to the first and second conductive layers so as to

electrically isolate the first and second conductive layers from one another.

5. The thin-laminate sheet of claim 1, wherein the panels are

incorporated into capacitive printed-circuit boards.

6. A thin-laminate sheet for forming panels, the thin-laminate

sheet comprising:

a first conductive layer having a peripheral edge;

a dielectric layer having a first surface that is joined to the first

conductive layer and a peripheral edge; and a second conductive layer having a peripheral edge and being joined

to an opposing second surface of the dielectric layer;

wherein the peripheral edge of the dielectric layer extends beyond

the peripheral edges of the first and second conductive layers a sufficient distance

so that the first and second conductive layers are electrically isolated.

7. The thin-laminate sheet of claim 6, wherein the first and

second conductive layers are copper layers and the dielectric layer is a high Tg

multifunctional epoxy resin system reinforced with a woven glass fabric.

8. The thin-laminate sheet of claim 6, wherein the sheet has a

thickness between about 0.0005 inches to about 0.006 inches.

9. The thin-laminate sheet of claim 6, wherein the dielectric

layer is arranged relative to the first and second conductive layers so as to

electrically isolate the first and second conductive layers from one another.

10. The thin-laminate sheet of claim 6, wherein the panels are

incorporated into capacitive printed-circuit boards.

11. A thin-laminate sheet for forming panels, the thin-laminate

sheet comprising:

a first conductive layer having a peripheral edge;

a dielectric layer having a first surface that is joined to the first

conductive layer and a peripheral edge;

a second conductive layer having a peripheral edge and being joined

to an opposing second surface of the dielectric layer; wherein the peripheral edges

of the first and second conductive layers extend beyond the peripheral edge of the

dielectric layer so as to form a space between the two conductive layers from the

peripheral edge of the dielectric layer to the peripheral edges of the two conductive

layers; and

an insulating film disposed within the space such that the insulating

film extends beyond the peripheral edges of the two conductive layers a sufficient

distance so that the first and second conductive layers are electrically isolated.

12. The thin-laminate sheet of claim 11, wherein the first and

second conductive layers are copper layers and the dielectric layer is a high Tg

multifunctional epoxy resin system reinforced with a woven glass fabric.

13. The thin-laminate sheet of claim 11, wherein the sheet has a

thickness between about 0.0005 inches to about 0.006 inches.

14. The thin-laminate sheet of claim 11, wherein the insulating

film is formed of an electrically insulating material.

15. The thin-laminate sheet of claim 11 , wherein the panels are

incorporated into capacitive printed-circuit boards.

16. A process for electrical testing of a thin-laminate sheet and

formation of thin-laminate panels, the process comprising the steps of:

providing the thin-laminate sheet that is formed in accordance with

claim 1;

performing a Hipot test on the thin-laminate sheet;

forming one or more thin-laminate panels from the thin-laminate

sheet if the thin-laminate sheet passes the Hipot test, and discontinuing further

processing of the thin-laminate sheet if the thin-laminate sheet does not pass the

Hipot test.

17. The process of claim 16, wherein the step of forming the one

or more thin-laminate panel comprises the step of:

shearing the thin-laminate sheet.

18. The process of claim 16, further including the step of:

incorporating at least one thin-laminate panel into a printed circuit

board.

19. A process for electrical testing of a thin-laminate sheet and

formation of thin-laminate panels, the process comprising the steps of:

providing the thin-laminate sheet that is formed in accordance with

claim 6;

performing a Hipot test on the thin-laminate sheet;

forming one or more thin-laminate panels from the thin-laminate

sheet if the thin-laminate sheet passes the Hipot test, and discontinuing further

processing of the thin-laminate sheet if the thin-laminate sheet does not pass the

Hipot test.