WO2004021176A3 - Verfahren und vorrichtung zur datenverarbeitung - Google Patents
Verfahren und vorrichtung zur datenverarbeitung Download PDFInfo
- Publication number
- WO2004021176A3 WO2004021176A3 PCT/EP2003/008081 EP0308081W WO2004021176A3 WO 2004021176 A3 WO2004021176 A3 WO 2004021176A3 EP 0308081 W EP0308081 W EP 0308081W WO 2004021176 A3 WO2004021176 A3 WO 2004021176A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- data
- processing data
- data processing
- handling elements
- assignment
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 3
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
- G06F9/3455—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results using stride
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3802—Instruction prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3824—Operand accessing
- G06F9/383—Operand prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3877—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
- G06F9/3893—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
- G06F9/3895—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
- G06F9/3897—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
Abstract
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2003286131A AU2003286131A1 (en) | 2002-08-07 | 2003-07-23 | Method and device for processing data |
US10/523,763 US7657861B2 (en) | 2002-08-07 | 2003-07-23 | Method and device for processing data |
EP03776856.1A EP1537501B1 (de) | 2002-08-07 | 2003-07-23 | Verfahren und vorrichtung zur datenverarbeitung |
US12/621,860 US8281265B2 (en) | 2002-08-07 | 2009-11-19 | Method and device for processing data |
Applications Claiming Priority (60)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10236272.6 | 2002-08-07 | ||
DE10236269.6 | 2002-08-07 | ||
DE10236272 | 2002-08-07 | ||
DE10236269 | 2002-08-07 | ||
DE10236271.8 | 2002-08-07 | ||
DE10236271 | 2002-08-07 | ||
PCT/EP2002/010065 WO2003017095A2 (de) | 2001-08-16 | 2002-08-16 | Verfahren zum übersetzen von programmen für rekonfigurierbare architekturen |
EPPCT/EP02/10065 | 2002-08-16 | ||
DE10238173A DE10238173A1 (de) | 2002-08-07 | 2002-08-21 | Rekonfigurationsdatenladeverfahren |
DE10238172.0 | 2002-08-21 | ||
DE10238172A DE10238172A1 (de) | 2002-08-07 | 2002-08-21 | Verfahren und Vorrichtung zur Datenverarbeitung |
DE10238174A DE10238174A1 (de) | 2002-08-07 | 2002-08-21 | Verfahren und Vorrichtung zur Datenverarbeitung |
DE10238173.9 | 2002-08-21 | ||
DE10238174.7 | 2002-08-21 | ||
DE10240000.8 | 2002-08-27 | ||
DE10240022.9 | 2002-08-27 | ||
DE10240000A DE10240000A1 (de) | 2002-08-27 | 2002-08-27 | Busssysteme und Rekonfigurationsverfahren |
DE10240022 | 2002-08-27 | ||
DEPCT/DE02/03278 | 2002-09-03 | ||
PCT/DE2002/003278 WO2003023616A2 (de) | 2001-09-03 | 2002-09-03 | Verfahren zum debuggen rekonfigurierbarer architekturen |
DE10241812.8 | 2002-09-06 | ||
DE2002141812 DE10241812A1 (de) | 2002-09-06 | 2002-09-06 | Rekonfigurierbare Sequenzerstruktur |
PCT/EP2002/010084 WO2003025770A2 (de) | 2001-09-07 | 2002-09-09 | Rekonfigurierbares system |
EPPCT/EP02/10084 | 2002-09-09 | ||
EPPCT/EP02/10464 | 2002-09-18 | ||
EP0210464 | 2002-09-18 | ||
EPPCT/EP02/10479 | 2002-09-18 | ||
DE10243322.4 | 2002-09-18 | ||
PCT/EP2002/010479 WO2003025781A2 (de) | 2001-09-19 | 2002-09-18 | Verfahren zur konfiguration der verbindung zwischen datenverarbeitungszellen |
DE2002143322 DE10243322B4 (de) | 2002-09-18 | 2002-09-18 | Analoge rekonfigurierbare Datenverarbeitungseinrichtung |
EP0210536 | 2002-09-19 | ||
PCT/EP2002/010572 WO2003036507A2 (de) | 2001-09-19 | 2002-09-19 | Rekonfigurierbare elemente |
EPPCT/EP02/10572 | 2002-09-19 | ||
EPPCT/EP02/10536 | 2002-09-19 | ||
EP02022692.4 | 2002-10-10 | ||
EP02022692 | 2002-10-10 | ||
EP02027277.9 | 2002-12-06 | ||
EP02027277 | 2002-12-06 | ||
DE10300380.0 | 2003-01-07 | ||
DE10300380 | 2003-01-07 | ||
DEPCT/DE03/00152 | 2003-01-20 | ||
EPPCT/EP03/00624 | 2003-01-20 | ||
PCT/DE2003/000152 WO2003060747A2 (de) | 2002-01-19 | 2003-01-20 | Reconfigurierbarer prozessor |
PCT/EP2003/000624 WO2003071418A2 (de) | 2002-01-18 | 2003-01-20 | Übersetzungsverfahren |
DEPCT/DE03/00489 | 2003-02-18 | ||
PCT/DE2003/000489 WO2003071432A2 (de) | 2002-02-18 | 2003-02-18 | Bussysteme und rekonfigurationsverfahren |
DE2003110195 DE10310195A1 (de) | 2003-03-06 | 2003-03-06 | Datenverarbeitungsergebniserzielungswegoptimierungsverfahren |
DE10310195.0 | 2003-03-06 | ||
DEPCT/DE03/00942 | 2003-03-21 | ||
PCT/DE2003/000942 WO2003081454A2 (de) | 2002-03-21 | 2003-03-21 | Verfahren und vorrichtung zur datenverarbeitung |
DE10315295 | 2003-04-04 | ||
DE10315295.4 | 2003-04-04 | ||
EP03009906 | 2003-04-30 | ||
EP03009906.3 | 2003-04-30 | ||
DE10321834 | 2003-05-15 | ||
DE10321834.3 | 2003-05-15 | ||
EP03013694.9 | 2003-06-17 | ||
EP03013694 | 2003-06-17 | ||
EP03015015 | 2003-07-02 | ||
EP03015015.5 | 2003-07-02 |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10523763 A-371-Of-International | 2003-07-23 | ||
US12/621,860 Division US8281265B2 (en) | 2002-08-07 | 2009-11-19 | Method and device for processing data |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2004021176A2 WO2004021176A2 (de) | 2004-03-11 |
WO2004021176A3 true WO2004021176A3 (de) | 2005-02-03 |
Family
ID=56290461
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2003/008081 WO2004021176A2 (de) | 2002-08-07 | 2003-07-23 | Verfahren und vorrichtung zur datenverarbeitung |
PCT/EP2003/008080 WO2004015568A2 (en) | 2002-03-21 | 2003-07-24 | Data processing method and device |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2003/008080 WO2004015568A2 (en) | 2002-03-21 | 2003-07-24 | Data processing method and device |
Country Status (5)
Country | Link |
---|---|
US (1) | US8156284B2 (de) |
EP (1) | EP1535190B1 (de) |
JP (1) | JP2005535055A (de) |
AU (2) | AU2003286131A1 (de) |
WO (2) | WO2004021176A2 (de) |
Families Citing this family (182)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7266725B2 (en) | 2001-09-03 | 2007-09-04 | Pact Xpp Technologies Ag | Method for debugging reconfigurable architectures |
DE19654595A1 (de) | 1996-12-20 | 1998-07-02 | Pact Inf Tech Gmbh | I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen |
US6542998B1 (en) | 1997-02-08 | 2003-04-01 | Pact Gmbh | Method of self-synchronization of configurable elements of a programmable module |
US8686549B2 (en) * | 2001-09-03 | 2014-04-01 | Martin Vorbach | Reconfigurable elements |
DE19861088A1 (de) | 1997-12-22 | 2000-02-10 | Pact Inf Tech Gmbh | Verfahren zur Reparatur von integrierten Schaltkreisen |
US8230411B1 (en) * | 1999-06-10 | 2012-07-24 | Martin Vorbach | Method for interleaving a program over a plurality of cells |
EP2226732A3 (de) | 2000-06-13 | 2016-04-06 | PACT XPP Technologies AG | Cachehierarchie für einen Multicore-Prozessor |
US8058899B2 (en) | 2000-10-06 | 2011-11-15 | Martin Vorbach | Logic cell array and bus system |
US7444531B2 (en) | 2001-03-05 | 2008-10-28 | Pact Xpp Technologies Ag | Methods and devices for treating and processing data |
US9411532B2 (en) | 2001-09-07 | 2016-08-09 | Pact Xpp Technologies Ag | Methods and systems for transferring data between a processing device and external devices |
US9552047B2 (en) | 2001-03-05 | 2017-01-24 | Pact Xpp Technologies Ag | Multiprocessor having runtime adjustable clock and clock dependent power supply |
US9436631B2 (en) | 2001-03-05 | 2016-09-06 | Pact Xpp Technologies Ag | Chip including memory element storing higher level memory data on a page by page basis |
US9250908B2 (en) | 2001-03-05 | 2016-02-02 | Pact Xpp Technologies Ag | Multi-processor bus and cache interconnection system |
US9141390B2 (en) | 2001-03-05 | 2015-09-22 | Pact Xpp Technologies Ag | Method of processing data with an array of data processors according to application ID |
US9037807B2 (en) | 2001-03-05 | 2015-05-19 | Pact Xpp Technologies Ag | Processor arrangement on a chip including data processing, memory, and interface elements |
US10031733B2 (en) | 2001-06-20 | 2018-07-24 | Scientia Sol Mentis Ag | Method for processing data |
US7996827B2 (en) | 2001-08-16 | 2011-08-09 | Martin Vorbach | Method for the translation of programs for reconfigurable architectures |
US7434191B2 (en) | 2001-09-03 | 2008-10-07 | Pact Xpp Technologies Ag | Router |
US8686475B2 (en) * | 2001-09-19 | 2014-04-01 | Pact Xpp Technologies Ag | Reconfigurable elements |
US8281108B2 (en) | 2002-01-19 | 2012-10-02 | Martin Vorbach | Reconfigurable general purpose processor having time restricted configurations |
WO2004088502A2 (de) * | 2003-04-04 | 2004-10-14 | Pact Xpp Technologies Ag | Verfahren und vorrichtung für die datenverarbeitung |
US9170812B2 (en) | 2002-03-21 | 2015-10-27 | Pact Xpp Technologies Ag | Data processing system having integrated pipelined array data processor |
US8914590B2 (en) | 2002-08-07 | 2014-12-16 | Pact Xpp Technologies Ag | Data processing method and device |
US20110161977A1 (en) * | 2002-03-21 | 2011-06-30 | Martin Vorbach | Method and device for data processing |
US7657861B2 (en) | 2002-08-07 | 2010-02-02 | Pact Xpp Technologies Ag | Method and device for processing data |
JP4388895B2 (ja) | 2002-09-06 | 2009-12-24 | ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト | リコンフィギュアラブルなシーケンサ構造 |
US20130111188A9 (en) * | 2003-07-24 | 2013-05-02 | Martin Vorbach | Low latency massive parallel data processing device |
US7747659B2 (en) * | 2004-01-05 | 2010-06-29 | International Business Machines Corporation | Garbage collector with eager read barrier |
WO2005073866A2 (en) * | 2004-01-21 | 2005-08-11 | Charles Stark Draper Laboratory, Inc. | Systems and methods for reconfigurable computing |
US7886136B2 (en) * | 2004-05-21 | 2011-02-08 | Samsung Electronics Co., Ltd. | Computer system, method, and medium for switching operating system |
US7487497B2 (en) * | 2004-08-26 | 2009-02-03 | International Business Machines Corporation | Method and system for auto parallelization of zero-trip loops through induction variable substitution |
US20060156399A1 (en) * | 2004-12-30 | 2006-07-13 | Parmar Pankaj N | System and method for implementing network security using a sequestered partition |
EP1869551A1 (de) * | 2005-04-13 | 2007-12-26 | TELEFONAKTIEBOLAGET LM ERICSSON (publ) | Datenwertkohärenz in computersystemen |
US8966223B2 (en) * | 2005-05-05 | 2015-02-24 | Icera, Inc. | Apparatus and method for configurable processing |
US7752622B1 (en) | 2005-05-13 | 2010-07-06 | Oracle America, Inc. | Method and apparatus for flexible job pre-emption |
US7984447B1 (en) | 2005-05-13 | 2011-07-19 | Oracle America, Inc. | Method and apparatus for balancing project shares within job assignment and scheduling |
US8214836B1 (en) | 2005-05-13 | 2012-07-03 | Oracle America, Inc. | Method and apparatus for job assignment and scheduling using advance reservation, backfilling, and preemption |
US7743378B1 (en) | 2005-05-13 | 2010-06-22 | Oracle America, Inc. | Method and apparatus for multi-dimensional priority determination for job scheduling |
US7844968B1 (en) * | 2005-05-13 | 2010-11-30 | Oracle America, Inc. | System for predicting earliest completion time and using static priority having initial priority and static urgency for job scheduling |
US7685572B1 (en) * | 2005-08-19 | 2010-03-23 | Sun Microsystems, Inc. | Method of static analysis for race condition detection |
JP4757005B2 (ja) * | 2005-12-05 | 2011-08-24 | キヤノン株式会社 | 画像処理装置及び画像処理方法 |
US8250503B2 (en) * | 2006-01-18 | 2012-08-21 | Martin Vorbach | Hardware definition method including determining whether to implement a function as hardware or software |
US20080104601A1 (en) * | 2006-10-26 | 2008-05-01 | Nokia Corporation | Scheduler for multiple software tasks to share reconfigurable hardware |
KR100883655B1 (ko) * | 2006-12-04 | 2009-02-18 | 삼성전자주식회사 | 재구성 가능한 프로세서를 갖는 문맥 교환 시스템 및 방법 |
WO2008143622A1 (en) * | 2007-05-24 | 2008-11-27 | Modelware, Inc. | System and method for designing and implementing packet processing products |
US7724684B2 (en) * | 2007-05-24 | 2010-05-25 | Modelware, Inc. | System and method for designing and implementing packet processing products |
JP4497184B2 (ja) * | 2007-09-13 | 2010-07-07 | ソニー株式会社 | 集積装置およびそのレイアウト方法、並びにプログラム |
US8028150B2 (en) * | 2007-11-16 | 2011-09-27 | Shlomo Selim Rakib | Runtime instruction decoding modification in a multi-processing array |
EP2220554A1 (de) * | 2007-11-17 | 2010-08-25 | Krass, Maren | Rekonfiguri erbare fliesskomma- und bit- ebenen datenverarbeitungseinheit |
EP2217999A2 (de) * | 2007-11-28 | 2010-08-18 | Krass, Maren | Compiler für rekonfigurierbare architekturen mit besonderem zwischenformat |
WO2009071329A1 (en) * | 2007-12-07 | 2009-06-11 | Pact Xpp Technologies Ag | Using function calls as compiler directives |
KR20100101585A (ko) * | 2007-12-10 | 2010-09-17 | 샌드브리지 테크놀로지스, 인코포레이티드 | 신호 프로세서에서의 역추적 가속화 |
JP4474570B2 (ja) * | 2008-01-28 | 2010-06-09 | エヌイーシーコンピュータテクノ株式会社 | キャッシュコヒーレンシ制御方法 |
US8312458B2 (en) | 2008-02-01 | 2012-11-13 | International Business Machines Corporation | Central repository for wake-and-go mechanism |
US8452947B2 (en) * | 2008-02-01 | 2013-05-28 | International Business Machines Corporation | Hardware wake-and-go mechanism and content addressable memory with instruction pre-fetch look-ahead to detect programming idioms |
US8341635B2 (en) | 2008-02-01 | 2012-12-25 | International Business Machines Corporation | Hardware wake-and-go mechanism with look-ahead polling |
US8640141B2 (en) | 2008-02-01 | 2014-01-28 | International Business Machines Corporation | Wake-and-go mechanism with hardware private array |
US8015379B2 (en) * | 2008-02-01 | 2011-09-06 | International Business Machines Corporation | Wake-and-go mechanism with exclusive system bus response |
US8225120B2 (en) | 2008-02-01 | 2012-07-17 | International Business Machines Corporation | Wake-and-go mechanism with data exclusivity |
US8732683B2 (en) | 2008-02-01 | 2014-05-20 | International Business Machines Corporation | Compiler providing idiom to idiom accelerator |
US8127080B2 (en) | 2008-02-01 | 2012-02-28 | International Business Machines Corporation | Wake-and-go mechanism with system address bus transaction master |
US8171476B2 (en) | 2008-02-01 | 2012-05-01 | International Business Machines Corporation | Wake-and-go mechanism with prioritization of threads |
US8386822B2 (en) * | 2008-02-01 | 2013-02-26 | International Business Machines Corporation | Wake-and-go mechanism with data monitoring |
US8250396B2 (en) * | 2008-02-01 | 2012-08-21 | International Business Machines Corporation | Hardware wake-and-go mechanism for a data processing system |
US8516484B2 (en) | 2008-02-01 | 2013-08-20 | International Business Machines Corporation | Wake-and-go mechanism for a data processing system |
US8880853B2 (en) | 2008-02-01 | 2014-11-04 | International Business Machines Corporation | CAM-based wake-and-go snooping engine for waking a thread put to sleep for spinning on a target address lock |
US8316218B2 (en) * | 2008-02-01 | 2012-11-20 | International Business Machines Corporation | Look-ahead wake-and-go engine with speculative execution |
US8145849B2 (en) * | 2008-02-01 | 2012-03-27 | International Business Machines Corporation | Wake-and-go mechanism with system bus response |
US8725992B2 (en) | 2008-02-01 | 2014-05-13 | International Business Machines Corporation | Programming language exposing idiom calls to a programming idiom accelerator |
US8788795B2 (en) * | 2008-02-01 | 2014-07-22 | International Business Machines Corporation | Programming idiom accelerator to examine pre-fetched instruction streams for multiple processors |
US8612977B2 (en) * | 2008-02-01 | 2013-12-17 | International Business Machines Corporation | Wake-and-go mechanism with software save of thread state |
US20090213946A1 (en) * | 2008-02-25 | 2009-08-27 | Xilinx, Inc. | Partial reconfiguration for a mimo-ofdm communication system |
US8677338B2 (en) * | 2008-06-04 | 2014-03-18 | Intel Corporation | Data dependence testing for loop fusion with code replication, array contraction, and loop interchange |
US8453134B2 (en) * | 2008-06-04 | 2013-05-28 | Intel Corporation | Improving data locality and parallelism by code replication |
JP5294304B2 (ja) * | 2008-06-18 | 2013-09-18 | 日本電気株式会社 | 再構成可能電子回路装置 |
US20090328016A1 (en) * | 2008-06-27 | 2009-12-31 | Microsoft Corporation | Generalized expression trees |
US8755515B1 (en) | 2008-09-29 | 2014-06-17 | Wai Wu | Parallel signal processing system and method |
FR2937161B1 (fr) * | 2008-10-14 | 2010-12-17 | Highdeal | Procede de conversion et convertisseur de formule en code executable,programme et support d'enregistrement pour ce procede, procede d'implementation de cette formule. |
US8320448B2 (en) * | 2008-11-28 | 2012-11-27 | Microsoft Corporation | Encoder with multiple re-entry and exit points |
US8312442B2 (en) * | 2008-12-10 | 2012-11-13 | Oracle America, Inc. | Method and system for interprocedural prefetching |
ES2334196B2 (es) * | 2009-02-17 | 2011-02-09 | Univ Madrid Politecnica | Dispositivo para la mejora de la seguridad de microprocesadores en sistemas empotrados |
US8886919B2 (en) | 2009-04-16 | 2014-11-11 | International Business Machines Corporation | Remote update programming idiom accelerator with allocated processor resources |
US8082315B2 (en) * | 2009-04-16 | 2011-12-20 | International Business Machines Corporation | Programming idiom accelerator for remote update |
US8145723B2 (en) * | 2009-04-16 | 2012-03-27 | International Business Machines Corporation | Complex remote update programming idiom accelerator |
US8230201B2 (en) * | 2009-04-16 | 2012-07-24 | International Business Machines Corporation | Migrating sleeping and waking threads between wake-and-go mechanisms in a multiple processor data processing system |
US8645935B2 (en) * | 2009-05-01 | 2014-02-04 | University Of Maryland | Automatic parallelization using binary rewriting |
US8458684B2 (en) * | 2009-08-19 | 2013-06-04 | International Business Machines Corporation | Insertion of operation-and-indicate instructions for optimized SIMD code |
US20110047358A1 (en) * | 2009-08-19 | 2011-02-24 | International Business Machines Corporation | In-Data Path Tracking of Floating Point Exceptions and Store-Based Exception Indication |
US8290922B2 (en) | 2009-10-23 | 2012-10-16 | Microsoft Corporation | Data framework to enable rich processing of data from any arbitrary data source |
US8578343B2 (en) * | 2010-01-15 | 2013-11-05 | Oracle America, Inc. | System and method for overflow detection using partial evaluations |
US20110208552A1 (en) * | 2010-02-25 | 2011-08-25 | International Business Machines Corporation | Leveraging business services for soa solution development |
US8667236B2 (en) * | 2010-09-29 | 2014-03-04 | Hewlett-Packard Development Company, L.P. | Host based write ordering for asynchronous replication |
CN102609240B (zh) * | 2011-01-20 | 2016-04-06 | 瑞昱半导体股份有限公司 | 处理器电路及读取数据的方法 |
US8566030B1 (en) | 2011-05-03 | 2013-10-22 | University Of Southern California | Efficient K-nearest neighbor search in time-dependent spatial networks |
US9595074B2 (en) * | 2011-09-16 | 2017-03-14 | Imagination Technologies Limited | Multistage collector for outputs in multiprocessor systems |
US8745607B2 (en) * | 2011-11-11 | 2014-06-03 | International Business Machines Corporation | Reducing branch misprediction impact in nested loop code |
WO2013100783A1 (en) | 2011-12-29 | 2013-07-04 | Intel Corporation | Method and system for control signalling in a data path module |
JP5865091B2 (ja) * | 2012-01-20 | 2016-02-17 | 日立オートモティブシステムズ株式会社 | ソフトウェア検証支援装置、ソフトウェア検証支援方法、ソフトウェア検証支援プログラム |
US9424038B2 (en) * | 2012-12-10 | 2016-08-23 | Nvidia Corporation | Compiler-controlled region scheduling for SIMD execution of threads |
US9619229B2 (en) * | 2012-12-27 | 2017-04-11 | Intel Corporation | Collapsing of multiple nested loops, methods and instructions |
US10133557B1 (en) * | 2013-01-11 | 2018-11-20 | Mentor Graphics Corporation | Modifying code to reduce redundant or unnecessary power usage |
US9495154B2 (en) | 2013-03-13 | 2016-11-15 | Qualcomm Incorporated | Vector processing engines having programmable data path configurations for providing multi-mode vector processing, and related vector processors, systems, and methods |
US9275014B2 (en) | 2013-03-13 | 2016-03-01 | Qualcomm Incorporated | Vector processing engines having programmable data path configurations for providing multi-mode radix-2x butterfly vector processing circuits, and related vector processors, systems, and methods |
US10062135B2 (en) * | 2013-07-31 | 2018-08-28 | National Technology & Engineering Solutions Of Sandia, Llc | Graphics processing unit management system for computed tomography |
CN103440130A (zh) * | 2013-08-26 | 2013-12-11 | 成都金山数字娱乐科技有限公司 | 一种数据处理方法以及装置 |
US10331583B2 (en) | 2013-09-26 | 2019-06-25 | Intel Corporation | Executing distributed memory operations using processing elements connected by distributed channels |
US9195436B2 (en) * | 2013-10-14 | 2015-11-24 | Microsoft Technology Licensing, Llc | Parallel dynamic programming through rank convergence |
US9690584B2 (en) * | 2013-10-18 | 2017-06-27 | Marvell World Trade Ltd. | Systems and methods for register allocation |
US9798827B2 (en) * | 2013-10-25 | 2017-10-24 | Uc Mobile Co., Ltd. | Methods and devices for preloading webpages |
US9520180B1 (en) | 2014-03-11 | 2016-12-13 | Hypres, Inc. | System and method for cryogenic hybrid technology computing and memory |
US9710245B2 (en) | 2014-04-04 | 2017-07-18 | Qualcomm Incorporated | Memory reference metadata for compiler optimization |
US20160139901A1 (en) * | 2014-11-18 | 2016-05-19 | Qualcomm Incorporated | Systems, methods, and computer programs for performing runtime auto parallelization of application code |
US9749548B2 (en) | 2015-01-22 | 2017-08-29 | Google Inc. | Virtual linebuffers for image signal processors |
JP2016178229A (ja) | 2015-03-20 | 2016-10-06 | 株式会社東芝 | 再構成可能な回路 |
US10095479B2 (en) | 2015-04-23 | 2018-10-09 | Google Llc | Virtual image processor instruction set architecture (ISA) and memory model and exemplary target hardware having a two-dimensional shift array structure |
US10291813B2 (en) | 2015-04-23 | 2019-05-14 | Google Llc | Sheet generator for image processor |
US9772852B2 (en) | 2015-04-23 | 2017-09-26 | Google Inc. | Energy efficient processor core architecture for image processor |
US9769356B2 (en) | 2015-04-23 | 2017-09-19 | Google Inc. | Two dimensional shift array for image processor |
US9756268B2 (en) | 2015-04-23 | 2017-09-05 | Google Inc. | Line buffer unit for image processor |
US9965824B2 (en) | 2015-04-23 | 2018-05-08 | Google Llc | Architecture for high performance, power efficient, programmable image processing |
US9785423B2 (en) | 2015-04-23 | 2017-10-10 | Google Inc. | Compiler for translating between a virtual image processor instruction set architecture (ISA) and target hardware having a two-dimensional shift array structure |
CN106708499B (zh) | 2015-11-13 | 2020-10-27 | 财团法人工业技术研究院 | 绘图处理程序的分析方法与分析系统 |
US10313641B2 (en) | 2015-12-04 | 2019-06-04 | Google Llc | Shift register with reduced wiring complexity |
US9830150B2 (en) | 2015-12-04 | 2017-11-28 | Google Llc | Multi-functional execution lane for image processor |
US10642617B2 (en) * | 2015-12-08 | 2020-05-05 | Via Alliance Semiconductor Co., Ltd. | Processor with an expandable instruction set architecture for dynamically configuring execution resources |
US10204396B2 (en) | 2016-02-26 | 2019-02-12 | Google Llc | Compiler managed memory for image processor |
US10387988B2 (en) | 2016-02-26 | 2019-08-20 | Google Llc | Compiler techniques for mapping program code to a high performance, power efficient, programmable image processing hardware platform |
US10380969B2 (en) | 2016-02-28 | 2019-08-13 | Google Llc | Macro I/O unit for image processor |
US20180005346A1 (en) | 2016-07-01 | 2018-01-04 | Google Inc. | Core Processes For Block Operations On An Image Processor Having A Two-Dimensional Execution Lane Array and A Two-Dimensional Shift Register |
US20180005059A1 (en) | 2016-07-01 | 2018-01-04 | Google Inc. | Statistics Operations On Two Dimensional Image Processor |
US20180007302A1 (en) | 2016-07-01 | 2018-01-04 | Google Inc. | Block Operations For An Image Processor Having A Two-Dimensional Execution Lane Array and A Two-Dimensional Shift Register |
US10546211B2 (en) | 2016-07-01 | 2020-01-28 | Google Llc | Convolutional neural network on programmable two dimensional image processor |
US9984004B1 (en) * | 2016-07-19 | 2018-05-29 | Nutanix, Inc. | Dynamic cache balancing |
US10372413B2 (en) | 2016-09-18 | 2019-08-06 | International Business Machines Corporation | First-in-first-out buffer |
US10157164B2 (en) * | 2016-09-20 | 2018-12-18 | Qualcomm Incorporated | Hierarchical synthesis of computer machine instructions |
US10402168B2 (en) | 2016-10-01 | 2019-09-03 | Intel Corporation | Low energy consumption mantissa multiplication for floating point multiply-add operations |
US10572376B2 (en) | 2016-12-30 | 2020-02-25 | Intel Corporation | Memory ordering in acceleration hardware |
US10416999B2 (en) | 2016-12-30 | 2019-09-17 | Intel Corporation | Processors, methods, and systems with a configurable spatial accelerator |
US10474375B2 (en) | 2016-12-30 | 2019-11-12 | Intel Corporation | Runtime address disambiguation in acceleration hardware |
US10558575B2 (en) | 2016-12-30 | 2020-02-11 | Intel Corporation | Processors, methods, and systems with a configurable spatial accelerator |
US10394536B2 (en) * | 2017-03-02 | 2019-08-27 | International Business Machines Corporation | Compiling a parallel loop with a complex access pattern for writing an array for GPU and CPU |
US10838910B2 (en) * | 2017-04-27 | 2020-11-17 | Falcon Computing | Systems and methods for systolic array design from a high-level program |
US10552206B2 (en) * | 2017-05-23 | 2020-02-04 | Ge Aviation Systems Llc | Contextual awareness associated with resources |
JP2018206175A (ja) | 2017-06-07 | 2018-12-27 | 富士通株式会社 | コンパイラ、情報処理装置及びコンパイル方法 |
US10445451B2 (en) | 2017-07-01 | 2019-10-15 | Intel Corporation | Processors, methods, and systems for a configurable spatial accelerator with performance, correctness, and power reduction features |
US10387319B2 (en) | 2017-07-01 | 2019-08-20 | Intel Corporation | Processors, methods, and systems for a configurable spatial accelerator with memory system performance, power reduction, and atomics support features |
US10467183B2 (en) | 2017-07-01 | 2019-11-05 | Intel Corporation | Processors and methods for pipelined runtime services in a spatial array |
US10469397B2 (en) | 2017-07-01 | 2019-11-05 | Intel Corporation | Processors and methods with configurable network-based dataflow operator circuits |
US10445234B2 (en) | 2017-07-01 | 2019-10-15 | Intel Corporation | Processors, methods, and systems for a configurable spatial accelerator with transactional and replay features |
US10515049B1 (en) | 2017-07-01 | 2019-12-24 | Intel Corporation | Memory circuits and methods for distributed memory hazard detection and error recovery |
US10515046B2 (en) | 2017-07-01 | 2019-12-24 | Intel Corporation | Processors, methods, and systems with a configurable spatial accelerator |
US10496574B2 (en) * | 2017-09-28 | 2019-12-03 | Intel Corporation | Processors, methods, and systems for a memory fence in a configurable spatial accelerator |
US11086816B2 (en) | 2017-09-28 | 2021-08-10 | Intel Corporation | Processors, methods, and systems for debugging a configurable spatial accelerator |
US10445098B2 (en) | 2017-09-30 | 2019-10-15 | Intel Corporation | Processors and methods for privileged configuration in a spatial array |
US10380063B2 (en) | 2017-09-30 | 2019-08-13 | Intel Corporation | Processors, methods, and systems with a configurable spatial accelerator having a sequencer dataflow operator |
FR3075431B1 (fr) * | 2017-12-14 | 2020-01-10 | Bull Sas | Dispositif, chaine de traitement de donnees et procede de commutation de contexte |
US10445250B2 (en) | 2017-12-30 | 2019-10-15 | Intel Corporation | Apparatus, methods, and systems with a configurable spatial accelerator |
US10417175B2 (en) | 2017-12-30 | 2019-09-17 | Intel Corporation | Apparatus, methods, and systems for memory consistency in a configurable spatial accelerator |
US10565134B2 (en) | 2017-12-30 | 2020-02-18 | Intel Corporation | Apparatus, methods, and systems for multicast in a configurable spatial accelerator |
WO2019173135A1 (en) | 2018-03-08 | 2019-09-12 | quadric.io, Inc. | A machine perception and dense algorithm integrated circuit |
JP7386543B2 (ja) | 2018-03-28 | 2023-11-27 | クアドリック.アイオー,インコーポレイテッド | 機械知覚および高密度アルゴリズム集積回路を実装するためのシステムおよび方法 |
US10564980B2 (en) | 2018-04-03 | 2020-02-18 | Intel Corporation | Apparatus, methods, and systems for conditional queues in a configurable spatial accelerator |
US11307873B2 (en) | 2018-04-03 | 2022-04-19 | Intel Corporation | Apparatus, methods, and systems for unstructured data flow in a configurable spatial accelerator with predicate propagation and merging |
US11847553B2 (en) | 2018-06-14 | 2023-12-19 | International Business Machines Corporation | Parallel computational architecture with reconfigurable core-level and vector-level parallelism |
US11200186B2 (en) | 2018-06-30 | 2021-12-14 | Intel Corporation | Apparatuses, methods, and systems for operations in a configurable spatial accelerator |
US10853073B2 (en) | 2018-06-30 | 2020-12-01 | Intel Corporation | Apparatuses, methods, and systems for conditional operations in a configurable spatial accelerator |
US10459866B1 (en) | 2018-06-30 | 2019-10-29 | Intel Corporation | Apparatuses, methods, and systems for integrated control and data processing in a configurable spatial accelerator |
US10891240B2 (en) | 2018-06-30 | 2021-01-12 | Intel Corporation | Apparatus, methods, and systems for low latency communication in a configurable spatial accelerator |
US10691430B2 (en) * | 2018-08-27 | 2020-06-23 | Intel Corporation | Latency scheduling mehanism |
US11803507B2 (en) | 2018-10-29 | 2023-10-31 | Secturion Systems, Inc. | Data stream protocol field decoding by a systolic array |
US10678724B1 (en) | 2018-12-29 | 2020-06-09 | Intel Corporation | Apparatuses, methods, and systems for in-network storage in a configurable spatial accelerator |
GB2580664B (en) | 2019-01-22 | 2021-01-13 | Graphcore Ltd | Double load instruction |
US10824370B2 (en) * | 2019-02-07 | 2020-11-03 | quadric.io, Inc. | Systems and methods for implementing random access memory in a flow-based machine perception and dense algorithm integrated circuit based on computing and coalescing of indices |
US10915471B2 (en) | 2019-03-30 | 2021-02-09 | Intel Corporation | Apparatuses, methods, and systems for memory interface circuit allocation in a configurable spatial accelerator |
US10817291B2 (en) | 2019-03-30 | 2020-10-27 | Intel Corporation | Apparatuses, methods, and systems for swizzle operations in a configurable spatial accelerator |
US11029927B2 (en) | 2019-03-30 | 2021-06-08 | Intel Corporation | Methods and apparatus to detect and annotate backedges in a dataflow graph |
US10965536B2 (en) | 2019-03-30 | 2021-03-30 | Intel Corporation | Methods and apparatus to insert buffers in a dataflow graph |
US11422812B2 (en) * | 2019-06-25 | 2022-08-23 | Advanced Micro Devices, Inc. | Method and apparatus for efficient programmable instructions in computer systems |
US11037050B2 (en) | 2019-06-29 | 2021-06-15 | Intel Corporation | Apparatuses, methods, and systems for memory interface circuit arbitration in a configurable spatial accelerator |
CN110704360B (zh) * | 2019-09-29 | 2022-03-18 | 华中科技大学 | 一种基于异构fpga数据流的图计算优化方法 |
US11907713B2 (en) | 2019-12-28 | 2024-02-20 | Intel Corporation | Apparatuses, methods, and systems for fused operations using sign modification in a processing element of a configurable spatial accelerator |
CN114722384B (zh) * | 2022-06-02 | 2022-08-19 | 南京中成越科技有限公司 | 端对端远程通讯的风险数据传输处理方法、系统 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000038087A1 (en) * | 1998-12-22 | 2000-06-29 | Celoxica Limited | Hardware/software codesign system |
US6086628A (en) * | 1998-02-17 | 2000-07-11 | Lucent Technologies Inc. | Power-related hardware-software co-synthesis of heterogeneous distributed embedded systems |
Family Cites Families (588)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2067477A (en) | 1931-03-20 | 1937-01-12 | Allis Chalmers Mfg Co | Gearing |
GB971191A (en) | 1962-05-28 | 1964-09-30 | Wolf Electric Tools Ltd | Improvements relating to electrically driven equipment |
US3564506A (en) | 1968-01-17 | 1971-02-16 | Ibm | Instruction retry byte counter |
GB1253309A (en) | 1969-11-21 | 1971-11-10 | Marconi Co Ltd | Improvements in or relating to data processing arrangements |
US3753008A (en) | 1970-06-20 | 1973-08-14 | Honeywell Inf Systems | Memory pre-driver circuit |
DE2057312A1 (de) | 1970-11-21 | 1972-05-25 | Bhs Bayerische Berg | Planetenradgetriebe mit Lastdruckausgleich |
US5459846A (en) | 1988-12-02 | 1995-10-17 | Hyatt; Gilbert P. | Computer architecture system having an imporved memory |
US3855577A (en) | 1973-06-11 | 1974-12-17 | Texas Instruments Inc | Power saving circuit for calculator system |
US4151611A (en) | 1976-03-26 | 1979-04-24 | Tokyo Shibaura Electric Co., Ltd. | Power supply control system for memory systems |
US4233667A (en) | 1978-10-23 | 1980-11-11 | International Business Machines Corporation | Demand powered programmable logic array |
US4442508A (en) | 1981-08-05 | 1984-04-10 | General Instrument Corporation | Storage cells for use in two conductor data column storage logic arrays |
US4498134A (en) | 1982-01-26 | 1985-02-05 | Hughes Aircraft Company | Segregator functional plane for use in a modular array processor |
US4590583A (en) | 1982-07-16 | 1986-05-20 | At&T Bell Laboratories | Coin telephone measurement circuitry |
US4498172A (en) | 1982-07-26 | 1985-02-05 | General Electric Company | System for polynomial division self-testing of digital networks |
US4667190A (en) | 1982-07-30 | 1987-05-19 | Honeywell Inc. | Two axis fast access memory |
JPS5936857A (ja) | 1982-08-25 | 1984-02-29 | Nec Corp | プロセツサユニツト |
US4663706A (en) | 1982-10-28 | 1987-05-05 | Tandem Computers Incorporated | Multiprocessor multisystem communications network |
US4594682A (en) | 1982-12-22 | 1986-06-10 | Ibm Corporation | Vector processing |
US4739474A (en) | 1983-03-10 | 1988-04-19 | Martin Marietta Corporation | Geometric-arithmetic parallel processor |
US4566102A (en) | 1983-04-18 | 1986-01-21 | International Business Machines Corporation | Parallel-shift error reconfiguration |
US5123109A (en) | 1983-05-31 | 1992-06-16 | Thinking Machines Corporation | Parallel processor including a processor array with plural data transfer arrangements including (1) a global router and (2) a proximate-neighbor transfer system |
US4571736A (en) | 1983-10-31 | 1986-02-18 | University Of Southwestern Louisiana | Digital communication system employing differential coding and sample robbing |
USRE34363E (en) | 1984-03-12 | 1993-08-31 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
US4870302A (en) | 1984-03-12 | 1989-09-26 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
JPS60198618A (ja) | 1984-03-21 | 1985-10-08 | Oki Electric Ind Co Ltd | ダイナミツク論理回路 |
US4761755A (en) | 1984-07-11 | 1988-08-02 | Prime Computer, Inc. | Data processing system and method having an improved arithmetic unit |
US4682284A (en) | 1984-12-06 | 1987-07-21 | American Telephone & Telegraph Co., At&T Bell Lab. | Queue administration method and apparatus |
US4623997A (en) | 1984-12-13 | 1986-11-18 | United Technologies Corporation | Coherent interface with wraparound receive and transmit memories |
EP0190813B1 (de) | 1985-01-29 | 1991-09-18 | The Secretary of State for Defence in Her Britannic Majesty's Government of the United Kingdom of Great Britain and | Verarbeitungszelle für fehlertolerante Matrixanordnungen |
US4720778A (en) * | 1985-01-31 | 1988-01-19 | Hewlett Packard Company | Software debugging analyzer |
US5023775A (en) | 1985-02-14 | 1991-06-11 | Intel Corporation | Software programmable logic array utilizing "and" and "or" gates |
US5247689A (en) | 1985-02-25 | 1993-09-21 | Ewert Alfred P | Parallel digital processor including lateral transfer buses with interrupt switches to form bus interconnection segments |
US4706216A (en) | 1985-02-27 | 1987-11-10 | Xilinx, Inc. | Configurable logic element |
US5015884A (en) | 1985-03-29 | 1991-05-14 | Advanced Micro Devices, Inc. | Multiple array high performance programmable logic device family |
US5225719A (en) | 1985-03-29 | 1993-07-06 | Advanced Micro Devices, Inc. | Family of multiple segmented programmable logic blocks interconnected by a high speed centralized switch matrix |
US4972314A (en) | 1985-05-20 | 1990-11-20 | Hughes Aircraft Company | Data flow signal processor method and apparatus |
US4967340A (en) | 1985-06-12 | 1990-10-30 | E-Systems, Inc. | Adaptive processing system having an array of individually configurable processing components |
GB8517376D0 (en) | 1985-07-09 | 1985-08-14 | Jesshope C R | Processor array |
US4720780A (en) | 1985-09-17 | 1988-01-19 | The Johns Hopkins University | Memory-linked wavefront array processor |
DE3687400T2 (de) | 1985-11-04 | 1993-07-15 | Ibm | Digitale nachrichtenuebertragungsnetzwerke und aufbau von uebertragungswegen in diesen netzwerken. |
US4852048A (en) | 1985-12-12 | 1989-07-25 | Itt Corporation | Single instruction multiple data (SIMD) cellular array processing apparatus employing a common bus where a first number of bits manifest a first bus portion and a second number of bits manifest a second bus portion |
US4720822A (en) | 1986-03-07 | 1988-01-19 | International Business Machines Corporation | High frequency signal measurement method and apparatus |
US4882687A (en) | 1986-03-31 | 1989-11-21 | Schlumberger Technology Corporation | Pixel processor |
US5021947A (en) | 1986-03-31 | 1991-06-04 | Hughes Aircraft Company | Data-flow multiprocessor architecture with three dimensional multistage interconnection network for efficient signal and data processing |
US5034914A (en) | 1986-05-15 | 1991-07-23 | Aquidneck Systems International, Inc. | Optical disk data storage method and apparatus with buffered interface |
GB8612396D0 (en) | 1986-05-21 | 1986-06-25 | Hewlett Packard Ltd | Chain-configured interface bus system |
US4791603A (en) | 1986-07-18 | 1988-12-13 | Honeywell Inc. | Dynamically reconfigurable array logic |
US4860201A (en) | 1986-09-02 | 1989-08-22 | The Trustees Of Columbia University In The City Of New York | Binary tree parallel processor |
US4910665A (en) | 1986-09-02 | 1990-03-20 | General Electric Company | Distributed processing system including reconfigurable elements |
US5367208A (en) | 1986-09-19 | 1994-11-22 | Actel Corporation | Reconfigurable programmable interconnect architecture |
US4884231A (en) | 1986-09-26 | 1989-11-28 | Performance Semiconductor Corporation | Microprocessor system with extended arithmetic logic unit |
GB2211638A (en) | 1987-10-27 | 1989-07-05 | Ibm | Simd array processor |
FR2606184B1 (fr) | 1986-10-31 | 1991-11-29 | Thomson Csf | Dispositif de calcul reconfigurable |
US4918440A (en) | 1986-11-07 | 1990-04-17 | Furtek Frederick C | Programmable logic cell and array |
US4811214A (en) | 1986-11-14 | 1989-03-07 | Princeton University | Multinode reconfigurable pipeline computer |
US5226122A (en) | 1987-08-21 | 1993-07-06 | Compaq Computer Corp. | Programmable logic system for filtering commands to a microprocessor |
CA1299757C (en) | 1987-08-28 | 1992-04-28 | Brent Cameron Beardsley | Device initiated partial system quiescing |
US5119290A (en) | 1987-10-02 | 1992-06-02 | Sun Microsystems, Inc. | Alias address support |
CA1286421C (en) | 1987-10-14 | 1991-07-16 | Martin Claude Lefebvre | Message fifo buffer controller |
US5115510A (en) | 1987-10-20 | 1992-05-19 | Sharp Kabushiki Kaisha | Multistage data flow processor with instruction packet, fetch, storage transmission and address generation controlled by destination information |
US5113498A (en) | 1987-11-10 | 1992-05-12 | Echelon Corporation | Input/output section for an intelligent cell which provides sensing, bidirectional communications and control |
US4918690A (en) | 1987-11-10 | 1990-04-17 | Echelon Systems Corp. | Network and intelligent cell for providing sensing, bidirectional communications and control |
NL8800053A (nl) | 1988-01-11 | 1989-08-01 | Philips Nv | Videoprocessorsysteem, alsmede afbeeldingssysteem en beeldopslagsysteem, voorzien van een dergelijk videoprocessorsysteem. |
NL8800071A (nl) | 1988-01-13 | 1989-08-01 | Philips Nv | Dataprocessorsysteem en videoprocessorsysteem, voorzien van een dergelijk dataprocessorsysteem. |
USRE34444E (en) | 1988-01-13 | 1993-11-16 | Xilinx, Inc. | Programmable logic device |
DE68917326T2 (de) * | 1988-01-20 | 1995-03-02 | Advanced Micro Devices Inc | Organisation eines integrierten Cachespeichers zur flexiblen Anwendung zur Unterstützung von Multiprozessor-Operationen. |
US5303172A (en) | 1988-02-16 | 1994-04-12 | Array Microsystems | Pipelined combination and vector signal processor |
US4959781A (en) | 1988-05-16 | 1990-09-25 | Stardent Computer, Inc. | System for assigning interrupts to least busy processor that already loaded same class of interrupt routines |
JPH06101043B2 (ja) | 1988-06-30 | 1994-12-12 | 三菱電機株式会社 | マイクロコンピュータ |
US4939641A (en) | 1988-06-30 | 1990-07-03 | Wang Laboratories, Inc. | Multi-processor system with cache memories |
US5287511A (en) | 1988-07-11 | 1994-02-15 | Star Semiconductor Corporation | Architectures and methods for dividing processing tasks into tasks for a programmable real time signal processor and tasks for a decision making microprocessor interfacing therewith |
US5010401A (en) | 1988-08-11 | 1991-04-23 | Mitsubishi Denki Kabushiki Kaisha | Picture coding and decoding apparatus using vector quantization |
US4901268A (en) | 1988-08-19 | 1990-02-13 | General Electric Company | Multiple function data processor |
US5204935A (en) | 1988-08-19 | 1993-04-20 | Fuji Xerox Co., Ltd. | Programmable fuzzy logic circuits |
US5353432A (en) | 1988-09-09 | 1994-10-04 | Compaq Computer Corporation | Interactive method for configuration of computer system and circuit boards with user specification of system resources and computer resolution of resource conflicts |
ATE98833T1 (de) | 1988-09-22 | 1994-01-15 | Siemens Ag | Schaltungsanordnung fuer fernmeldevermittlungsanlagen, insbesondere pcmzeitmultiplex-fernsprechvermittlungsanlagen mit zentralkoppelfeld und angeschlossenen teilkoppelfeldern. |
DE68929518T2 (de) | 1988-10-05 | 2005-06-09 | Quickturn Design Systems, Inc., Mountain View | Verfahren zur Verwendung einer elektronisch wiederkonfigurierbaren Gatterfeld-Logik und dadurch hergestelltes Gerät |
JP2930341B2 (ja) | 1988-10-07 | 1999-08-03 | マーチン・マリエッタ・コーポレーション | データ並列処理装置 |
US5014193A (en) | 1988-10-14 | 1991-05-07 | Compaq Computer Corporation | Dynamically configurable portable computer system |
US5136717A (en) | 1988-11-23 | 1992-08-04 | Flavors Technology Inc. | Realtime systolic, multiple-instruction, single-data parallel computer system |
US4901665A (en) * | 1988-11-30 | 1990-02-20 | Carlin Paul J | Line mark book mark |
US5041924A (en) | 1988-11-30 | 1991-08-20 | Quantum Corporation | Removable and transportable hard disk subsystem |
US5081375A (en) | 1989-01-19 | 1992-01-14 | National Semiconductor Corp. | Method for operating a multiple page programmable logic device |
GB8906145D0 (en) | 1989-03-17 | 1989-05-04 | Algotronix Ltd | Configurable cellular array |
US5203005A (en) | 1989-05-02 | 1993-04-13 | Horst Robert W | Cell structure for linear array wafer scale integration architecture with capability to open boundary i/o bus without neighbor acknowledgement |
US5237686A (en) | 1989-05-10 | 1993-08-17 | Mitsubishi Denki Kabushiki Kaisha | Multiprocessor type time varying image encoding system and image processor with memory bus control table for arbitration priority |
US5109503A (en) | 1989-05-22 | 1992-04-28 | Ge Fanuc Automation North America, Inc. | Apparatus with reconfigurable counter includes memory for storing plurality of counter configuration files which respectively define plurality of predetermined counters |
JP2584673B2 (ja) | 1989-06-09 | 1997-02-26 | 株式会社日立製作所 | テストデータ変更回路を有する論理回路テスト装置 |
CA2021192A1 (en) | 1989-07-28 | 1991-01-29 | Malcolm A. Mumme | Simplified synchronous mesh processor |
US5343406A (en) | 1989-07-28 | 1994-08-30 | Xilinx, Inc. | Distributed memory architecture for a configurable logic array and method for using distributed memory |
US5233539A (en) | 1989-08-15 | 1993-08-03 | Advanced Micro Devices, Inc. | Programmable gate array with improved interconnect structure, input/output structure and configurable logic block |
US5212652A (en) | 1989-08-15 | 1993-05-18 | Advanced Micro Devices, Inc. | Programmable gate array with improved interconnect structure |
US5489857A (en) | 1992-08-03 | 1996-02-06 | Advanced Micro Devices, Inc. | Flexible synchronous/asynchronous cell structure for a high density programmable logic device |
US5128559A (en) | 1989-09-29 | 1992-07-07 | Sgs-Thomson Microelectronics, Inc. | Logic block for programmable logic devices |
JP2968289B2 (ja) | 1989-11-08 | 1999-10-25 | 株式会社リコー | 中央演算処理装置 |
GB8925723D0 (en) | 1989-11-14 | 1990-01-04 | Amt Holdings | Processor array system |
GB8925721D0 (en) | 1989-11-14 | 1990-01-04 | Amt Holdings | Processor array system |
US5212777A (en) | 1989-11-17 | 1993-05-18 | Texas Instruments Incorporated | Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation |
US5522083A (en) | 1989-11-17 | 1996-05-28 | Texas Instruments Incorporated | Reconfigurable multi-processor operating in SIMD mode with one processor fetching instructions for use by remaining processors |
EP0428770B1 (de) | 1989-11-21 | 1995-02-01 | Deutsche ITT Industries GmbH | Datengesteuerter Arrayprozessor |
US5099447A (en) | 1990-01-22 | 1992-03-24 | Alliant Computer Systems Corporation | Blocked matrix multiplication for computers with hierarchical memory |
WO1991011765A1 (en) | 1990-01-29 | 1991-08-08 | Teraplex, Inc. | Architecture for minimal instruction set computing system |
US5125801A (en) | 1990-02-02 | 1992-06-30 | Isco, Inc. | Pumping system |
US5036493A (en) | 1990-03-15 | 1991-07-30 | Digital Equipment Corporation | System and method for reducing power usage by multiple memory modules |
US5142469A (en) | 1990-03-29 | 1992-08-25 | Ge Fanuc Automation North America, Inc. | Method for converting a programmable logic controller hardware configuration and corresponding control program for use on a first programmable logic controller to use on a second programmable logic controller |
US5555201A (en) | 1990-04-06 | 1996-09-10 | Lsi Logic Corporation | Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including interactive system for hierarchical display of control and dataflow information |
EP0463721A3 (en) | 1990-04-30 | 1993-06-16 | Gennum Corporation | Digital signal processing device |
WO1991017507A1 (en) | 1990-05-07 | 1991-11-14 | Mitsubishi Denki Kabushiki Kaisha | Parallel data processing system |
US5198705A (en) | 1990-05-11 | 1993-03-30 | Actel Corporation | Logic module with configurable combinational and sequential blocks |
US5483620A (en) | 1990-05-22 | 1996-01-09 | International Business Machines Corp. | Learning machine synapse processor system apparatus |
US5193202A (en) | 1990-05-29 | 1993-03-09 | Wavetracer, Inc. | Processor array with relocated operand physical address generator capable of data transfer to distant physical processor for each virtual processor while simulating dimensionally larger array processor |
CA2045773A1 (en) | 1990-06-29 | 1991-12-30 | Compaq Computer Corporation | Byte-compare operation for high-performance processor |
US5111079A (en) | 1990-06-29 | 1992-05-05 | Sgs-Thomson Microelectronics, Inc. | Power reduction circuit for programmable logic device |
SE9002558D0 (sv) | 1990-08-02 | 1990-08-02 | Carlstedt Elektronik Ab | Processor |
DE4129614C2 (de) | 1990-09-07 | 2002-03-21 | Hitachi Ltd | System und Verfahren zur Datenverarbeitung |
US5274593A (en) | 1990-09-28 | 1993-12-28 | Intergraph Corporation | High speed redundant rows and columns for semiconductor memories |
US5144166A (en) | 1990-11-02 | 1992-09-01 | Concurrent Logic, Inc. | Programmable logic cell and array |
US5590345A (en) | 1990-11-13 | 1996-12-31 | International Business Machines Corporation | Advanced parallel array processor(APAP) |
US5794059A (en) | 1990-11-13 | 1998-08-11 | International Business Machines Corporation | N-dimensional modified hypercube |
US5734921A (en) | 1990-11-13 | 1998-03-31 | International Business Machines Corporation | Advanced parallel array processor computer package |
US5765011A (en) | 1990-11-13 | 1998-06-09 | International Business Machines Corporation | Parallel processing system having a synchronous SIMD processing with processing elements emulating SIMD operation using individual instruction streams |
EP0485690B1 (de) | 1990-11-13 | 1999-05-26 | International Business Machines Corporation | Paralleles Assoziativprozessor-System |
US5625836A (en) | 1990-11-13 | 1997-04-29 | International Business Machines Corporation | SIMD/MIMD processing memory element (PME) |
US5708836A (en) | 1990-11-13 | 1998-01-13 | International Business Machines Corporation | SIMD/MIMD inter-processor communication |
US5588152A (en) | 1990-11-13 | 1996-12-24 | International Business Machines Corporation | Advanced parallel processor including advanced support hardware |
US5617577A (en) | 1990-11-13 | 1997-04-01 | International Business Machines Corporation | Advanced parallel array processor I/O connection |
CA2051222C (en) | 1990-11-30 | 1998-05-05 | Pradeep S. Sindhu | Consistent packet switched memory bus for shared memory multiprocessors |
US5613128A (en) | 1990-12-21 | 1997-03-18 | Intel Corporation | Programmable multi-processor interrupt controller system with a processor integrated local interrupt controller |
US5276836A (en) | 1991-01-10 | 1994-01-04 | Hitachi, Ltd. | Data processing device with common memory connecting mechanism |
US5301284A (en) | 1991-01-16 | 1994-04-05 | Walker-Estes Corporation | Mixed-resolution, N-dimensional object space method and apparatus |
US5301344A (en) | 1991-01-29 | 1994-04-05 | Analogic Corporation | Multibus sequential processor to perform in parallel a plurality of reconfigurable logic operations on a plurality of data sets |
JP2867717B2 (ja) | 1991-02-01 | 1999-03-10 | 日本電気株式会社 | マイクロコンピュータ |
US5212716A (en) | 1991-02-05 | 1993-05-18 | International Business Machines Corporation | Data edge phase sorting circuits |
US5218302A (en) | 1991-02-06 | 1993-06-08 | Sun Electric Corporation | Interface for coupling an analyzer to a distributorless ignition system |
EP0642094B1 (de) | 1991-02-22 | 1998-09-02 | Siemens Aktiengesellschaft | Programmierverfahren für einen Logikbaustein |
JPH04290155A (ja) | 1991-03-19 | 1992-10-14 | Fujitsu Ltd | 並列データ処理方式 |
JPH04293151A (ja) | 1991-03-20 | 1992-10-16 | Fujitsu Ltd | 並列データ処理方式 |
US5617547A (en) | 1991-03-29 | 1997-04-01 | International Business Machines Corporation | Switch network extension of bus architecture |
WO1992018935A1 (en) | 1991-04-09 | 1992-10-29 | Fujitsu Limited | Data processor and data processing method |
JPH04328657A (ja) | 1991-04-30 | 1992-11-17 | Toshiba Corp | キャッシュメモリ |
US5446904A (en) | 1991-05-17 | 1995-08-29 | Zenith Data Systems Corporation | Suspend/resume capability for a protected mode microprocessor |
CA2109799A1 (en) | 1991-05-24 | 1992-12-10 | Daniel Mark Nosenchuck | Optimizing compiler for computers |
US5659797A (en) | 1991-06-24 | 1997-08-19 | U.S. Philips Corporation | Sparc RISC based computer system including a single chip processor with memory management and DMA units coupled to a DRAM interface |
JP3259969B2 (ja) | 1991-07-09 | 2002-02-25 | 株式会社東芝 | キャッシュメモリ制御装置 |
US5347639A (en) | 1991-07-15 | 1994-09-13 | International Business Machines Corporation | Self-parallelizing computer system and method |
US5317209A (en) | 1991-08-29 | 1994-05-31 | National Semiconductor Corporation | Dynamic three-state bussing capability in a configurable logic array |
US5581731A (en) | 1991-08-30 | 1996-12-03 | King; Edward C. | Method and apparatus for managing video data for faster access by selectively caching video data |
US5260610A (en) | 1991-09-03 | 1993-11-09 | Altera Corporation | Programmable logic element interconnections for programmable logic array integrated circuits |
US5550782A (en) | 1991-09-03 | 1996-08-27 | Altera Corporation | Programmable logic array integrated circuits |
US5633830A (en) | 1995-11-08 | 1997-05-27 | Altera Corporation | Random access memory block circuitry for programmable logic array integrated circuit devices |
FR2681791B1 (fr) | 1991-09-27 | 1994-05-06 | Salomon Sa | Dispositif d'amortissement des vibrations pour club de golf. |
CA2073516A1 (en) | 1991-11-27 | 1993-05-28 | Peter Michael Kogge | Dynamic multi-mode parallel processor array architecture computer system |
AU2939892A (en) | 1991-12-06 | 1993-06-28 | Richard S. Norman | Massively-parallel direct output processor array |
US5208491A (en) | 1992-01-07 | 1993-05-04 | Washington Research Foundation | Field programmable gate array |
FR2686175B1 (fr) | 1992-01-14 | 1996-12-20 | Andre Thepaut | Systeme de traitement de donnees multiprocesseur. |
US5412795A (en) | 1992-02-25 | 1995-05-02 | Micral, Inc. | State machine having a variable timing mechanism for varying the duration of logical output states of the state machine based on variation in the clock frequency |
JP2791243B2 (ja) | 1992-03-13 | 1998-08-27 | 株式会社東芝 | 階層間同期化システムおよびこれを用いた大規模集積回路 |
US5452401A (en) | 1992-03-31 | 1995-09-19 | Seiko Epson Corporation | Selective power-down for high performance CPU/system |
JP2647327B2 (ja) | 1992-04-06 | 1997-08-27 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 大規模並列コンピューティング・システム装置 |
US5493663A (en) | 1992-04-22 | 1996-02-20 | International Business Machines Corporation | Method and apparatus for predetermining pages for swapping from physical memory in accordance with the number of accesses |
JP2572522B2 (ja) | 1992-05-12 | 1997-01-16 | インターナショナル・ビジネス・マシーンズ・コーポレイション | コンピューティング装置 |
US5611049A (en) | 1992-06-03 | 1997-03-11 | Pitts; William M. | System for accessing distributed data cache channel at each network node to pass requests and data |
JP3737104B2 (ja) | 1992-06-04 | 2006-01-18 | ジリンクス,インコーポレーテッド | プログラム可能な集積回路デバイスにユーザ回路を配置するタイミング駆動式の方法 |
DE4221278C2 (de) | 1992-06-29 | 1996-02-29 | Martin Vorbach | Busgekoppeltes Mehrrechnersystem |
US5475803A (en) | 1992-07-10 | 1995-12-12 | Lsi Logic Corporation | Method for 2-D affine transformation of images |
JP3032382B2 (ja) | 1992-07-13 | 2000-04-17 | シャープ株式会社 | デジタル信号のサンプリング周波数変換装置 |
US5365125A (en) | 1992-07-23 | 1994-11-15 | Xilinx, Inc. | Logic cell for field programmable gate array having optional internal feedback and optional cascade |
US5386154A (en) | 1992-07-23 | 1995-01-31 | Xilinx, Inc. | Compact logic cell for field programmable gate array chip |
US5590348A (en) | 1992-07-28 | 1996-12-31 | International Business Machines Corporation | Status predictor for combined shifter-rotate/merge unit |
US5802290A (en) | 1992-07-29 | 1998-09-01 | Virtual Computer Corporation | Computer network of distributed virtual computers which are EAC reconfigurable in response to instruction to be executed |
US5581778A (en) | 1992-08-05 | 1996-12-03 | David Sarnoff Researach Center | Advanced massively parallel computer using a field of the instruction to selectively enable the profiling counter to increase its value in response to the system clock |
WO1994006077A1 (de) * | 1992-08-28 | 1994-03-17 | Siemens Aktiengesellschaft | Rechnersystem mit mindestens einem mikroprozessor und mindestens einem coprozessor und verfahren zu dessen betrieb |
ATE237861T1 (de) | 1992-09-03 | 2003-05-15 | Sony Corp | Datenaufzeichnungsgerät und -verfahren |
US5572710A (en) | 1992-09-11 | 1996-11-05 | Kabushiki Kaisha Toshiba | High speed logic simulation system using time division emulation suitable for large scale logic circuits |
US5425036A (en) | 1992-09-18 | 1995-06-13 | Quickturn Design Systems, Inc. | Method and apparatus for debugging reconfigurable emulation systems |
JPH06180653A (ja) | 1992-10-02 | 1994-06-28 | Hudson Soft Co Ltd | 割り込み処理方法および装置 |
US5497498A (en) | 1992-11-05 | 1996-03-05 | Giga Operations Corporation | Video processing module using a second programmable logic device which reconfigures a first programmable logic device for data transformation |
GB9223226D0 (en) | 1992-11-05 | 1992-12-16 | Algotronix Ltd | Improved configurable cellular array (cal ii) |
US5857109A (en) | 1992-11-05 | 1999-01-05 | Giga Operations Corporation | Programmable logic device for real time video processing |
US5392437A (en) | 1992-11-06 | 1995-02-21 | Intel Corporation | Method and apparatus for independently stopping and restarting functional units |
US5361373A (en) | 1992-12-11 | 1994-11-01 | Gilson Kent L | Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor |
US5311079A (en) | 1992-12-17 | 1994-05-10 | Ditlow Gary S | Low power, high performance PLA |
US5428526A (en) | 1993-02-03 | 1995-06-27 | Flood; Mark A. | Programmable controller with time periodic communication |
US5386518A (en) | 1993-02-12 | 1995-01-31 | Hughes Aircraft Company | Reconfigurable computer interface and method |
GB9303084D0 (en) | 1993-02-16 | 1993-03-31 | Inmos Ltd | Programmable logic circuit |
JPH06276086A (ja) | 1993-03-18 | 1994-09-30 | Fuji Xerox Co Ltd | フィールドプログラマブルゲートアレイ |
US5548773A (en) | 1993-03-30 | 1996-08-20 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Digital parallel processor array for optimum path planning |
US5596742A (en) | 1993-04-02 | 1997-01-21 | Massachusetts Institute Of Technology | Virtual interconnections for reconfigurable logic systems |
US5418953A (en) | 1993-04-12 | 1995-05-23 | Loral/Rohm Mil-Spec Corp. | Method for automated deployment of a software program onto a multi-processor architecture |
US5473266A (en) | 1993-04-19 | 1995-12-05 | Altera Corporation | Programmable logic device having fast programmable logic array blocks and a central global interconnect array |
WO1994025917A1 (en) | 1993-04-26 | 1994-11-10 | Comdisco Systems, Inc. | Method for scheduling synchronous data flow graphs |
DE4416881C2 (de) | 1993-05-13 | 1998-03-19 | Pact Inf Tech Gmbh | Verfahren zum Betrieb einer Datenverarbeitungseinrichtung |
US5435000A (en) | 1993-05-19 | 1995-07-18 | Bull Hn Information Systems Inc. | Central processing unit using dual basic processing units and combined result bus |
US5349193A (en) | 1993-05-20 | 1994-09-20 | Princeton Gamma Tech, Inc. | Highly sensitive nuclear spectrometer apparatus and method |
IT1260848B (it) | 1993-06-11 | 1996-04-23 | Finmeccanica Spa | Sistema a multiprocessore |
US5444394A (en) | 1993-07-08 | 1995-08-22 | Altera Corporation | PLD with selective inputs from local and global conductors |
JPH0736858A (ja) | 1993-07-21 | 1995-02-07 | Hitachi Ltd | 信号処理プロセッサ |
US5581734A (en) | 1993-08-02 | 1996-12-03 | International Business Machines Corporation | Multiprocessor system with shared cache and data input/output circuitry for transferring data amount greater than system bus capacity |
CA2129882A1 (en) | 1993-08-12 | 1995-02-13 | Soheil Shams | Dynamically reconfigurable interprocessor communication network for simd multiprocessors and apparatus implementing same |
US5457644A (en) | 1993-08-20 | 1995-10-10 | Actel Corporation | Field programmable digital signal processing array integrated circuit |
GB2282244B (en) | 1993-09-23 | 1998-01-14 | Advanced Risc Mach Ltd | Integrated circuit |
US5440538A (en) | 1993-09-23 | 1995-08-08 | Massachusetts Institute Of Technology | Communication system with redundant links and data bit time multiplexing |
US6219688B1 (en) | 1993-11-30 | 2001-04-17 | Texas Instruments Incorporated | Method, apparatus and system for sum of plural absolute differences |
US5455525A (en) | 1993-12-06 | 1995-10-03 | Intelligent Logic Systems, Inc. | Hierarchically-structured programmable logic array and system for interconnecting logic elements in the logic array |
US5535406A (en) | 1993-12-29 | 1996-07-09 | Kolchinsky; Alexander | Virtual processor module including a reconfigurable programmable matrix |
US5680583A (en) | 1994-02-16 | 1997-10-21 | Arkos Design, Inc. | Method and apparatus for a trace buffer in an emulation system |
US5870302A (en) * | 1994-02-17 | 1999-02-09 | Waterlink Systems, Inc. | Evapotranspiration remote irrigation control system |
CN1104683C (zh) | 1994-03-22 | 2003-04-02 | 海珀奇普公司 | 支持具有与系统操作者直接通信的装置的完全集成系统的高效直接单元替换容错结构 |
US5574927A (en) | 1994-03-25 | 1996-11-12 | International Meta Systems, Inc. | RISC architecture computer configured for emulation of the instruction set of a target computer |
US5561738A (en) | 1994-03-25 | 1996-10-01 | Motorola, Inc. | Data processor for executing a fuzzy logic operation and method therefor |
US5761484A (en) | 1994-04-01 | 1998-06-02 | Massachusetts Institute Of Technology | Virtual interconnections for reconfigurable logic systems |
US5504439A (en) | 1994-04-01 | 1996-04-02 | Xilinx, Inc. | I/O interface cell for use with optional pad |
US5781756A (en) | 1994-04-01 | 1998-07-14 | Xilinx, Inc. | Programmable logic device with partially configurable memory cells and a method for configuration |
US5430687A (en) | 1994-04-01 | 1995-07-04 | Xilinx, Inc. | Programmable logic device including a parallel input device for loading memory cells |
US5896551A (en) | 1994-04-15 | 1999-04-20 | Micron Technology, Inc. | Initializing and reprogramming circuitry for state independent memory array burst operations control |
US5426378A (en) | 1994-04-20 | 1995-06-20 | Xilinx, Inc. | Programmable logic device which stores more than one configuration and means for switching configurations |
JP2671804B2 (ja) | 1994-05-27 | 1997-11-05 | 日本電気株式会社 | 階層型資源管理方法 |
US5532693A (en) | 1994-06-13 | 1996-07-02 | Advanced Hardware Architectures | Adaptive data compression system with systolic string matching logic |
EP0690378A1 (de) | 1994-06-30 | 1996-01-03 | Tandem Computers Incorporated | Werkzeug und Verfahren zur Fehlerdiagnose und -korrektur in einem Rechnerprogramm |
JP3308770B2 (ja) | 1994-07-22 | 2002-07-29 | 三菱電機株式会社 | 情報処理装置および情報処理装置における計算方法 |
US5600845A (en) | 1994-07-27 | 1997-02-04 | Metalithic Systems Incorporated | Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor |
JP3365581B2 (ja) | 1994-07-29 | 2003-01-14 | 富士通株式会社 | 自己修復機能付き情報処理装置 |
US5801973A (en) | 1994-07-29 | 1998-09-01 | Discovision Associates | Video decompression |
US5574930A (en) | 1994-08-12 | 1996-11-12 | University Of Hawaii | Computer system and method using functional memory |
US5513366A (en) | 1994-09-28 | 1996-04-30 | International Business Machines Corporation | Method and system for dynamically reconfiguring a register file in a vector processor |
US5619720A (en) | 1994-10-04 | 1997-04-08 | Analog Devices, Inc. | Digital signal processor having link ports for point-to-point communication |
US5450022A (en) | 1994-10-07 | 1995-09-12 | Xilinx Inc. | Structure and method for configuration of a field programmable gate array |
EP0707269A1 (de) | 1994-10-11 | 1996-04-17 | International Business Machines Corporation | Cachespeicherkohärenznetzwerk für Multiprozessor-Datenverarbeitungssystem |
US5530946A (en) | 1994-10-28 | 1996-06-25 | Dell Usa, L.P. | Processor failure detection and recovery circuit in a dual processor computer system and method of operation thereof |
US5815726A (en) | 1994-11-04 | 1998-09-29 | Altera Corporation | Coarse-grained look-up table architecture |
JPH08137824A (ja) | 1994-11-15 | 1996-05-31 | Mitsubishi Semiconductor Software Kk | セルフテスト機能内蔵シングルチップマイコン |
US6154826A (en) | 1994-11-16 | 2000-11-28 | University Of Virginia Patent Foundation | Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order |
US5584013A (en) | 1994-12-09 | 1996-12-10 | International Business Machines Corporation | Hierarchical cache arrangement wherein the replacement of an LRU entry in a second level cache is prevented when the cache entry is the only inclusive entry in the first level cache |
EP0721157A1 (de) | 1994-12-12 | 1996-07-10 | Advanced Micro Devices, Inc. | Mikroprozessor mit auswählbarer Taktfrequenz |
US5537580A (en) | 1994-12-21 | 1996-07-16 | Vlsi Technology, Inc. | Integrated circuit fabrication using state machine extraction from behavioral hardware description language |
JP3598139B2 (ja) | 1994-12-28 | 2004-12-08 | 株式会社日立製作所 | データ処理装置 |
US6128720A (en) | 1994-12-29 | 2000-10-03 | International Business Machines Corporation | Distributed processing array with component processors performing customized interpretation of instructions |
US5682491A (en) | 1994-12-29 | 1997-10-28 | International Business Machines Corporation | Selective processing and routing of results among processors controlled by decoding instructions using mask value derived from instruction tag and processor identifier |
US5696791A (en) | 1995-01-17 | 1997-12-09 | Vtech Industries, Inc. | Apparatus and method for decoding a sequence of digitally encoded data |
US5493239A (en) | 1995-01-31 | 1996-02-20 | Motorola, Inc. | Circuit and method of configuring a field programmable gate array |
US5532957A (en) | 1995-01-31 | 1996-07-02 | Texas Instruments Incorporated | Field reconfigurable logic/memory array |
US6052773A (en) * | 1995-02-10 | 2000-04-18 | Massachusetts Institute Of Technology | DPGA-coupled microprocessors |
US5742180A (en) | 1995-02-10 | 1998-04-21 | Massachusetts Institute Of Technology | Dynamically programmable gate array with multiple contexts |
US5659785A (en) | 1995-02-10 | 1997-08-19 | International Business Machines Corporation | Array processor communication architecture with broadcast processor instructions |
US5537057A (en) | 1995-02-14 | 1996-07-16 | Altera Corporation | Programmable logic array device with grouped logic regions and three types of conductors |
US5862403A (en) | 1995-02-17 | 1999-01-19 | Kabushiki Kaisha Toshiba | Continuous data server apparatus and data transfer scheme enabling multiple simultaneous data accesses |
US5892961A (en) | 1995-02-17 | 1999-04-06 | Xilinx, Inc. | Field programmable gate array having programming instructions in the configuration bitstream |
US5675743A (en) | 1995-02-22 | 1997-10-07 | Callisto Media Systems Inc. | Multi-media server |
US5757207A (en) | 1995-03-22 | 1998-05-26 | Altera Corporation | Programmable logic array integrated circuit incorporating a first-in first-out memory |
US5570040A (en) | 1995-03-22 | 1996-10-29 | Altera Corporation | Programmable logic array integrated circuit incorporating a first-in first-out memory |
US5752035A (en) | 1995-04-05 | 1998-05-12 | Xilinx, Inc. | Method for compiling and executing programs for reprogrammable instruction set accelerator |
US5748979A (en) | 1995-04-05 | 1998-05-05 | Xilinx Inc | Reprogrammable instruction set accelerator using a plurality of programmable execution units and an instruction page table |
JP3313007B2 (ja) | 1995-04-14 | 2002-08-12 | 三菱電機株式会社 | マイクロコンピュータ |
US5794062A (en) | 1995-04-17 | 1998-08-11 | Ricoh Company Ltd. | System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization |
US5933642A (en) | 1995-04-17 | 1999-08-03 | Ricoh Corporation | Compiling system and method for reconfigurable computing |
US6077315A (en) | 1995-04-17 | 2000-06-20 | Ricoh Company Ltd. | Compiling system and method for partially reconfigurable computing |
WO1996034346A1 (en) | 1995-04-28 | 1996-10-31 | Xilinx, Inc. | Microprocessor with distributed registers accessible by programmable logic device |
US5701091A (en) | 1995-05-02 | 1997-12-23 | Xilinx, Inc. | Routing resources for hierarchical FPGA |
US5600597A (en) | 1995-05-02 | 1997-02-04 | Xilinx, Inc. | Register protection structure for FPGA |
GB9508931D0 (en) | 1995-05-02 | 1995-06-21 | Xilinx Inc | Programmable switch for FPGA input/output signals |
US5541530A (en) | 1995-05-17 | 1996-07-30 | Altera Corporation | Programmable logic array integrated circuits with blocks of logic regions grouped into super-blocks |
US5649179A (en) | 1995-05-19 | 1997-07-15 | Motorola, Inc. | Dynamic instruction allocation for a SIMD processor |
US5821774A (en) | 1995-05-26 | 1998-10-13 | Xilinx, Inc. | Structure and method for arithmetic function implementation in an EPLD having high speed product term allocation structure |
JPH08328941A (ja) | 1995-05-31 | 1996-12-13 | Nec Corp | メモリアクセス制御回路 |
JP3677315B2 (ja) | 1995-06-01 | 2005-07-27 | シャープ株式会社 | データ駆動型情報処理装置 |
US5652529A (en) | 1995-06-02 | 1997-07-29 | International Business Machines Corporation | Programmable array clock/reset resource |
US5671432A (en) | 1995-06-02 | 1997-09-23 | International Business Machines Corporation | Programmable array I/O-routing resource |
US5646544A (en) | 1995-06-05 | 1997-07-08 | International Business Machines Corporation | System and method for dynamically reconfiguring a programmable gate array |
US5815715A (en) | 1995-06-05 | 1998-09-29 | Motorola, Inc. | Method for designing a product having hardware and software components and product therefor |
US5889982A (en) | 1995-07-01 | 1999-03-30 | Intel Corporation | Method and apparatus for generating event handler vectors based on both operating mode and event type |
US5559450A (en) | 1995-07-27 | 1996-09-24 | Lucent Technologies Inc. | Field programmable gate array with multi-port RAM |
US5978583A (en) | 1995-08-07 | 1999-11-02 | International Business Machines Corp. | Method for resource control in parallel environments using program organization and run-time support |
US5649176A (en) | 1995-08-10 | 1997-07-15 | Virtual Machine Works, Inc. | Transition analysis and circuit resynthesis method and device for digital circuit modeling |
US5996083A (en) | 1995-08-11 | 1999-11-30 | Hewlett-Packard Company | Microprocessor having software controllable power consumption |
GB2304438A (en) | 1995-08-17 | 1997-03-19 | Kenneth Austin | Re-configurable application specific device |
US5784313A (en) | 1995-08-18 | 1998-07-21 | Xilinx, Inc. | Programmable logic device including configuration data or user data memory slices |
US5583450A (en) | 1995-08-18 | 1996-12-10 | Xilinx, Inc. | Sequencer for a time multiplexed programmable logic device |
US5646545A (en) | 1995-08-18 | 1997-07-08 | Xilinx, Inc. | Time multiplexed programmable logic device |
US5778439A (en) | 1995-08-18 | 1998-07-07 | Xilinx, Inc. | Programmable logic device with hierarchical confiquration and state storage |
US5737565A (en) | 1995-08-24 | 1998-04-07 | International Business Machines Corporation | System and method for diallocating stream from a stream buffer |
US5737516A (en) | 1995-08-30 | 1998-04-07 | Motorola, Inc. | Data processing system for performing a debug function and method therefor |
US5734869A (en) | 1995-09-06 | 1998-03-31 | Chen; Duan-Ping | High speed logic circuit simulator |
US6430309B1 (en) | 1995-09-15 | 2002-08-06 | Monogen, Inc. | Specimen preview and inspection system |
US5745734A (en) | 1995-09-29 | 1998-04-28 | International Business Machines Corporation | Method and system for programming a gate array using a compressed configuration bit stream |
US5652894A (en) | 1995-09-29 | 1997-07-29 | Intel Corporation | Method and apparatus for providing power saving modes to a pipelined processor |
US5754827A (en) | 1995-10-13 | 1998-05-19 | Mentor Graphics Corporation | Method and apparatus for performing fully visible tracing of an emulation |
US5642058A (en) | 1995-10-16 | 1997-06-24 | Xilinx , Inc. | Periphery input/output interconnect structure |
US5815004A (en) | 1995-10-16 | 1998-09-29 | Xilinx, Inc. | Multi-buffered configurable logic block output lines in a field programmable gate array |
US5608342A (en) | 1995-10-23 | 1997-03-04 | Xilinx, Inc. | Hierarchical programming of electrically configurable integrated circuits |
US5656950A (en) | 1995-10-26 | 1997-08-12 | Xilinx, Inc. | Interconnect lines including tri-directional buffer circuits |
US5675262A (en) | 1995-10-26 | 1997-10-07 | Xilinx, Inc. | Fast carry-out scheme in a field programmable gate array |
US5943242A (en) | 1995-11-17 | 1999-08-24 | Pact Gmbh | Dynamically reconfigurable data processing system |
US5732209A (en) | 1995-11-29 | 1998-03-24 | Exponential Technology, Inc. | Self-testing multi-processor die with internal compare points |
US5773994A (en) | 1995-12-15 | 1998-06-30 | Cypress Semiconductor Corp. | Method and apparatus for implementing an internal tri-state bus within a programmable logic circuit |
JPH09231788A (ja) | 1995-12-19 | 1997-09-05 | Fujitsu Ltd | シフトレジスタ及びプログラマブル論理回路並びにプログラマブル論理回路システム |
US7266725B2 (en) | 2001-09-03 | 2007-09-04 | Pact Xpp Technologies Ag | Method for debugging reconfigurable architectures |
US5804986A (en) | 1995-12-29 | 1998-09-08 | Cypress Semiconductor Corp. | Memory in a programmable logic device |
JP3247043B2 (ja) | 1996-01-12 | 2002-01-15 | 株式会社日立製作所 | 内部信号で障害検出を行う情報処理システムおよび論理lsi |
JP2795244B2 (ja) | 1996-01-17 | 1998-09-10 | 日本電気株式会社 | プログラムデバッグシステム |
US5760602A (en) | 1996-01-17 | 1998-06-02 | Hewlett-Packard Company | Time multiplexing a plurality of configuration settings of a programmable switch element in a FPGA |
US5854918A (en) | 1996-01-24 | 1998-12-29 | Ricoh Company Ltd. | Apparatus and method for self-timed algorithmic execution |
US5898602A (en) | 1996-01-25 | 1999-04-27 | Xilinx, Inc. | Carry chain circuit with flexible carry function for implementing arithmetic and logical functions |
US5635851A (en) | 1996-02-02 | 1997-06-03 | Xilinx, Inc. | Read and writable data bus particularly for programmable logic devices |
US5936424A (en) | 1996-02-02 | 1999-08-10 | Xilinx, Inc. | High speed bus with tree structure for selecting bus driver |
US5727229A (en) | 1996-02-05 | 1998-03-10 | Motorola, Inc. | Method and apparatus for moving data in a parallel processor |
US5754459A (en) | 1996-02-08 | 1998-05-19 | Xilinx, Inc. | Multiplier circuit design for a programmable logic device |
KR0165515B1 (ko) | 1996-02-17 | 1999-01-15 | 김광호 | 그래픽 데이터의 선입선출기 및 선입선출 방법 |
GB9604496D0 (en) | 1996-03-01 | 1996-05-01 | Xilinx Inc | Embedded memory for field programmable gate array |
US6020758A (en) | 1996-03-11 | 2000-02-01 | Altera Corporation | Partially reconfigurable programmable logic device |
US5841973A (en) | 1996-03-13 | 1998-11-24 | Cray Research, Inc. | Messaging in distributed memory multiprocessing system having shell circuitry for atomic control of message storage queue's tail pointer structure in local memory |
US6279077B1 (en) | 1996-03-22 | 2001-08-21 | Texas Instruments Incorporated | Bus interface buffer control in a microprocessor |
US6311265B1 (en) | 1996-03-25 | 2001-10-30 | Torrent Systems, Inc. | Apparatuses and methods for programming parallel computers |
US6154049A (en) | 1998-03-27 | 2000-11-28 | Xilinx, Inc. | Multiplier fabric for use in field programmable gate arrays |
US5956518A (en) | 1996-04-11 | 1999-09-21 | Massachusetts Institute Of Technology | Intermediate-grain reconfigurable processing device |
US5687325A (en) | 1996-04-19 | 1997-11-11 | Chang; Web | Application specific field programmable gate array |
US6173434B1 (en) | 1996-04-22 | 2001-01-09 | Brigham Young University | Dynamically-configurable digital processor using method for relocating logic array modules |
US5960200A (en) | 1996-05-03 | 1999-09-28 | I-Cube | System to transition an enterprise to a distributed infrastructure |
US5894565A (en) | 1996-05-20 | 1999-04-13 | Atmel Corporation | Field programmable gate array with distributed RAM and increased cell utilization |
US5784636A (en) | 1996-05-28 | 1998-07-21 | National Semiconductor Corporation | Reconfigurable computer architecture for use in signal processing applications |
US5892370A (en) | 1996-06-21 | 1999-04-06 | Quicklogic Corporation | Clock network for field programmable gate array |
JP2000513523A (ja) | 1996-06-21 | 2000-10-10 | オーガニック システムズ インコーポレイテッド | プロセスの即時制御を行う動的に再構成可能なハードウェアシステム |
US6785826B1 (en) | 1996-07-17 | 2004-08-31 | International Business Machines Corporation | Self power audit and control circuitry for microprocessor functional units |
US6023742A (en) | 1996-07-18 | 2000-02-08 | University Of Washington | Reconfigurable computing architecture for providing pipelined data paths |
US6023564A (en) | 1996-07-19 | 2000-02-08 | Xilinx, Inc. | Data processing system using a flash reconfigurable logic device as a dynamic execution unit for a sequence of instructions |
KR100280285B1 (ko) | 1996-08-19 | 2001-02-01 | 윤종용 | 멀티미디어 신호에 적합한 멀티미디어 프로세서 |
US5838165A (en) | 1996-08-21 | 1998-11-17 | Chatter; Mukesh | High performance self modifying on-the-fly alterable logic FPGA, architecture and method |
US5933023A (en) | 1996-09-03 | 1999-08-03 | Xilinx, Inc. | FPGA architecture having RAM blocks with programmable word length and width and dedicated address and data lines |
US6624658B2 (en) | 1999-02-04 | 2003-09-23 | Advantage Logic, Inc. | Method and apparatus for universal program controlled bus architecture |
US5859544A (en) | 1996-09-05 | 1999-01-12 | Altera Corporation | Dynamic configurable elements for programmable logic devices |
US6049866A (en) * | 1996-09-06 | 2000-04-11 | Silicon Graphics, Inc. | Method and system for an efficient user mode cache manipulation using a simulated instruction |
JP3934710B2 (ja) | 1996-09-13 | 2007-06-20 | 株式会社ルネサステクノロジ | マイクロプロセッサ |
US5828858A (en) | 1996-09-16 | 1998-10-27 | Virginia Tech Intellectual Properties, Inc. | Worm-hole run-time reconfigurable processor field programmable gate array (FPGA) |
US6178494B1 (en) | 1996-09-23 | 2001-01-23 | Virtual Computer Corporation | Modular, hybrid processor and method for producing a modular, hybrid processor |
US5694602A (en) | 1996-10-01 | 1997-12-02 | The United States Of America As Represented By The Secretary Of The Air Force | Weighted system and method for spatial allocation of a parallel load |
SG125044A1 (en) | 1996-10-14 | 2006-09-29 | Mitsubishi Gas Chemical Co | Oxygen absorption composition |
US5901279A (en) | 1996-10-18 | 1999-05-04 | Hughes Electronics Corporation | Connection of spares between multiple programmable devices |
US5832288A (en) | 1996-10-18 | 1998-11-03 | Samsung Electronics Co., Ltd. | Element-select mechanism for a vector processor |
US5892962A (en) | 1996-11-12 | 1999-04-06 | Lucent Technologies Inc. | FPGA-based processor |
US5895487A (en) | 1996-11-13 | 1999-04-20 | International Business Machines Corporation | Integrated processing and L2 DRAM cache |
US5844422A (en) | 1996-11-13 | 1998-12-01 | Xilinx, Inc. | State saving and restoration in reprogrammable FPGAs |
US5860119A (en) | 1996-11-25 | 1999-01-12 | Vlsi Technology, Inc. | Data-packet fifo buffer system with end-of-packet flags |
US6005410A (en) | 1996-12-05 | 1999-12-21 | International Business Machines Corporation | Interconnect structure between heterogeneous core regions in a programmable array |
DE19651075A1 (de) | 1996-12-09 | 1998-06-10 | Pact Inf Tech Gmbh | Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen |
DE19654595A1 (de) | 1996-12-20 | 1998-07-02 | Pact Inf Tech Gmbh | I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen |
DE19654593A1 (de) | 1996-12-20 | 1998-07-02 | Pact Inf Tech Gmbh | Umkonfigurierungs-Verfahren für programmierbare Bausteine zur Laufzeit |
US6338106B1 (en) | 1996-12-20 | 2002-01-08 | Pact Gmbh | I/O and memory bus system for DFPS and units with two or multi-dimensional programmable cell architectures |
DE19654846A1 (de) | 1996-12-27 | 1998-07-09 | Pact Inf Tech Gmbh | Verfahren zum selbständigen dynamischen Umladen von Datenflußprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o. dgl.) |
JP3961028B2 (ja) | 1996-12-27 | 2007-08-15 | ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト | データフロープロセッサ(dfp)の自動的なダイナミックアンロード方法並びに2次元または3次元のプログラミング可能なセルストラクチャを有するモジュール(fpga,dpga等) |
US6427156B1 (en) | 1997-01-21 | 2002-07-30 | Xilinx, Inc. | Configurable logic block with AND gate for efficient multiplication in FPGAS |
EP0858168A1 (de) | 1997-01-29 | 1998-08-12 | Hewlett-Packard Company | Feldprogrammierbarer Gatterprozessor |
EP0858167A1 (de) | 1997-01-29 | 1998-08-12 | Hewlett-Packard Company | Feldprogrammierbarer Prozessor |
DE19704044A1 (de) | 1997-02-04 | 1998-08-13 | Pact Inf Tech Gmbh | Verfahren zur automatischen Adressgenerierung von Bausteinen innerhalb Clustern aus einer Vielzahl dieser Bausteine |
US5865239A (en) | 1997-02-05 | 1999-02-02 | Micropump, Inc. | Method for making herringbone gears |
US6055619A (en) | 1997-02-07 | 2000-04-25 | Cirrus Logic, Inc. | Circuits, system, and methods for processing multiple data streams |
US6542998B1 (en) | 1997-02-08 | 2003-04-01 | Pact Gmbh | Method of self-synchronization of configurable elements of a programmable module |
DE19704728A1 (de) | 1997-02-08 | 1998-08-13 | Pact Inf Tech Gmbh | Verfahren zur Selbstsynchronisation von konfigurierbaren Elementen eines programmierbaren Bausteines |
DE19704742A1 (de) | 1997-02-11 | 1998-09-24 | Pact Inf Tech Gmbh | Internes Bussystem für DFPs, sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen, zur Bewältigung großer Datenmengen mit hohem Vernetzungsaufwand |
US6150837A (en) | 1997-02-28 | 2000-11-21 | Actel Corporation | Enhanced field programmable gate array |
WO1998038958A1 (en) | 1997-03-05 | 1998-09-11 | Massachusetts Institute Of Technology | A reconfigurable footprint mechanism for omnidirectional vehicles |
US6125408A (en) | 1997-03-10 | 2000-09-26 | Compaq Computer Corporation | Resource type prioritization in generating a device configuration |
US5884075A (en) | 1997-03-10 | 1999-03-16 | Compaq Computer Corporation | Conflict resolution using self-contained virtual devices |
US5857097A (en) | 1997-03-10 | 1999-01-05 | Digital Equipment Corporation | Method for identifying reasons for dynamic stall cycles during the execution of a program |
US6085317A (en) | 1997-08-15 | 2000-07-04 | Altera Corporation | Reconfigurable computer architecture using programmable logic devices |
US6272257B1 (en) | 1997-04-30 | 2001-08-07 | Canon Kabushiki Kaisha | Decoder of variable length codes |
US6321366B1 (en) | 1997-05-02 | 2001-11-20 | Axis Systems, Inc. | Timing-insensitive glitch-free logic system and method |
US6389379B1 (en) | 1997-05-02 | 2002-05-14 | Axis Systems, Inc. | Converification system and method |
US6035371A (en) | 1997-05-28 | 2000-03-07 | 3Com Corporation | Method and apparatus for addressing a static random access memory device based on signals for addressing a dynamic memory access device |
US6047115A (en) | 1997-05-29 | 2000-04-04 | Xilinx, Inc. | Method for configuring FPGA memory planes for virtual hardware computation |
US6421817B1 (en) | 1997-05-29 | 2002-07-16 | Xilinx, Inc. | System and method of computation in a programmable logic device using virtual instructions |
US6339840B1 (en) | 1997-06-02 | 2002-01-15 | Iowa State University Research Foundation, Inc. | Apparatus and method for parallelizing legacy computer code |
US6011407A (en) | 1997-06-13 | 2000-01-04 | Xilinx, Inc. | Field programmable gate array with dedicated computer bus interface and method for configuring both |
US5996048A (en) | 1997-06-20 | 1999-11-30 | Sun Microsystems, Inc. | Inclusion vector architecture for a level two cache |
US6240502B1 (en) | 1997-06-25 | 2001-05-29 | Sun Microsystems, Inc. | Apparatus for dynamically reconfiguring a processor |
US5838988A (en) | 1997-06-25 | 1998-11-17 | Sun Microsystems, Inc. | Computer product for precise architectural update in an out-of-order processor |
US5970254A (en) | 1997-06-27 | 1999-10-19 | Cooke; Laurence H. | Integrated processor and programmable data path chip for reconfigurable computing |
US5966534A (en) | 1997-06-27 | 1999-10-12 | Cooke; Laurence H. | Method for compiling high level programming languages into an integrated processor with reconfigurable logic |
US6437441B1 (en) | 1997-07-10 | 2002-08-20 | Kawasaki Microelectronics, Inc. | Wiring structure of a semiconductor integrated circuit and a method of forming the wiring structure |
US6020760A (en) | 1997-07-16 | 2000-02-01 | Altera Corporation | I/O buffer circuit with pin multiplexing |
US6282701B1 (en) | 1997-07-31 | 2001-08-28 | Mutek Solutions, Ltd. | System and method for monitoring and analyzing the execution of computer programs |
US6026478A (en) | 1997-08-01 | 2000-02-15 | Micron Technology, Inc. | Split embedded DRAM processor |
US6170051B1 (en) | 1997-08-01 | 2001-01-02 | Micron Technology, Inc. | Apparatus and method for program level parallelism in a VLIW processor |
US6078736A (en) | 1997-08-28 | 2000-06-20 | Xilinx, Inc. | Method of designing FPGAs for dynamically reconfigurable computing |
US6038656A (en) | 1997-09-12 | 2000-03-14 | California Institute Of Technology | Pipelined completion for asynchronous communication |
JP3612186B2 (ja) | 1997-09-19 | 2005-01-19 | 株式会社ルネサステクノロジ | データ処理装置 |
US6539415B1 (en) | 1997-09-24 | 2003-03-25 | Sony Corporation | Method and apparatus for the allocation of audio/video tasks in a network system |
US5966143A (en) | 1997-10-14 | 1999-10-12 | Motorola, Inc. | Data allocation into multiple memories for concurrent access |
SG82587A1 (en) | 1997-10-21 | 2001-08-21 | Sony Corp | Recording apparatus, recording method, playback apparatus, playback method, recording/playback apparatus, recording/playback method, presentation medium and recording medium |
JP4128251B2 (ja) | 1997-10-23 | 2008-07-30 | 富士通株式会社 | 配線密度予測方法およびセル配置装置 |
US6076157A (en) | 1997-10-23 | 2000-06-13 | International Business Machines Corporation | Method and apparatus to force a thread switch in a multithreaded processor |
US6212544B1 (en) | 1997-10-23 | 2001-04-03 | International Business Machines Corporation | Altering thread priorities in a multithreaded processor |
US6247147B1 (en) | 1997-10-27 | 2001-06-12 | Altera Corporation | Enhanced embedded logic analyzer |
US6122719A (en) | 1997-10-31 | 2000-09-19 | Silicon Spice | Method and apparatus for retiming in a network of multiple context processing elements |
US6108760A (en) | 1997-10-31 | 2000-08-22 | Silicon Spice | Method and apparatus for position independent reconfiguration in a network of multiple context processing elements |
US5915123A (en) | 1997-10-31 | 1999-06-22 | Silicon Spice | Method and apparatus for controlling configuration memory contexts of processing elements in a network of multiple context processing elements |
US6127908A (en) | 1997-11-17 | 2000-10-03 | Massachusetts Institute Of Technology | Microelectro-mechanical system actuator device and reconfigurable circuits utilizing same |
JP4197755B2 (ja) | 1997-11-19 | 2008-12-17 | 富士通株式会社 | 信号伝送システム、該信号伝送システムのレシーバ回路、および、該信号伝送システムが適用される半導体記憶装置 |
US6212650B1 (en) | 1997-11-24 | 2001-04-03 | Xilinx, Inc. | Interactive dubug tool for programmable circuits |
US6091263A (en) | 1997-12-12 | 2000-07-18 | Xilinx, Inc. | Rapidly reconfigurable FPGA having a multiple region architecture with reconfiguration caches useable as data RAM |
DE69737750T2 (de) | 1997-12-17 | 2008-03-06 | Hewlett-Packard Development Co., L.P., Houston | Erst- und Zweitprozessoren verwendetes Verfahren |
DE69827589T2 (de) | 1997-12-17 | 2005-11-03 | Elixent Ltd. | Konfigurierbare Verarbeitungsanordnung und Verfahren zur Benutzung dieser Anordnung, um eine Zentraleinheit aufzubauen |
JP2003526129A (ja) | 1997-12-17 | 2003-09-02 | エリクセントリミティド | プログラマブル・アレイにおける乗算器の実現 |
DE69841256D1 (de) | 1997-12-17 | 2009-12-10 | Panasonic Corp | Befehlsmaskierung um Befehlsströme einem Prozessor zuzuleiten |
DE19861088A1 (de) | 1997-12-22 | 2000-02-10 | Pact Inf Tech Gmbh | Verfahren zur Reparatur von integrierten Schaltkreisen |
US6049222A (en) | 1997-12-30 | 2000-04-11 | Xilinx, Inc | Configuring an FPGA using embedded memory |
US6260114B1 (en) | 1997-12-30 | 2001-07-10 | Mcmz Technology Innovations, Llc | Computer cache memory windowing |
US6172520B1 (en) | 1997-12-30 | 2001-01-09 | Xilinx, Inc. | FPGA system with user-programmable configuration ports and method for reconfiguring the FPGA |
US6105106A (en) | 1997-12-31 | 2000-08-15 | Micron Technology, Inc. | Computer system, memory device and shift register including a balanced switching circuit with series connected transfer gates which are selectively clocked for fast switching times |
US6301706B1 (en) | 1997-12-31 | 2001-10-09 | Elbrus International Limited | Compiler method and apparatus for elimination of redundant speculative computations from innermost loops |
US6216223B1 (en) | 1998-01-12 | 2001-04-10 | Billions Of Operations Per Second, Inc. | Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor |
US6034538A (en) | 1998-01-21 | 2000-03-07 | Lucent Technologies Inc. | Virtual logic system for reconfigurable hardware |
US6230307B1 (en) | 1998-01-26 | 2001-05-08 | Xilinx, Inc. | System and method for programming the hardware of field programmable gate arrays (FPGAs) and related reconfiguration resources as if they were software by creating hardware objects |
US6389579B1 (en) | 1998-01-26 | 2002-05-14 | Chameleon Systems | Reconfigurable logic for table lookup |
KR100572945B1 (ko) | 1998-02-04 | 2006-04-24 | 텍사스 인스트루먼츠 인코포레이티드 | 효율적으로 접속 가능한 하드웨어 보조 처리기를 구비하는디지탈 신호 처리기 |
US7152027B2 (en) | 1998-02-17 | 2006-12-19 | National Instruments Corporation | Reconfigurable test system |
US6198304B1 (en) | 1998-02-23 | 2001-03-06 | Xilinx, Inc. | Programmable logic device |
US6096091A (en) | 1998-02-24 | 2000-08-01 | Advanced Micro Devices, Inc. | Dynamically reconfigurable logic networks interconnected by fall-through FIFOs for flexible pipeline processing in a system-on-a-chip |
DE19807872A1 (de) | 1998-02-25 | 1999-08-26 | Pact Inf Tech Gmbh | Verfahren zur Verwaltung von Konfigurationsdaten in Datenflußprozessoren sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstruktur (FPGAs, DPGAs, o. dgl. |
US6088800A (en) | 1998-02-27 | 2000-07-11 | Mosaid Technologies, Incorporated | Encryption processor with shared memory interconnect |
US6298043B1 (en) | 1998-03-28 | 2001-10-02 | Nortel Networks Limited | Communication system architecture and a connection verification mechanism therefor |
US6374286B1 (en) | 1998-04-06 | 2002-04-16 | Rockwell Collins, Inc. | Real time processor capable of concurrently running multiple independent JAVA machines |
US6456628B1 (en) | 1998-04-17 | 2002-09-24 | Intelect Communications, Inc. | DSP intercommunication network |
US6084429A (en) | 1998-04-24 | 2000-07-04 | Xilinx, Inc. | PLD having a window pane architecture with segmented and staggered interconnect wiring between logic block arrays |
US6421808B1 (en) | 1998-04-24 | 2002-07-16 | Cadance Design Systems, Inc. | Hardware design language for the design of integrated circuits |
US6173419B1 (en) | 1998-05-14 | 2001-01-09 | Advanced Technology Materials, Inc. | Field programmable gate array (FPGA) emulator for debugging software |
US6449283B1 (en) | 1998-05-15 | 2002-09-10 | Polytechnic University | Methods and apparatus for providing a fast ring reservation arbitration |
US5999990A (en) | 1998-05-18 | 1999-12-07 | Motorola, Inc. | Communicator having reconfigurable resources |
US6298396B1 (en) | 1998-06-01 | 2001-10-02 | Advanced Micro Devices, Inc. | System for loading a current buffer desciptor register with a value different from current value to cause a previously read buffer descriptor to be read again |
US6092174A (en) | 1998-06-01 | 2000-07-18 | Context, Inc. | Dynamically reconfigurable distributed integrated circuit processor and method |
JP3123977B2 (ja) | 1998-06-04 | 2001-01-15 | 日本電気株式会社 | プログラマブル機能ブロック |
US6282627B1 (en) | 1998-06-29 | 2001-08-28 | Chameleon Systems, Inc. | Integrated processor and programmable data path chip for reconfigurable computing |
US6202182B1 (en) | 1998-06-30 | 2001-03-13 | Lucent Technologies Inc. | Method and apparatus for testing field programmable gate arrays |
DE69803373T2 (de) | 1998-07-06 | 2002-08-14 | Hewlett Packard Co | Verdrahtung von Zellen in logischen Feldern |
KR100385370B1 (ko) | 1998-07-21 | 2003-05-27 | 시게이트 테크놀로지 엘엘씨 | 개선된 메모리 시스템 장치 및 방법 |
EP0974906A3 (de) | 1998-07-24 | 2008-12-24 | Interuniversitair Microelektronica Centrum Vzw | Verfahren zur Bestimmung einer optimierten Speicherorganisation einer digitalen Vorrichtung |
US6137307A (en) | 1998-08-04 | 2000-10-24 | Xilinx, Inc. | Structure and method for loading wide frames of data from a narrow input bus |
DE19835189C2 (de) | 1998-08-04 | 2001-02-08 | Unicor Rohrsysteme Gmbh | Vorrichtung zur kontinuierlichen Herstellung von nahtlosen Kunststoffrohren |
US20020152060A1 (en) | 1998-08-31 | 2002-10-17 | Tseng Ping-Sheng | Inter-chip communication system |
JP2000076066A (ja) | 1998-09-02 | 2000-03-14 | Fujitsu Ltd | 信号処理回路 |
US7100026B2 (en) | 2001-05-30 | 2006-08-29 | The Massachusetts Institute Of Technology | System and method for performing efficient conditional vector operations for data parallel architectures involving both input and conditional vector values |
US6205458B1 (en) | 1998-09-21 | 2001-03-20 | Rn2R, L.L.C. | Adder and multiplier circuits employing logic gates having discrete, weighted inputs and methods of performing combinatorial operations therewith |
JP3551353B2 (ja) | 1998-10-02 | 2004-08-04 | 株式会社日立製作所 | データ再配置方法 |
US6215326B1 (en) | 1998-11-18 | 2001-04-10 | Altera Corporation | Programmable logic device architecture with super-regions having logic regions and a memory region |
EP1351154A2 (de) | 1998-11-20 | 2003-10-08 | Altera Corporation | Rechnersystem mit rekonfigurierbarer programmierbarer Logik-Vorrichtung |
US6977649B1 (en) | 1998-11-23 | 2005-12-20 | 3Dlabs, Inc. Ltd | 3D graphics rendering with selective read suspend |
JP2000181566A (ja) | 1998-12-14 | 2000-06-30 | Mitsubishi Electric Corp | マルチクロック並列処理装置 |
US6044030A (en) | 1998-12-21 | 2000-03-28 | Philips Electronics North America Corporation | FIFO unit with single pointer |
US6434695B1 (en) | 1998-12-23 | 2002-08-13 | Apple Computer, Inc. | Computer operating system using compressed ROM image in RAM |
US6757847B1 (en) | 1998-12-29 | 2004-06-29 | International Business Machines Corporation | Synchronization for system analysis |
US6496902B1 (en) | 1998-12-31 | 2002-12-17 | Cray Inc. | Vector and scalar data cache for a vector multiprocessor |
JP3585800B2 (ja) | 1999-01-13 | 2004-11-04 | 株式会社東芝 | 情報処理装置 |
US6539438B1 (en) | 1999-01-15 | 2003-03-25 | Quickflex Inc. | Reconfigurable computing system and method and apparatus employing same |
US6490695B1 (en) | 1999-01-22 | 2002-12-03 | Sun Microsystems, Inc. | Platform independent memory image analysis architecture for debugging a computer program |
US6321298B1 (en) | 1999-01-25 | 2001-11-20 | International Business Machines Corporation | Full cache coherency across multiple raid controllers |
DE10028397A1 (de) | 2000-06-13 | 2001-12-20 | Pact Inf Tech Gmbh | Registrierverfahren |
US6243808B1 (en) | 1999-03-08 | 2001-06-05 | Chameleon Systems, Inc. | Digital data bit order conversion using universal switch matrix comprising rows of bit swapping selector groups |
US6512804B1 (en) | 1999-04-07 | 2003-01-28 | Applied Micro Circuits Corporation | Apparatus and method for multiple serial data synchronization using channel-lock FIFO buffers optimized for jitter |
GB9909196D0 (en) | 1999-04-21 | 1999-06-16 | Texas Instruments Ltd | Transfer controller with hub and ports architecture |
US6286134B1 (en) | 1999-04-23 | 2001-09-04 | Sun Microsystems, Inc. | Instruction selection in a multi-platform environment |
JP2000311156A (ja) | 1999-04-27 | 2000-11-07 | Mitsubishi Electric Corp | 再構成可能並列計算機 |
US6381624B1 (en) | 1999-04-29 | 2002-04-30 | Hewlett-Packard Company | Faster multiply/accumulator |
US6298472B1 (en) | 1999-05-07 | 2001-10-02 | Chameleon Systems, Inc. | Behavioral silicon construct architecture and mapping |
US7007096B1 (en) | 1999-05-12 | 2006-02-28 | Microsoft Corporation | Efficient splitting and mixing of streaming-data frames for processing through multiple processing modules |
US6748440B1 (en) | 1999-05-12 | 2004-06-08 | Microsoft Corporation | Flow of streaming data through multiple processing modules |
US6211697B1 (en) | 1999-05-25 | 2001-04-03 | Actel | Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure |
DE19926538A1 (de) | 1999-06-10 | 2000-12-14 | Pact Inf Tech Gmbh | Hardware und Betriebsverfahren |
EP1061439A1 (de) | 1999-06-15 | 2000-12-20 | Hewlett-Packard Company | Speicher und Befehlen in Rechnerarchitektur mit Prozessor und Coprozessor |
US6757892B1 (en) | 1999-06-24 | 2004-06-29 | Sarnoff Corporation | Method for determining an optimal partitioning of data among several memories |
US6347346B1 (en) | 1999-06-30 | 2002-02-12 | Chameleon Systems, Inc. | Local memory unit system with global access for use on reconfigurable chips |
JP3420121B2 (ja) | 1999-06-30 | 2003-06-23 | Necエレクトロニクス株式会社 | 不揮発性半導体記憶装置 |
JP4046444B2 (ja) * | 1999-07-16 | 2008-02-13 | 三菱電機株式会社 | 車両用交流発電機 |
GB2352548B (en) | 1999-07-26 | 2001-06-06 | Sun Microsystems Inc | Method and apparatus for executing standard functions in a computer system |
US6745317B1 (en) | 1999-07-30 | 2004-06-01 | Broadcom Corporation | Three level direct communication connections between neighboring multiple context processing elements |
US6370596B1 (en) | 1999-08-03 | 2002-04-09 | Chameleon Systems, Inc. | Logic flag registers for monitoring processing system events |
US6341318B1 (en) | 1999-08-10 | 2002-01-22 | Chameleon Systems, Inc. | DMA data streaming |
US6204687B1 (en) | 1999-08-13 | 2001-03-20 | Xilinx, Inc. | Method and structure for configuring FPGAS |
US6438747B1 (en) | 1999-08-20 | 2002-08-20 | Hewlett-Packard Company | Programmatic iteration scheduling for parallel processors |
US6507947B1 (en) | 1999-08-20 | 2003-01-14 | Hewlett-Packard Company | Programmatic synthesis of processor element arrays |
US6606704B1 (en) | 1999-08-31 | 2003-08-12 | Intel Corporation | Parallel multithreaded processor with plural microengines executing multiple threads each microengine having loadable microcode |
US6311200B1 (en) | 1999-09-23 | 2001-10-30 | Chameleon Systems, Inc. | Reconfigurable program sum of products generator |
US6288566B1 (en) | 1999-09-23 | 2001-09-11 | Chameleon Systems, Inc. | Configuration state memory for functional blocks on a reconfigurable chip |
US6349346B1 (en) | 1999-09-23 | 2002-02-19 | Chameleon Systems, Inc. | Control fabric unit including associated configuration memory and PSOP state machine adapted to provide configuration address to reconfigurable functional unit |
US6631487B1 (en) | 1999-09-27 | 2003-10-07 | Lattice Semiconductor Corp. | On-line testing of field programmable gate array resources |
DE19946752A1 (de) | 1999-09-29 | 2001-04-12 | Infineon Technologies Ag | Rekonfigurierbares Gate-Array |
US6598128B1 (en) * | 1999-10-01 | 2003-07-22 | Hitachi, Ltd. | Microprocessor having improved memory management unit and cache memory |
US6412043B1 (en) * | 1999-10-01 | 2002-06-25 | Hitachi, Ltd. | Microprocessor having improved memory management unit and cache memory |
US6665758B1 (en) | 1999-10-04 | 2003-12-16 | Ncr Corporation | Software sanity monitor |
US6434642B1 (en) | 1999-10-07 | 2002-08-13 | Xilinx, Inc. | FIFO memory system and method with improved determination of full and empty conditions and amount of data stored |
JP2001167066A (ja) | 1999-12-08 | 2001-06-22 | Nec Corp | プロセッサ間通信方法及びマルチプロセッサシステム |
US6625654B1 (en) | 1999-12-28 | 2003-09-23 | Intel Corporation | Thread signaling in multi-threaded network processor |
US6633181B1 (en) | 1999-12-30 | 2003-10-14 | Stretch, Inc. | Multi-scale programmable array |
EP1115204B1 (de) | 2000-01-07 | 2009-04-22 | Nippon Telegraph and Telephone Corporation | Funktionsrekonfigurierbare Halbleitervorrichtung und integrierte Schaltung zum Konfigurieren der Halbleitervorrichtung |
JP2001202236A (ja) | 2000-01-20 | 2001-07-27 | Fuji Xerox Co Ltd | プログラマブル論理回路装置によるデータ処理方法、プログラマブル論理回路装置、情報処理システム、プログラマブル論理回路装置への回路再構成方法 |
US6701431B2 (en) | 2000-01-28 | 2004-03-02 | Infineon Technologies Ag | Method of generating a configuration for a configurable spread spectrum communication device |
US6496971B1 (en) | 2000-02-07 | 2002-12-17 | Xilinx, Inc. | Supporting multiple FPGA configuration modes using dedicated on-chip processor |
US6487709B1 (en) | 2000-02-09 | 2002-11-26 | Xilinx, Inc. | Run-time routing for programmable logic devices |
US6519674B1 (en) | 2000-02-18 | 2003-02-11 | Chameleon Systems, Inc. | Configuration bits layout |
JP2001236221A (ja) | 2000-02-21 | 2001-08-31 | Keisuke Shindo | マルチスレッドを利用するパイプライン並列プロセッサ |
US6865663B2 (en) | 2000-02-24 | 2005-03-08 | Pts Corporation | Control processor dynamically loading shadow instruction register associated with memory entry of coprocessor in flexible coupling mode |
JP3674515B2 (ja) | 2000-02-25 | 2005-07-20 | 日本電気株式会社 | アレイ型プロセッサ |
US6434672B1 (en) | 2000-02-29 | 2002-08-13 | Hewlett-Packard Company | Methods and apparatus for improving system performance with a shared cache memory |
US6539477B1 (en) | 2000-03-03 | 2003-03-25 | Chameleon Systems, Inc. | System and method for control synthesis using a reachable states look-up table |
KR100841411B1 (ko) | 2000-03-14 | 2008-06-25 | 소니 가부시끼 가이샤 | 전송장치, 수신장치, 전송방법, 수신방법과 기록매체 |
US6657457B1 (en) | 2000-03-15 | 2003-12-02 | Intel Corporation | Data transfer on reconfigurable chip |
US6871341B1 (en) | 2000-03-24 | 2005-03-22 | Intel Corporation | Adaptive scheduling of function cells in dynamic reconfigurable logic |
US6624819B1 (en) | 2000-05-01 | 2003-09-23 | Broadcom Corporation | Method and system for providing a flexible and efficient processor for use in a graphics processing system |
US6362650B1 (en) | 2000-05-18 | 2002-03-26 | Xilinx, Inc. | Method and apparatus for incorporating a multiplier into an FPGA |
US6373779B1 (en) | 2000-05-19 | 2002-04-16 | Xilinx, Inc. | Block RAM having multiple configurable write modes for use in a field programmable gate array |
US6725334B2 (en) | 2000-06-09 | 2004-04-20 | Hewlett-Packard Development Company, L.P. | Method and system for exclusive two-level caching in a chip-multiprocessor |
US7340596B1 (en) | 2000-06-12 | 2008-03-04 | Altera Corporation | Embedded processor with watchdog timer for programmable logic |
EP2226732A3 (de) | 2000-06-13 | 2016-04-06 | PACT XPP Technologies AG | Cachehierarchie für einen Multicore-Prozessor |
US6285624B1 (en) | 2000-07-08 | 2001-09-04 | Han-Ping Chen | Multilevel memory access method |
DE10129237A1 (de) | 2000-10-09 | 2002-04-18 | Pact Inf Tech Gmbh | Verfahren zur Bearbeitung von Daten |
DE10036627A1 (de) | 2000-07-24 | 2002-02-14 | Pact Inf Tech Gmbh | Integrierter Schaltkreis |
JP2002041489A (ja) | 2000-07-25 | 2002-02-08 | Mitsubishi Electric Corp | 同期信号生成回路、それを用いたプロセッサシステムおよび同期信号生成方法 |
US6538468B1 (en) | 2000-07-31 | 2003-03-25 | Cypress Semiconductor Corporation | Method and apparatus for multiple boot-up functionalities for a programmable logic device (PLD) |
US6542844B1 (en) | 2000-08-02 | 2003-04-01 | International Business Machines Corporation | Method and apparatus for tracing hardware states using dynamically reconfigurable test circuits |
US6754805B1 (en) | 2000-08-07 | 2004-06-22 | Transwitch Corporation | Method and apparatus for configurable multi-cell digital signal processing employing global parallel configuration |
AU2001283549A1 (en) | 2000-08-07 | 2002-02-18 | Altera Corporation | Software-to-hardware compiler |
EP1182559B1 (de) | 2000-08-21 | 2009-01-21 | Texas Instruments Incorporated | Mikroprozessor |
US7249351B1 (en) | 2000-08-30 | 2007-07-24 | Broadcom Corporation | System and method for preparing software for execution in a dynamically configurable hardware environment |
US6829697B1 (en) | 2000-09-06 | 2004-12-07 | International Business Machines Corporation | Multiple logical interfaces to a shared coprocessor resource |
US6538470B1 (en) | 2000-09-18 | 2003-03-25 | Altera Corporation | Devices and methods with programmable logic and digital signal processing regions |
US7346644B1 (en) | 2000-09-18 | 2008-03-18 | Altera Corporation | Devices and methods with programmable logic and digital signal processing regions |
US6518787B1 (en) | 2000-09-21 | 2003-02-11 | Triscend Corporation | Input/output architecture for efficient configuration of programmable input/output cells |
US6525678B1 (en) | 2000-10-06 | 2003-02-25 | Altera Corporation | Configuring a programmable logic device |
US20040015899A1 (en) | 2000-10-06 | 2004-01-22 | Frank May | Method for processing data |
ATE437476T1 (de) | 2000-10-06 | 2009-08-15 | Pact Xpp Technologies Ag | Zellenanordnung mit segmentierter zwischenzellstruktur |
US20020045952A1 (en) | 2000-10-12 | 2002-04-18 | Blemel Kenneth G. | High performance hybrid micro-computer |
US6398383B1 (en) | 2000-10-30 | 2002-06-04 | Yu-Hwei Huang | Flashlight carriable on one's person |
JP3636986B2 (ja) | 2000-12-06 | 2005-04-06 | 松下電器産業株式会社 | 半導体集積回路 |
GB2370380B (en) | 2000-12-19 | 2003-12-31 | Picochip Designs Ltd | Processor architecture |
EP1346280A1 (de) | 2000-12-20 | 2003-09-24 | Koninklijke Philips Electronics N.V. | Datenverarbeitungseinrichtung mit einer konfigurierbaren funktionseinheit |
US6426649B1 (en) | 2000-12-29 | 2002-07-30 | Quicklogic Corporation | Architecture for field programmable gate array |
US6483343B1 (en) | 2000-12-29 | 2002-11-19 | Quicklogic Corporation | Configurable computational unit embedded in a programmable device |
US6392912B1 (en) | 2001-01-10 | 2002-05-21 | Chameleon Systems, Inc. | Loading data plane on reconfigurable chip |
US7020673B2 (en) | 2001-01-19 | 2006-03-28 | Sony Corporation | Reconfigurable arithmetic device and arithmetic system including that arithmetic device and address generation device and interleave device applicable to arithmetic system |
US20020099759A1 (en) | 2001-01-24 | 2002-07-25 | Gootherts Paul David | Load balancer with starvation avoidance |
US6847370B2 (en) | 2001-02-20 | 2005-01-25 | 3D Labs, Inc., Ltd. | Planar byte memory organization with linear access |
US7210129B2 (en) | 2001-08-16 | 2007-04-24 | Pact Xpp Technologies Ag | Method for translating programs for reconfigurable architectures |
US7444531B2 (en) | 2001-03-05 | 2008-10-28 | Pact Xpp Technologies Ag | Methods and devices for treating and processing data |
US6836839B2 (en) | 2001-03-22 | 2004-12-28 | Quicksilver Technology, Inc. | Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements |
US6792588B2 (en) | 2001-04-02 | 2004-09-14 | Intel Corporation | Faster scalable floorplan which enables easier data control flow |
US20020143505A1 (en) | 2001-04-02 | 2002-10-03 | Doron Drusinsky | Implementing a finite state machine using concurrent finite state machines with delayed communications and no shared control signals |
WO2002082267A1 (en) | 2001-04-06 | 2002-10-17 | Wind River Systems, Inc. | Fpga coprocessing system |
US6836842B1 (en) | 2001-04-24 | 2004-12-28 | Xilinx, Inc. | Method of partial reconfiguration of a PLD in which only updated portions of configuration data are selected for reconfiguring the PLD |
US6999984B2 (en) | 2001-05-02 | 2006-02-14 | Intel Corporation | Modification to reconfigurable functional unit in a reconfigurable chip to perform linear feedback shift register function |
US6802026B1 (en) | 2001-05-15 | 2004-10-05 | Xilinx, Inc. | Parameterizable and reconfigurable debugger core generators |
US6976239B1 (en) | 2001-06-12 | 2005-12-13 | Altera Corporation | Methods and apparatus for implementing parameterizable processors and peripherals |
US7657877B2 (en) | 2001-06-20 | 2010-02-02 | Pact Xpp Technologies Ag | Method for processing data |
JP3580785B2 (ja) | 2001-06-29 | 2004-10-27 | 株式会社半導体理工学研究センター | ルックアップテーブル、ルックアップテーブルを備えるプログラマブル論理回路装置、および、ルックアップテーブルの構成方法 |
US7043416B1 (en) | 2001-07-27 | 2006-05-09 | Lsi Logic Corporation | System and method for state restoration in a diagnostic module for a high-speed microprocessor |
US7383421B2 (en) | 2002-12-05 | 2008-06-03 | Brightscale, Inc. | Cellular engine for a data processing system |
US7036114B2 (en) | 2001-08-17 | 2006-04-25 | Sun Microsystems, Inc. | Method and apparatus for cycle-based computation |
US7216204B2 (en) | 2001-08-27 | 2007-05-08 | Intel Corporation | Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment |
US6874108B1 (en) | 2001-08-27 | 2005-03-29 | Agere Systems Inc. | Fault tolerant operation of reconfigurable devices utilizing an adjustable system clock |
US6868476B2 (en) | 2001-08-27 | 2005-03-15 | Intel Corporation | Software controlled content addressable memory in a general purpose execution datapath |
US7472230B2 (en) | 2001-09-14 | 2008-12-30 | Hewlett-Packard Development Company, L.P. | Preemptive write back controller |
US20030056091A1 (en) | 2001-09-14 | 2003-03-20 | Greenberg Craig B. | Method of scheduling in a reconfigurable hardware architecture with multiple hardware configurations |
US20030055861A1 (en) | 2001-09-18 | 2003-03-20 | Lai Gary N. | Multipler unit in reconfigurable chip |
US20030052711A1 (en) | 2001-09-19 | 2003-03-20 | Taylor Bradley L. | Despreader/correlator unit for use in reconfigurable chip |
US6854073B2 (en) | 2001-09-25 | 2005-02-08 | International Business Machines Corporation | Debugger program time monitor |
US6798239B2 (en) | 2001-09-28 | 2004-09-28 | Xilinx, Inc. | Programmable gate array having interconnecting logic to support embedded fixed logic circuitry |
US6625631B2 (en) | 2001-09-28 | 2003-09-23 | Intel Corporation | Component reduction in montgomery multiplier processing element |
US7000161B1 (en) | 2001-10-15 | 2006-02-14 | Altera Corporation | Reconfigurable programmable logic system with configuration recovery mode |
US20060264508A1 (en) | 2001-10-16 | 2006-11-23 | Stone Richard A | Modulation of ocular growth and myopia by gaba drugs |
US20030123579A1 (en) | 2001-11-16 | 2003-07-03 | Saeid Safavi | Viterbi convolutional coding method and apparatus |
US6886092B1 (en) | 2001-11-19 | 2005-04-26 | Xilinx, Inc. | Custom code processing in PGA by providing instructions from fixed logic processor portion to programmable dedicated processor portion |
US6668237B1 (en) | 2002-01-17 | 2003-12-23 | Xilinx, Inc. | Run-time reconfigurable testing of programmable logic devices |
US20030154349A1 (en) | 2002-01-24 | 2003-08-14 | Berg Stefan G. | Program-directed cache prefetching for media processors |
DE20221985U1 (de) | 2002-02-01 | 2010-03-04 | Tridonicatco Gmbh & Co. Kg | Elektronisches Vorschaltgerät für Gasentladungslampe |
US6476634B1 (en) | 2002-02-01 | 2002-11-05 | Xilinx, Inc. | ALU implementation in single PLD logic cell |
US6961924B2 (en) | 2002-05-21 | 2005-11-01 | International Business Machines Corporation | Displaying variable usage while debugging |
US20070083730A1 (en) | 2003-06-17 | 2007-04-12 | Martin Vorbach | Data processing device and method |
US6976131B2 (en) | 2002-08-23 | 2005-12-13 | Intel Corporation | Method and apparatus for shared cache coherency for a chip multiprocessor or multiprocessor system |
US6931494B2 (en) | 2002-09-09 | 2005-08-16 | Broadcom Corporation | System and method for directional prefetching |
US6803787B1 (en) | 2002-09-25 | 2004-10-12 | Lattice Semiconductor Corp. | State machine in a programmable logic device |
US7873811B1 (en) | 2003-03-10 | 2011-01-18 | The United States Of America As Represented By The United States Department Of Energy | Polymorphous computing fabric |
US7412581B2 (en) | 2003-10-28 | 2008-08-12 | Renesas Technology America, Inc. | Processor for virtual machines and method therefor |
US7472155B2 (en) | 2003-12-29 | 2008-12-30 | Xilinx, Inc. | Programmable logic device with cascading DSP slices |
US8495122B2 (en) | 2003-12-29 | 2013-07-23 | Xilinx, Inc. | Programmable device with dynamic DSP architecture |
US7840627B2 (en) | 2003-12-29 | 2010-11-23 | Xilinx, Inc. | Digital signal processing circuit having input register blocks |
US7870182B2 (en) | 2003-12-29 | 2011-01-11 | Xilinx Inc. | Digital signal processing circuit having an adder circuit with carry-outs |
US7567997B2 (en) | 2003-12-29 | 2009-07-28 | Xilinx, Inc. | Applications of cascading DSP slices |
US7038952B1 (en) | 2004-05-04 | 2006-05-02 | Xilinx, Inc. | Block RAM with embedded FIFO buffer |
US7759968B1 (en) | 2006-09-27 | 2010-07-20 | Xilinx, Inc. | Method of and system for verifying configuration data |
US7971051B2 (en) | 2007-09-27 | 2011-06-28 | Fujitsu Limited | FPGA configuration protection and control using hardware watchdog timer |
US20090193384A1 (en) | 2008-01-25 | 2009-07-30 | Mihai Sima | Shift-enabled reconfigurable device |
JP2010277303A (ja) | 2009-05-28 | 2010-12-09 | Renesas Electronics Corp | 半導体装置及び異常検出方法 |
-
2003
- 2003-07-23 WO PCT/EP2003/008081 patent/WO2004021176A2/de not_active Application Discontinuation
- 2003-07-23 AU AU2003286131A patent/AU2003286131A1/en not_active Abandoned
- 2003-07-24 JP JP2005506110A patent/JP2005535055A/ja active Pending
- 2003-07-24 US US10/523,764 patent/US8156284B2/en active Active
- 2003-07-24 WO PCT/EP2003/008080 patent/WO2004015568A2/en active Application Filing
- 2003-07-24 EP EP03784053A patent/EP1535190B1/de not_active Expired - Lifetime
- 2003-07-24 AU AU2003260323A patent/AU2003260323A1/en not_active Abandoned
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6086628A (en) * | 1998-02-17 | 2000-07-11 | Lucent Technologies Inc. | Power-related hardware-software co-synthesis of heterogeneous distributed embedded systems |
WO2000038087A1 (en) * | 1998-12-22 | 2000-06-29 | Celoxica Limited | Hardware/software codesign system |
Non-Patent Citations (5)
Title |
---|
BAUMGARTE V ET AL: "PACT XPP - A Self-Reconfigurable Data Processing Architecture", PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON ENGINEERING OF RECONFIGURABLE SYSTEMS AND ALGORITHMS ERSA 2001, 25 June 2001 (2001-06-25), XP002256066 * |
FORNACIARI W ET AL: "System-level power evaluation metrics", 1997 PROCEEDINGS OF THE 2ND ANNUAL IEEE INTERNATIONAL CONFERENCE ON INNOVATIVE SYSTEMS IN SILICON. ISIS '97. AUSTIN, TX, PROCEEDINGS OF THE ANNUAL IEEE INTERNATIONAL CONFERENCE ON INNOVATIVE SYSTEMS IN SILICON, NEW YORK, NY : IEEE, US, 8 October 1997 (1997-10-08), pages 323 - 330, XP010252327, ISBN: 0-7803-4276-3 * |
NING ZHANG ET AL: "Architectural evaluation of flexible digital signal processing for wireless receivers", SIGNALS, SYSTEMS AND COMPUTERS, 2000. CONFERENCE RECORD OF THE THIRTY-FOURTH ASILOMAR CONFERENCE ON, vol. 1, 29 October 2000 (2000-10-29), pages 78 - 83, XP010535338 * |
SCHMIT H ET AL: "Hidden Markov modeling and fuzzy controllers in FPGAs", FPGAS FOR CUSTOM COMPUTING MACHINES, 1995. PROCEEDINGS. IEEE SYMPOSIUM ON NAPA VALLEY, CA, USA 19-21 APRIL 1995, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 19 April 1995 (1995-04-19), pages 214 - 221, XP010151173, ISBN: 0-8186-7086-X * |
SIMUNIC T ET AL: "Source code optimization and profiling of energy consumption in embedded systems", PROCEEDINGS OF THE 13TH INTERNATIONAL SYMPOSIUM ON SYSTEM SYNTHESIS, 20 September 2000 (2000-09-20), pages 193 - 198, XP010514346 * |
Also Published As
Publication number | Publication date |
---|---|
EP1535190B1 (de) | 2012-06-20 |
US8156284B2 (en) | 2012-04-10 |
US20070050603A1 (en) | 2007-03-01 |
WO2004015568A3 (en) | 2004-10-07 |
JP2005535055A (ja) | 2005-11-17 |
EP1535190A2 (de) | 2005-06-01 |
AU2003260323A1 (en) | 2004-02-25 |
AU2003260323A8 (en) | 2004-02-25 |
AU2003286131A1 (en) | 2004-03-19 |
WO2004015568A2 (en) | 2004-02-19 |
AU2003286131A8 (en) | 2004-03-19 |
WO2004021176A2 (de) | 2004-03-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2004021176A3 (de) | Verfahren und vorrichtung zur datenverarbeitung | |
WO2005116862A3 (en) | An apparatus for evaluating a mathematical function | |
WO2005073825A3 (en) | Protection against power analysis attacks | |
WO2004061582A3 (en) | Method and system for parts analysis | |
SG159567A1 (en) | Automated throughput control system and method of operating the same | |
WO2002029611A3 (en) | Method and apparatus for effectively performing linear transformations | |
EP1459795A4 (de) | Extraktor, chemisches analysegerät und chemisches analyseverfahren | |
EP1322044A4 (de) | Verfahren und vorrichtung zur erkennung von spreizkode-synchronisation von spreizspektrumsignalen | |
WO2004095175A3 (en) | Autonomic determination of configuration settings by walking the configuration space | |
IL163481A (en) | Method for extracting a macrolide from biomatter | |
WO2005033740A3 (en) | Illumination monitoring process for making infill decisions | |
CA2523107A1 (en) | Instrumentation, articles of manufacture, and analysis methods | |
TW200515712A (en) | Built-in self-test (BIST) apparatus and method for analog-to-digital converter (ADC) | |
EP1467279A4 (de) | Betriebsvorrichtung und betriebssystem | |
AU2002252029A1 (en) | High oil maize plants, and methods for obtaining same | |
AU2003274186A1 (en) | Method for monitoring and analyzing a process | |
WO2002015427A3 (en) | Apparatus for controlling a plurality of receiver fingers in a cdma receiver | |
FI20002504A (fi) | Menetelmä radiokanavan simuloimiseksi ja kanavasimulaattori | |
EP1571653A4 (de) | Datenträgervorrichtung, datenträgervorrichtungsbaugruppe, datenträgervorrichtungsherstellverfahren | |
AU2002364140A1 (en) | Method of detecting, identifying and correcting process performance | |
CA2265389A1 (en) | System and method for efficient basis conversion | |
AU2002357881A1 (en) | Integrated circuit diagnosing method, system, and program product | |
WO2003079181A3 (en) | Method and apparatus for generating random numbers based on filter coefficients of an adaptive filter | |
EP1394714A3 (de) | Einstellen von Geräteparameter zu Werten die verknüpft sind mit der durch das Gerät ausführbaren Aufgabe | |
WO2003081508A8 (en) | Cardiac perfusion analysis |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A2 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SC SD SE SG SK SL TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): MZ SD SL SZ AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 2003776856 Country of ref document: EP |
|
WWP | Wipo information: published in national office |
Ref document number: 2003776856 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2006248317 Country of ref document: US Ref document number: 10523763 Country of ref document: US |
|
NENP | Non-entry into the national phase |
Ref country code: JP |
|
WWW | Wipo information: withdrawn in national office |
Country of ref document: JP |
|
WWP | Wipo information: published in national office |
Ref document number: 10523763 Country of ref document: US |