WO2004021750A8 - Common interface framework for developing field programmable based applications independent of target circuit board - Google Patents

Common interface framework for developing field programmable based applications independent of target circuit board

Info

Publication number
WO2004021750A8
WO2004021750A8 PCT/US2003/027097 US0327097W WO2004021750A8 WO 2004021750 A8 WO2004021750 A8 WO 2004021750A8 US 0327097 W US0327097 W US 0327097W WO 2004021750 A8 WO2004021750 A8 WO 2004021750A8
Authority
WO
WIPO (PCT)
Prior art keywords
hdl
shell
application
board
independent
Prior art date
Application number
PCT/US2003/027097
Other languages
French (fr)
Other versions
WO2004021750A3 (en
WO2004021750A2 (en
Inventor
Kazem Haji-Aghajani
Christopher L Hayes
Peter Simonson
Frank D Stroili
Matthew J Thiele
Robert P Boland
Original Assignee
Bae Systems Information
Kazem Haji-Aghajani
Christopher L Hayes
Peter Simonson
Frank D Stroili
Matthew J Thiele
Robert P Boland
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bae Systems Information, Kazem Haji-Aghajani, Christopher L Hayes, Peter Simonson, Frank D Stroili, Matthew J Thiele, Robert P Boland filed Critical Bae Systems Information
Priority to AU2003262978A priority Critical patent/AU2003262978A1/en
Priority to EP03791944A priority patent/EP1556760A4/en
Publication of WO2004021750A2 publication Critical patent/WO2004021750A2/en
Publication of WO2004021750A3 publication Critical patent/WO2004021750A3/en
Publication of WO2004021750A8 publication Critical patent/WO2004021750A8/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Abstract

A multi-level framework (5) that allows an application (10) to be developed independent of the chip or board, and any dependency is built in as part of the framework (5) of the field programmable device (FPD). A shell configuration called a 'wrapper' (15) has a standard look, feel and form factor that provides the interface between the high density language (HDL) application (10) and a standardized and board independent HDL shell (15), thus isolating the HDL core (10). A second wrapper is a board specific HDL shell (20) that interacts with the standardized shell (15). Any application that has the same look, feel and form factor has a common interface that allows various system boards to communicate, providing a mechanism for creating a HDL application component independent of the hardware. An outer shell (20) binds the system to some board and talks to the application program interface (API) layer (25) and the code layer (30) to the outside world, such as the operating system.
PCT/US2003/027097 2002-08-29 2003-08-28 Common interface framework for developing field programmable based applications independent of target circuit board WO2004021750A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AU2003262978A AU2003262978A1 (en) 2002-08-29 2003-08-28 Common interface framework for developing field programmable based applications independent of target circuit board
EP03791944A EP1556760A4 (en) 2002-08-29 2003-08-28 Common interface framework for developing field programmable based applications independent of target circuit board

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US40788002P 2002-08-29 2002-08-29
US60/407,880 2002-08-29
US10/303,441 2002-11-25
US10/303,441 US7017140B2 (en) 2002-08-29 2002-11-25 Common components in interface framework for developing field programmable based applications independent of target circuit board

Publications (3)

Publication Number Publication Date
WO2004021750A2 WO2004021750A2 (en) 2004-03-11
WO2004021750A3 WO2004021750A3 (en) 2004-06-17
WO2004021750A8 true WO2004021750A8 (en) 2005-03-24

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/027097 WO2004021750A2 (en) 2002-08-29 2003-08-28 Common interface framework for developing field programmable based applications independent of target circuit board

Country Status (4)

Country Link
US (2) US7017140B2 (en)
EP (1) EP1556760A4 (en)
AU (1) AU2003262978A1 (en)
WO (1) WO2004021750A2 (en)

Families Citing this family (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040045007A1 (en) * 2002-08-30 2004-03-04 Bae Systems Information Electronic Systems Integration, Inc. Object oriented component and framework architecture for signal processing
US7061485B2 (en) 2002-10-31 2006-06-13 Hewlett-Packard Development Company, Lp. Method and system for producing a model from optical images
US20070283365A1 (en) * 2004-03-05 2007-12-06 Virginia Polytechnic Institute And State University Non-Centralized Middleware Channel Structures for Improved Throughput Efficiency
WO2005093571A1 (en) * 2004-03-05 2005-10-06 Virginia Tech Intellectual Properties, Inc. Hardware object request broker on a chip for generating separate control and data channels for improved throughput efficiency
WO2006039711A1 (en) * 2004-10-01 2006-04-13 Lockheed Martin Corporation Service layer architecture for memory access system and method
US7331022B1 (en) * 2005-04-06 2008-02-12 Altera Corporation Method and apparatus for automating pin assignments
US7340700B2 (en) * 2005-05-27 2008-03-04 Lsi Logic Corporation Method for abstraction of manufacturing test access and control ports to support automated RTL manufacturing test insertion flow for reusable modules
WO2007014261A2 (en) * 2005-07-25 2007-02-01 Sysair, Inc. Cellular pc modem architecture and method of operation
US7721258B2 (en) * 2005-11-03 2010-05-18 Microsoft Corporation Integrated development environment with managed platform registry
US20070174159A1 (en) * 2005-12-30 2007-07-26 O'neil Douglas Methods, systems, and products for monitoring transactions
EP1859372B1 (en) * 2006-02-23 2019-03-27 Mentor Graphics Corporation Cross-bar switching in an emulation environment
US8402409B1 (en) * 2006-03-10 2013-03-19 Xilinx, Inc. Method and apparatus for supporting run-time reconfiguration in a programmable logic integrated circuit
US7761272B1 (en) 2006-03-10 2010-07-20 Xilinx, Inc. Method and apparatus for processing a dataflow description of a digital processing system
WO2008013968A2 (en) 2006-07-28 2008-01-31 Vast Systems Technology Corporation Virtual processor generation model for co-simulation
US7847730B2 (en) * 2006-09-27 2010-12-07 Bae Systems Information And Electronic Systems Integration, Inc. Software defined navigation signal generator
US8644305B2 (en) * 2007-01-22 2014-02-04 Synopsys Inc. Method and system for modeling a bus for a system design incorporating one or more programmable processors
US7521961B1 (en) * 2007-01-23 2009-04-21 Xilinx, Inc. Method and system for partially reconfigurable switch
WO2009036398A2 (en) * 2007-09-13 2009-03-19 Siemens Product Lifecycle Management Software Inc. System and method for a product definition
US7673087B1 (en) * 2008-03-27 2010-03-02 Xilinx, Inc. Arbitration for an embedded processor block core in an integrated circuit
US8332552B2 (en) * 2008-11-13 2012-12-11 International Business Machines Corporation Supporting multiple high bandwidth I/O controllers on a single chip
JP5407631B2 (en) * 2009-07-21 2014-02-05 富士ゼロックス株式会社 Circuit information generation device, function execution system, and program
US8565811B2 (en) * 2009-08-04 2013-10-22 Microsoft Corporation Software-defined radio using multi-core processor
US8205174B2 (en) * 2009-08-17 2012-06-19 Hong Kong Applied Science And Technology Research Integrated circuit modeling method and framework tool
US9753884B2 (en) * 2009-09-30 2017-09-05 Microsoft Technology Licensing, Llc Radio-control board for software-defined radio platform
US8627189B2 (en) * 2009-12-03 2014-01-07 Microsoft Corporation High performance digital signal processing in software radios
US20110136439A1 (en) * 2009-12-04 2011-06-09 Microsoft Corporation Analyzing Wireless Technologies Based On Software-Defined Radio
WO2012060887A1 (en) * 2010-11-05 2012-05-10 Mark Cummings Integrated circuit design and operation
US10694402B2 (en) 2010-11-05 2020-06-23 Mark Cummings Security orchestration and network immune system deployment framework
US10285094B2 (en) 2010-11-05 2019-05-07 Mark Cummings Mobile base station network
US10687250B2 (en) 2010-11-05 2020-06-16 Mark Cummings Mobile base station network
US10531516B2 (en) 2010-11-05 2020-01-07 Mark Cummings Self organizing system to implement emerging topologies
US8707277B2 (en) 2011-05-02 2014-04-22 Raytheon Company Systems, methods, and language for SCA CORBA descriptor files
KR101823188B1 (en) 2011-05-04 2018-01-29 마이크로소프트 테크놀로지 라이센싱, 엘엘씨 Spectrum allocation for base station
US8813092B2 (en) 2011-10-12 2014-08-19 Raytheon Company CORBA embedded inter-orb protocol (EIOP)
US9047435B2 (en) * 2011-10-20 2015-06-02 Zuken Inc. Multi-board design apparatus, multi-board design method, program and computer-readable recording medium
US8989286B2 (en) 2011-11-10 2015-03-24 Microsoft Corporation Mapping a transmission stream in a virtual baseband to a physical baseband with equalization
US8719813B2 (en) 2011-11-29 2014-05-06 Raytheon Company Optimized SCA CORBA descriptor for SCA CORBA descriptor files
US8902956B2 (en) * 2011-12-22 2014-12-02 Intel Corporation On-package input/output clustered interface having full and half-duplex modes
CN103901402B (en) * 2012-12-28 2016-06-29 北京华清瑞达科技有限公司 Reconstruct FPGA radar digital signal processing assembly and method
JP6291571B2 (en) * 2013-06-27 2018-03-14 コーニンクレッカ フィリップス エヌ ヴェＫｏｎｉｎｋｌｉｊｋｅ Ｐｈｉｌｉｐｓ Ｎ．Ｖ． Automatic external sensor interface
US9633158B1 (en) * 2014-11-11 2017-04-25 Altera Corporation Selectable reconfiguration for dynamically reconfigurable IP cores
CN108959134B (en) * 2017-05-24 2022-02-15 微软技术许可有限责任公司 Communication for field programmable gate array devices
CN107273621B (en) * 2017-06-21 2020-10-09 上海研鸥信息科技有限公司 Transplanting method of FPGA application circuit
JP6810079B2 (en) 2018-01-12 2021-01-06 タタ コンサルタンシー サービシズ リミテッドＴＡＴＡ Ｃｏｎｓｕｌｔａｎｃｙ Ｓｅｒｖｉｃｅｓ Ｌｉｍｉｔｅｄ Systems and protocols for integrating multiple service providers across different disciplines using platforms
US10691856B1 (en) * 2018-04-02 2020-06-23 Xilinx, Inc. System design flow with runtime customizable circuits
US11477667B2 (en) 2018-06-14 2022-10-18 Mark Cummings Using orchestrators for false positive detection and root cause analysis
US10852800B1 (en) * 2019-01-25 2020-12-01 Cadence Design Systems, Inc. Multi-modal power control
US11222156B2 (en) * 2019-09-26 2022-01-11 Clarence Yandell Weston Methods and systems for facilitating designing a programmable logic device
CN112860249B (en) * 2021-03-10 2022-10-14 上海交通大学 Modularization implementation method of intelligent driving domain controller software

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6684261B1 (en) * 1993-07-19 2004-01-27 Object Technology Licensing Corporation Object-oriented operating system
US5590156A (en) * 1994-04-22 1996-12-31 Carney; Ronald Multichannel wideband digital receiver making use of multiple wideband tuners having individually selectable gains to extend overall system dynamic range
US5907697A (en) * 1995-10-13 1999-05-25 Mentor Graphics Corporation Emulation system having a scalable multi-level multi-stage hybrid programmable interconnect network
US6058263A (en) * 1996-06-03 2000-05-02 Microsoft Corporation Interface hardware design using internal and external interfaces
US5828858A (en) * 1996-09-16 1998-10-27 Virginia Tech Intellectual Properties, Inc. Worm-hole run-time reconfigurable processor field programmable gate array (FPGA)
US6128276A (en) * 1997-02-24 2000-10-03 Radix Wireless, Inc. Stacked-carrier discrete multiple tone communication technology and combinations with code nulling, interference cancellation, retrodirective communication and adaptive antenna arrays
US6215898B1 (en) * 1997-04-15 2001-04-10 Interval Research Corporation Data processing system and method
US6047115A (en) * 1997-05-29 2000-04-04 Xilinx, Inc. Method for configuring FPGA memory planes for virtual hardware computation
US5960191A (en) * 1997-05-30 1999-09-28 Quickturn Design Systems, Inc. Emulation system with time-multiplexed interconnect
US6182258B1 (en) * 1997-06-03 2001-01-30 Verisity Ltd. Method and apparatus for test generation during circuit design
US6078736A (en) 1997-08-28 2000-06-20 Xilinx, Inc. Method of designing FPGAs for dynamically reconfigurable computing
US6216191B1 (en) * 1997-10-15 2001-04-10 Lucent Technologies Inc. Field programmable gate array having a dedicated processor interface
US6230307B1 (en) * 1998-01-26 2001-05-08 Xilinx, Inc. System and method for programming the hardware of field programmable gate arrays (FPGAs) and related reconfiguration resources as if they were software by creating hardware objects
US6418494B1 (en) * 1998-10-30 2002-07-09 Cybex Computer Products Corporation Split computer architecture to separate user and processor while retaining original user interface
US6347395B1 (en) * 1998-12-18 2002-02-12 Koninklijke Philips Electronics N.V. (Kpenv) Method and arrangement for rapid silicon prototyping
US6311321B1 (en) * 1999-02-22 2001-10-30 Intel Corporation In-context launch wrapper (ICLW) module and method of automating integration of device management applications into existing enterprise management consoles
US6353915B1 (en) * 1999-04-01 2002-03-05 Unisys Corporation Methods for evaluating systems of electronic components
US6308311B1 (en) * 1999-05-14 2001-10-23 Xilinx, Inc. Method for reconfiguring a field programmable gate array from a host
US6204687B1 (en) * 1999-08-13 2001-03-20 Xilinx, Inc. Method and structure for configuring FPGAS
US6678646B1 (en) 1999-12-14 2004-01-13 Atmel Corporation Method for implementing a physical design for a dynamically reconfigurable logic circuit
US6326806B1 (en) * 2000-03-29 2001-12-04 Xilinx, Inc. FPGA-based communications access point and system for reconfiguration
US6535043B2 (en) * 2000-05-26 2003-03-18 Lattice Semiconductor Corp Clock signal selection system, method of generating a clock signal and programmable clock manager including same
US6215698B1 (en) * 2000-05-30 2001-04-10 National Semiconductor Corporation Flash eprom with byte-wide erasure
JP2004503172A (en) 2000-07-07 2004-01-29 ソニー株式会社 Universal platform for software defined radio
WO2002056481A2 (en) 2000-10-27 2002-07-18 Chameleon Systems, Inc. System and method of implementing a wireless communication system using a reconfigurable chip with a reconfigurable fabric
US6691301B2 (en) * 2001-01-29 2004-02-10 Celoxica Ltd. System, method and article of manufacture for signal constructs in a programming language capable of programming hardware architectures

Also Published As

Publication number Publication date
WO2004021750A3 (en) 2004-06-17
AU2003262978A1 (en) 2004-03-19
US20040045015A1 (en) 2004-03-04
US20060190904A1 (en) 2006-08-24
AU2003262978A8 (en) 2004-03-19
WO2004021750A2 (en) 2004-03-11
EP1556760A4 (en) 2007-08-29
EP1556760A2 (en) 2005-07-27
US7464360B2 (en) 2008-12-09
US7017140B2 (en) 2006-03-21

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