WO2004029651A1

WO2004029651A1 - Method and apparatus for maintaining pseudo-synchronism in rfid tags

Info

Publication number: WO2004029651A1
Application number: PCT/AU2003/001189
Authority: WO
Inventors: David Malcolm Hall
Original assignee: Tagsys Australia Pty Ltd
Priority date: 2002-09-27
Filing date: 2003-09-10
Publication date: 2004-04-08
Also published as: AU2002951697A0

Abstract

A method is disclosed of synchronizing at least temporarily, a local clock such as a clock included in an RFID tag, to an external time varying signal. The time varying signal may be included in an electromagnetic interrogation field. The method includes receiving and lag filtering the time varying signal. The method also includes averaging the lag filtered signal and applying the averaged signal to control frequency of the local clock. An apparatus for synchronizing a local clock to an external time varying signal is also disclosed.

Description

METHOD AND APPARATUS FOR MAINTAINING PSEUDO-SYNCHRONISM IN RFID TAGS

FIELD OF THE INVENTION

The present invention relates to an object management system wherein information bearing electronically coded radio frequency identification (RFID) tags are attached to objects which are to be identified, sorted, controlled and/or audited. In particular the present invention relates to a method and apparatus for maintaining pseudo-synchronism with a finite length time varying signal transmitted in tagging systems incorporating such tags.

BACKGROUND OF THE INVENTION

The object management system to which the present invention relates includes information passing between an interrogator which creates an electromagnetic interrogation field, and the electronically coded tags, which respond by issuing a reply signal that is detected by the interrogator, decoded and consequently supplied to other apparatus in the sorting, controlling or auditing process. The objects to which the tags are attached may be animate or inanimate. In some variants of the system the interrogation medium may be other than electromagnetic, such as optical and/or acoustic.

Under normal operation the tags may be passive, i.e. they may have no internal energy source and may obtain energy for their reply from the interrogation field, or they may be active and may contain an internal energy source, for example a battery. Such tags respond only when they are within or have recently passed through the interrogation field. The interrogation field may include functions such as signalling to an active tag (eg. battery assisted) when to commence a reply or series of replies or in the case of passive tags may provide energy, a portion of which may be used in constructing the reply.

One example of an electronic tag reading system is illustrated in Figure 1. In Figure 1 an interrogator 10, containing a transmitter and receiver, both operating under a controller, communicate via electromagnetic means with a code responding electronic tag 11.

Tag 11 includes a clock for providing timing/synchronism signals for various functions. It is desirable to maintain approximate synchronism between the clock of tag 11 and that of interrogator 10. Synchronism between tag and interrogator is beneficial for both signalling to a tag and maintaining a narrow bandwidth in the tag's reply signal. In the case of a passive backscatter tag it is not feasible to derive synchronism from the carrier of the interrogating electromagnetic field. Even in the case of an active backscatter tag it may not always be desirable to derive synchronism from the interrogating or illuminating field.

One problem with using an asynchronous clock (ie. one not synchronized with the interrogator) to decode interrogator signals, is that the frequency of the asynchronous clock may typically be unknown to ±20% due to process, temperature and voltage variations in the absence of expensive digital trimming or absolute voltage references.

SUMMARY OF THE INVENTION

According to one aspect of the present invention there is provided a method of synchronizing at least temporarily, a local clock to an external time varying signal, said method including: receiving said time varying signal; lag filtering said time varying signal; averaging the lag filtered signal; and applying the averaged signal to control frequency of said local clock.

According to a further aspect of the present invention there is provided an apparatus for synchronizing at least temporarily a local clock to an external time varying signal, said apparatus including: means for receiving said time varying signal; means for lag filtering said time varying signal; means for averaging said lag filtered signal; and means utilizing said averaged signal to control frequency of said local clock.

An RFID tag having a local clock may include a phase locked loop (PLL) to synchronize the clock to a finite series of pulses during signalling from the interrogator. Subsequently the clock may remain approximately synchronized for a further period of time. The PLL may include a phase detector, the output of which may be connected to an input of a Voltage Controlled Oscillator (VCO) via a filter circuit.

The PLL may be adapted to fast lock to an asymmetrical series of pulses from the interrogator. The PLL may then drive an accurate control signal to keep an oscillator at a correct frequency for some time after signalling from the interrogator has ceased.

Because the signal from the interrogator often may not be symmetrical eg. it may not be a square wave, the PLL may be arranged such that it does not require symmetry in the signal from the interrogator. The PLL may include a phase detector which operates with asymmetrical waveforms. The phase detector may include an edge triggered RS or JK flip-flop or a phase frequency detector.

The filter circuit may include two parts. One part of the filter circuit may include a first filter. The first filter may be passive or active. The first filter may include a traditional lag filter having a first time constant. The first filter may be adapted to bring the VCO into lock relatively quickly. However, if the output of the first filter is used as a control signal to set the VCO directly it will cause the VCO frequency to fluctuate because the output of the first filter varies continuously. The frequency will fluctuate with an amplitude that is inversely proportional to the lock time. Sampling and holding the output of the first filter will therefore result in a high degree of frequency error. This is because the time of the sampling, whilst it may be derived from the known interrogator pulses, varies according to the phase of the VCO, the centre frequency of which is typically unknown to within ±20%. Another part of the filter circuit may include a second filter. The second filter may be passive or active. The second filter may include a low pass filter having a second time constant longer than the first time constant. The second filter may be adapted to average the output of the first filter. As a result of averaging, the output of the second filter it may have relatively little amplitude variation.

The PLL may include a method of switching between the outputs of the first and second filters. The control input to the VCO may be connected initially to the output of the first filter. This may enable the VCO to lock onto a small number of interrogator pulses. After lock is achieved (or after such time that lock is known to occur) the control input to the VCO may be connected to a sampled output of the second filter. The output of second filter may be sampled explicitly or it may be sampled by removing a charging path to a capacitor included in the second filter. After connecting the control input of the VCO to the sampled output of the second filter, the VCO may be held at a constant frequency. The frequency of the VCO may be a good approximation of the frequency of the interrogator pulses. In the event that the PLL is a digital device with a divider in a feedback loop, the held frequency of the VCO may be an integer multiple of the frequency of the interrogator pulses.

DESCRIPTION OF PREFERRED EMBODIMENT

A preferred embodiment of the present invention will now be described with reference to the accompanying drawings wherein:

Fig. 1 shows an electronic tag reading system to which the frequency lock mechanism of the present invention may be applied;

Fig. 2 shows a PLL incorporating a filter circuit according to the present invention.

The PLL shown in Fig. 2 includes a phase detector 20, a filter circuit 21 and a VCO 22. Filter circuit 21 includes a first filter 23 and a second filter 24. First filter 23 includes resistor R1 and capacitor C1 forming a low-pass loop filter, and resistor R3 forming a damping resistor. Second filter 24 includes resistor R2 and capacitor C2 forming another low-pass filter. The time constant R₂C-₂ of the second filter 24 is greater than the time constant (R-ι+R₃)Cι of the first filter 23. The value of resistor R₂ is also substantially greater than the value of resistor R1 such that the presence of second filter 24 does not affect the performance of first filter 23. Switch Sw1 is normally closed to perform normal capture and locking of the PLL, while switch Sw2 is also normally closed and averages the output of first filter 23. When lock has occurred or enough time has elapsed for the PLL's VCO frequency to settle close enough to the desired frequency, switches Sw1 and Sw2 open and switch Sw3 closes, connecting the sampled average filter output voltage across capacitor C2 to the input of VCO 22. This voltage remains substantially constant except for leakage of the input circuitry of VCO 22 (typically extremely small) and that of switches Sw1 - Sw3 (typically 50 pA each).

Finally, it is to be understood that various alterations, modifications and/or additions may be introduced into the constructions and arrangements of parts previously described without departing from the spirit or ambit of the invention.

Claims

1. A method of synchronizing at least temporarily, a local clock to an external time varying signal, said method including: receiving said time varying signal; lag filtering said time varying signal; averaging the lag filtered signal; and applying the averaged signal to control frequency of said local clock.

2. A method according to claim 1 wherein said local clock is included in an RFID tag.

3. A method according to claim 1 or 2 wherein said time varying signal is included in an electromagnetic interrogation field.

4. A method according to claim 1 , 2 or 3 wherein said local clock is generated by a VCO.

5. A method according to claim 4 wherein said averaged signal is applied to an input of said VCO.

6. Apparatus for synchronizing at least temporarily a local clock to an external time varying signal, said apparatus including: means for receiving said time varying signal; means for lag filtering said time varying signal; means for averaging said lag filtered signal; and means utilizing said averaged signal to control frequency of said local clock.

7. Apparatus according to claim 6 wherein said local clock is included in an RFID tag.

8. Apparatus according to claim 6 or 7 wherein said time varying signal is included in an electromagnetic interrogation field.

9. Apparatus according to claim 6, 7 or 8 wherein said receiving means includes a phase detector.

10. Apparatus according to any one of claims 6 to 9 wherein said lag filtering means includes a first low pass filter.

11. Apparatus according to claim 10 wherein said first filter includes an RC circuit having a first time constant.

12. Apparatus according to claim 11 wherein said averaging means includes a second low pass filter having a second time constant greater than said first time constant.

13. Apparatus according to any one of claims 6 to 12 wherein said utilizing means includes a VCO.

14. A method of synchronizing a local clock to an external time varying signal substantially as herein described with reference to the accompanying drawings.

15. Apparatus for synchronizing a local clock to an external time varying signal substantially as herein described with reference to the accompanying drawings.