WO2004061772A1 - Match msb digital image compression - Google Patents
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- WO2004061772A1 WO2004061772A1 PCT/US2003/036344 US0336344W WO2004061772A1 WO 2004061772 A1 WO2004061772 A1 WO 2004061772A1 US 0336344 W US0336344 W US 0336344W WO 2004061772 A1 WO2004061772 A1 WO 2004061772A1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T9/00—Image coding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
- H04N19/184—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being bits, e.g. of the compressed video stream
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/124—Quantisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
- H04N19/156—Availability of hardware or computational resources, e.g. encoding based on power-saving criteria
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
- H04N19/186—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being a colour or a chrominance component
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
Definitions
- Computing devices typically comprise a display controller to render digital images and to display the rendered digital images on a display device such 5 as a computer monitor or a flat panel display.
- the display controller may render a digital image and store the rendered digital image in a frame buffer.
- the frame buffer may be located in shared system memory or in dedicated video memory.
- the display controller may retrieve the digital image from the frame buffer and may generate a signal to
- the process of storing and retrieving digital images from the frame buffer may consume a significant amount of memory bandwidth. If the frame buffer is located in shared system memory, the performance of the computing device may be greatly reduced due to the display controller significantly reducing the available memory bandwidth for
- the video memory subsystem may be implemented with expensive memory technologies in order to supply sufficient memory bandwidth.
- FIG. 1 illustrates an embodiment of a computing device having a chipset with an integrated display controller.
- FIG. 2 illustrates an example embodiment of a digital image.
- FIG. 3 illustrates an embodiment of a computing device having a non- integrated display controller that is separate from the chipset.
- FIGS. 4A, 4B, and 4C illustrate a method which the display controllers
- FIG. 5 of FIG. 1 and FIG. 3 may use to compress or encode a digital image unit.
- FIGS. 5A, 5B, and 5C illustrate a method which the display controllers of FIG. 1 and FIG. 3 may use to decompress or decode an encoded digital image unit.
- an example embodiment indicates that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment 5 may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
- FIG. 1 An example embodiment of a computing device 100 is shown in FIG. 1.
- the computing device 100 may comprise one or more processors 102 coupled to
- the chipset 104 may comprise one or more integrated circuit packages or chips that couple the processors 102 to system memory 108, firmware 110 and/or other devices 112 (e.g. a mouse, keyboard, disk drive, scanner, camera, etc.).
- the firmware 110 may comprise Basic Input/Output System routines (BIOS) the processors 102 may execute 0 during system start-up to initialize components of the computing device 100 and to initiate execution of an operating system.
- BIOS Basic Input/Output System routines
- the chipset 104 may comprise a memory controller
- the processors 102 may comprise all or a portion of the memory controller 114.
- the memory controller 114 may provide an 5 interface for a integrated display controller 116 and other components of the computing device 100 to access the system memory 108.
- the chipset 104 may also support I/O operations on I/O buses such as peripheral component interconnect (PCI) buses, PCI-Express buses, accelerated graphics port (AGP) buses, universal serial bus (USB) buses, low pin count (LPC) buses, or any other 0 kind of I/O bus (not shown).
- PCI peripheral component interconnect
- AGP accelerated graphics port
- USB universal serial bus
- LPC low pin count
- the chipset 104 may further comprise an integrated display controller
- the integrated display controller 116 may comprise a computer interface 120 to receive or obtain commands 5 and/or data from the computing device 100.
- the computer interface 120 may interact with the memory controller 114 to retrieve graphics commands from the system memory 108.
- the computer interface 120 may provide one or more video ports such as, for example, an AGP port, PCI port, or a PCI-Express port via which the computer interface 120 may receive data and/or commands 0 from the processors 102.
- the integrated display controller 116 may further comprise a memory interface 122 to obtain pels, zones, frames, tiles, etc. from video memory 124.
- system memory 108 and the video memory 124 may share or be implemented with the same physical memory devices.
- portions of the memory devices are statically or dynamically allocated to either system memory 108 or video memory 124.
- the memory interface 122 of the integrated display controller 116 may interact with the memory controller 114 of the chipset 104 in order to read or write pels, zones, frames, tiles, etc. to the video memory 124.
- the render engine 126 of the integrated display controller 116 may execute graphics commands to generate digital images for display.
- a digital image may comprise one or more rectangular non-overlapping zones.
- each zone may comprise one or more lines of picture elements or pels, and each pel may define a visual appearance (e.g. color, shade, tint, transparency, etc.) of the digital image at a particular point of the digital image.
- the pels may comprise one or more channels that define the appearance in accordance to a particular video format such as, for example, a RGB format, a YUV format, a RGBA format, or some other format.
- RGB format each pel comprises a red (R) channel , a green (G) channel, and a blue channel.
- each pel comprises a red (R) channel, a green (G) channel, a blue (B) channel, and alpha (A) channel to indicate a degree of transparency.
- the integrated display controller 116 may implement 24-bit color by assigning each pel an 8-bit red channel, an 8-bit green channel, and a 8-bit blue channel.
- each pel may comprise a luma (Y) channel, a first chrominance (U) channel, and a second chrominance (V) channel.
- the integrated display controller 116 may implement 24-bit color by assigning each pel an 8-bit value for each of the YUV channels.
- the integrated display controller 116 may elect to represent the luma (Y) channel more precisely. Accordingly, the integrated display controller 116 may implement 24-bit YUV color by assigning each pel a 12-bit luma (Y) channel, a 6-bit first chrominance (U) channel, and a 6-bit second chrominance (V) channel.
- a digital image encoded in the YUV format may also use a spatially reduced chrominance format such as a 4:1:1 format.
- a macro-pel may comprise four luma (Y) channels, one first chrominance (U) channel, and one second chrominance (V) channel that define the visual appearance of portions of the macro-pel.
- the render engine 126 may execute graphics commands retrieved from the system memory 108 by the instruction/data unit 128 and may update one or 5 more zones stored in a zone cache 130 of the integrated display controller 116. After rendering one or more zones of a digital image, the render engine 126 may cause the rendered zones to be evicted from the cache 130 and written to the frame buffer 132.
- the frame buffer compressor/decompressor (codec) 134 may compress the evicted zones and may provide the memory interface 122 with the
- the display engine 136 may later retrieve rendered digital images from the frame buffer 132 in order to display the digital image at an appropriate time.
- the display engine 136 may retrieve compressed zones from the frame buffer 132 and the codec 134 may decompress the retrieved zones.
- the display engine 136 may mix the
- the display interface 138 may convert the digital video signal received from the display engine 136 to an analog or digital signal that is suitable for the display device 118.
- the computing device 100 may comprise a non-integrated display controller 140 that is separate from the chipset 104.
- the non-integrated display controller 140 may comprise a computer interface 120, a memory interface 122, a 25 render engine 126, an instruction/data unit 128, a zone cache 130, a codec 134, a display engine 136, and a display interface 138.
- the non-integrated display controller 140 may comprise on-board video memory 124.
- the non- integrated display controller 140 may operate in a manner similar to the integrated display controller 116 of FIG. 1.
- the computer interface 120 of the non- 30 integrated display controller 140 may comprise an AGP port, PCI port, a PCI- Express port, or some other device interface to transfer commands and/or data with a corresponding a graphics interface 142 of the chipset 104 that may also comprise an AGP port, a PCI port, a PCI-Express port, or some other device interface.
- the memory interface 122 of the non-integrated display controller 140 may access the video memory 124 directly thus enabling the non- 5 integrated display controller 140 to transfer pels, zones, tiles, frames, etc. to and from the video memory 124 without consuming significant bandwidth of the memory controller 114 and the system memory 108.
- FIG. 4A, 4B, and 4C there is depicted a method that may be used by the codec 134 to compress a zone line, a zone, a frame line, a
- the method may compress the digital image unit by replacing each pel of the digital image unit with a variable bit-length symbol.
- the codec 134 in block 200 may set a current pel equal to a first pel of the digital image unit and may quantize one or more channels of the
- Each quantized channel may comprise one or more most significant bits (MSBs) of each channel and may discard one or more least significant bits (LSBs) from each channel.
- MSBs most significant bits
- LSBs least significant bits
- the codec 134 may quantize a 24-bit RGB pel (e.g. 10010101 -11111001 - 0111000]) at an 18-bit quantization level to obtain a quantized current pel (e.g.
- the codec 134 may obtain a 6-bit quantized channel by retaining the six MSBs of the 8-bit channel and discarding the two LSBs of the channel.
- the codec 134 may utilize a variety of different techniques to obtain the quantized pels.
- the codec 134 may obtain the quantized pels by performing a
- the codec 134 may quantize each channel of a pel at a different level. For example, the codec 134 for a 24-bit YUV pel may retain the 7 MSBs of the Y channel, the 6 MSBs of the U channel, and the 5 MSBs of the V channel.
- the codec 134 may set a previous pel such that each quantized channel of the previous pel is different than the corresponding quantized channel of the current pel. To this end, the codec 134 may set the previous pel equal to the current pel and may toggle the MSB of each channel to ensure that the quantized channels of the previous pel and current pel are different. In one embodiment, such setting of the previous pel causes the codec 134 to generate an intra-pel symbol for the current pel. In one embodiment, the codec 134 may decode an intra-pel symbol to obtain the pel of the intra-pel symbol without reference to another symbol. However, in order to obtain the pel of an inter-pel symbol, the codec 134 may need to decode one or more previous symbols.
- the codec 134 may then generate a match vector that comprises a match flag for each quantized channel of the current pel.
- Each match flag may indicate whether a quantized channel of the current pel is equal to or matches a corresponding quantized channel of the previous pel.
- the codec 134 in block 204 may select a quantized channel of the current pel and a corresponding quantized channel of the previous pel.
- the codec 134 may determine whether the selected quantized channel of the current pel matches the selected quantized channel of the previous pel.
- the codec 134 in block 208 may activate (e.g.
- the codec 134 in block 210 may deactivate (e.g. clear to 0) the match flag for the selected quantized channel in order to indicate that the selected quantized channel of the current pel does not match a corresponding quantized channel of the previous pel.
- the codec 134 may determine whether a match flag has been generated for all quantized channels of the current pel. In response to determining that more match flags are to be generated, the codec 134 may return to 204 in order to select another channel and to generate a match flag for the selected channel.
- the codec 134 may proceed to block 214 in order to determine whether a lossy or lossless symbol is to be generated for the current pel.
- the codec 134 in block 214 may determine whether to generate a lossy symbol or a lossless symbol for the current pel. In one embodiment, the codec 134 may determine whether to generate a lossy or lossless symbol based upon a state of one or more configuration registers (not shown) of the chipset 104 or the 5 display controller 116, 140. In another embodiment, the codec 134 may determine whether to generate a lossy or lossless symbol based upon load of the computing device 100.
- the codec 134 may determine to generate a lossy symbol in response to the load on the memory system, the processor, and/or some other subsystem of the computing device 100 rising above a threshold level. 0 In particular, the codec 134 may determine to increase the lossyness of the symbol in response to determining that available memory bandwidth to the system memory 108 has dropped below a certain level. The codec 134 may later decrease the lossyness of generated symbols or may later generate lossless symbols in response to determining that the available memory bandwidth has 5 risen above a certain level.
- the codec 134 may generate a lossless error vector that comprises lossless channels and/or lossless channel errors that basically indicate channel differences between the current pel and the previous pel.
- the codec 134 in block 0 216 may select a channel and corresponding quantized channel of the current pel and may select a channel and corresponding quantized channel of the previous pel.
- the codec 134 may determine whether the selected quantized channel of the current pel matches the selected quantized channel of the previous pel.
- the codec 134 may determine whether the 5 selected quantized channels match based upon the corresponding match flag of the match vector.
- the codec 134 may make the determination based upon a comparison of the selected quantized channels.
- the codec 134 in block 220 may provide a lossless channel vector with a 0 lossless channel for the current pel that is equal to the selected channel of the current pel. For example, if each 24-bit RGB pel is quantized to 6-bit per a channel and the R channel of the current pel is 10010101 and the R channel of the previous pel is 10000000, then the quantized R channel of 100101 for the current pel does not match the quantized R channel of 100000 for the previous pel. Accordingly, the codec 134 may provide the lossless error vector with a lossless channel that is equal to the R channel value of 10010101 for the current pel.
- the codec 134 in block 222 may provide the lossless error vector with a lossless channel error for the selected channel that is equal to the bits discarded from the selected channel during the quantization of the current pel. For example, if each 24-bit RGB pel is quantized to 6-bit per a channel and the R channel of the current pel is 10010101 and the R channel of the previous pel is 10010100, then quantized R channel of 100101 for the current pel matches the quantized R channel of 100101 for the previous pel. Accordingly, the codec 134 may provide the lossless error vector with a lossless channel error that is equal to 01 which is the 2 least significant bits (LSBs) discarded from the R channel of the current pel during quantization.
- LSBs least significant bits
- the codec 134 in block 224 may determine whether the lossless error vector has been updated with a lossless channel or a lossless channel error for each channel of the current pel. In response to determining that additional updates are to be performed, the codec 134 may return to 216 to select another channel of the current pel and provide the lossless error vector with an appropriate value for the selected channel. Otherwise, the codec 134 may proceed to block 226. In block 226, the codec 134 may output a lossless symbol that represents the current pel. In one embodiment, the codec 134 may output the lossless symbol by writing to an output buffer the match vector for the current pel followed by the lossless error vector for the current pel.
- the codec 134 may output the lossless symbol by further writing to the output buffer a compression mode that indicates the symbol is lossless.
- the symbol typically includes fewer bits than the original pel representation.
- the lossless symbol may actually include more bits than the original pel representation.
- a lossless symbol that represents or encodes a single 24-bit RGB pel may include a 3-bit match vector and a 24-bit lossless error vector if none of the quantized channels of the current pel match the quantized channels of the previous pel.
- the codec 134 may determine whether all pels of the digital image unit have been encoded. If all pels of the digital image unit have
- the codec 134 may exit. Otherwise, the codec 134 in block 230 may set the previous pel equal to the current pel and may set the current pel equal to another pel of the digital image unit. The codec 134 may then return to 204 to quantize the new current pel and to generate a symbol for the new current pel.
- the codec 134 may generate a lossy error vector that comprises lossy channels and/or lossy channel errors that basically indicate channel differences between the current pel and the previous pel. To this end, the codec 134 in block 232 (FIG. 4C) may select a channel and a corresponding quantized channel of the current
- the codec 134 may determine whether the selected quantized channel of the current pel matches the selected quantized channel of the previous pel. In one embodiment, the codec 134 may determine whether the selected quantized channels match based upon the corresponding match flag of
- the codec 134 may make the determination based upon a comparison of the selected quantized channels.
- the codec 134 in block 236 may provide a lossy error vector with a lossy channel that is equal to a MSB subset of the corresponding channel of the current
- the codec 134 may provide the lossy error vector with a lossy channel that is
- the codec 134 in block 238 may provide the lossy error vector with a lossy channel error that is equal to a MSB subset of the bits discarded from the selected channel during the quantization of the current pel. For example, if each 24-bit RGB pel is quantized to 6-bits per a channel and the R channel of the current pel is 10010101 5 and the R channel of the previous pel is 10010100, then the quantized R channel of 100101 for the current pel matches the quantized R channel of 100101 for the previous pel. Accordingly, the codec 134 may provide the lossy error vector with a lossy channel error that is equal to 0 which is the MSB of the 2 LSBs discarded from the R channel of the current pel during quantization.
- the codec 134 may support one or more lossy levels.
- the codec 134 may support 1, 2, or 3 bits of lossyness per a channel. For example, if 4-bits are discarded from a channel during quantization, then the codec 134 may support a first lossyness level that discards the LSB from each lossy channel and from each lossy channel error, a second lossyness level
- a lossy channel error for a channel may comprise zero bits.
- the codec 134 may support defining the lossyness level on a per channel bases. For example, the codec 134 for a 24-bit YUV pel may discard the LSB of the Y channel, the 2 LSBs of the U channel, and the 3 LSBs of the V channel.
- the codec 134 in block 240 may determine whether the lossy error vector has been updated with a lossy channel or a lossy channel error for each channel of the current pel. In response to determining that additional updates are to be performed, the codec 134 may return to 216 to select another channel of the current pel and provide the lossy error vector with an appropriate value for the
- the codec 134 may proceed to block 242.
- the codec 134 may output a lossy symbol that represents the current pel.
- the codec 134 may output the lossy symbol by writing to an output buffer the match vector for the current pel followed by the lossy error vector for the current pel.
- the codec 134 may output the lossy symbol by further writing to the output buffer a compression mode that indicates 5 the symbol is lossy.
- the codec 134 may determine whether all pels of the digital image unit have been encoded. If all pels of the digital image unit have been encoded, then encoding of the digital image unit is complete and the codec 134 may exit. Otherwise, the codec 134 in block 246 may set the previous pel 0 equal to the current pel and may set the current pel equal to another pel of the digital image unit. The codec 134 may then return to 204 to quantize the new current pel and to generate a symbol for the new current pel.
- the codec 134 in block 300 may set a current symbol to a first symbol of a digital image unit.
- the codec 134 may obtain a match vector from the current symbol.
- the codec 134 may set the match vector equal to the first 3 bits of the current symbol.
- the codec 134 in block 304 may 0 select a channel of the current pel and may obtain from the match vector a match flag for the selected channel.
- the codec 134 may determine whether to perform lossy or lossless decompression. In one embodiment, the codec 134 may determine whether to perform lossless or lossy decompression based upon one or more 5 registers of the chipset 104 and/or the display controller 116, 140. In another embodiment, the codec 134 may determine whether to perform lossless decompression or some level of lossy decompression based upon a compression mode obtained from the symbol.
- the 0 codec 134 in block 308 may determine based upon the obtained match flag whether the quantized channel of the current pel matches the corresponding quantized channel of the previous pel.
- the codec 134 in block 310 may obtain the next lossless channel from a lossless error vector of the current symbol.
- the codec 134 generates an intra-pel symbol for the first pel of a digital image unit. Accordingly, the match vector of the first symbol of a digital image unit indicates that none of the quantized channels of the first pel equal the quantized channels of the previous pel.
- the first pel may be obtained from the first symbol of the digital image unit without reference to a possibly non- existent previous pel.
- the codec 134 may reconstruct the channel of the current pel by setting the channel equal to the lossless channel obtained from the lossless error vector.
- the codec 134 in block 314 may obtain the next lossless channel error from the lossless error vector of the current symbol.
- the codec 134 in block 316 may reconstruct the channel of the current pel by setting the channel equal to the result of appending the obtained lossless channel error to the quantized channel of the previous pel.
- the codec 134 in block 318 may determine whether all channels of the pel have been decoded. In response to determining that additional channels are to be decoded, the codec 134 may return to block 304 to select the next channel of the current pel and corresponding match flag from the match vector. Otherwise, the codec 134 in block 320 may output the reconstructed channels of the current pel to an output buffer. In block 322, the codec 134 may determine whether the codec 134 has decoded the last symbol of the digital image. If the last symbol of the digital image has been decoded, then the codec 134 has finished decoding the symbols of the digital image unit and may exit.
- the codec 134 in block 324 may set the previous pel equal to the reconstructed current pel and may set the current symbol equal to the next symbol of the digital image unit. Further, the codec 134 in block 324 may obtain a match vector from the new current symbol. The codec 134 may then return to block 304 to decode the newly obtained current symbol. [0033] In response to determining to perform lossy decompression, the codec
- the codec 134 in block 326 may determine based upon the obtained match flag whether the quantized channel of the current pel matches the corresponding quantized channel of the previous pel. In response to determining that the 5 quantized channels do not match, the codec 134 in block 328 may obtain the next lossy channel from a lossy error vector of the current symbol. In block 330, the codec 134 may reconstruct the channel of the current pel by setting the channel equal to the result of appending one or more replacement bits to the lossy channel obtained from the lossy error vector. In one embodiment, the codec 134 may use
- the codec 134 may dynamically alter the replacement bits to dither the lost bits. For example, the codec 134 may toggle a single replacement bit between 0 and 1 for each new symbol. For an embodiment that discards more than a single bit, the codec 134
- the codec 134 may generate the two replacement bits by toggling between 01 and 10, may generate three replacement bits by toggling between 011 and 100, and may generate four replacement bits by toggling between 0111 and 1000.
- the above techniques are merely illustrative and the codec 134 may use other techniques to replace the
- the codec 134 in block 332 may obtain the next lossy channel error from the lossy error vector of the current symbol. In block 334, the codec 134 may append one or more replacement bits to
- the codec 134 may generate the replacement bits in a manner as described above in regard to block 330.
- the codec 134 may reconstruct the channel of the current pel by setting the channel equal to the quantized channel of the previous pel with the reconstructed channel error appended thereto.
- the codec 134 in block 338 may determine whether all channels of the pel have been decoded. In response to determining that additional channels are to be decoded, the codec 134 may return to block 304 to select the next channel of the current pel and corresponding match flag from the match vector. Otherwise, the codec 134 in block 340 may output the reconstructed channels of the current pel to an output buffer. In block 342, the codec 134 may determine whether the 5 codec 134 has decoded the last symbol of the digital image. If the last symbol of the digital image has been decoded, then the codec 134 has finished decoding the symbols of the digital image unit and may exit.
- the codec 134 in block 344 may set the previous pel equal to the reconstructed current pel and may set the current symbol equal to the next symbol of the digital image unit. Further, 0 the codec 134 in block 344 may obtain a match vector from the new current symbol. The codec 134 may then return to block 304 to decode the newly obtained current symbol.
- the computing device 100 may perform all or a subset of the example method of FIGS. 4A, 4B, and 4C and the example method of FIGS. 5A, 5B, and 5 5C in response to executing instructions of a machine readable medium such as, for example, read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory devices; and/or electrical, optical, acoustical or other form of propagated signals such as, for example, carrier waves, infrared signals, digital signals, analog signals.
- ROM read only memory
- RAM random access memory
- magnetic disk storage media such as, for example, magnetic disk storage media
- optical storage media such as, for example, carrier waves, infrared signals, digital signals, analog signals.
- FIGS. 4A, 4B, 4C, 5A, 5B, and 5C are illustrated as a sequence of operations, the computing device 100 in some embodiments may perform various illustrated operations of the methods in parallel or in a different order.
- Table 1 shows a zone line having four 24-bit RGB pels.
- Each pel of Table 1 comprises a lossless 8-bit R channel, a lossless 8-bit G channel, and a lossless 8-bit B channel.
- Table 2 shows the four 24-bit RGB pels after being quantized to an 18-bit quantization level using 6-bits per a channel. As can be 0 seen, the codec may generate the 18-bit quantized pels by simply dropping the 2 LSBs of each lossless channel.
- Table 3 shows 7-bit lossy channels for the pels of Table 1.
- Table 4 further shows lossless 2-bit channel errors for each 6-bit quantized channel of Table 2.
- the codec may generate a 2-bit lossless channel error by simply retaining the 2 LSBs dropped from each 8-bit lossless channel during pel quantization.
- Table 5 1-bit lossy channel errors are shown for each 6-bit quantized channel of Table 2. The codec may generate the 1-bit lossy channel errors by simply retaining the MSB dropped from each channel during pel quantization.
- the lossless encoding includes a symbol for each pel of Table 1.
- symbol 0 comprises a 3-bit match vector that indicates that none of the quantized channels of pel 0 match the
- symbol 0 includes in its lossless error vector each 8-bit lossless channel of pel 0.
- symbol 1 comprises a 3-bit match vector that indicates all quantized channels of pel 1 match the corresponding quantized channels of pel 0.
- symbol 1 includes in its lossless error vector each 2-bit lossless channel error depicted in Table 4 for pel 0 1.
- symbol 2 comprises a 3-bit match vector that indicates all quantized channels of pel 2 match the corresponding quantized channels of pel 1.
- Symbol 2 therefore includes in its lossless error vector each 2-bit lossless channel error depicted in Table 4 for pel 2.
- Symbol 3 comprises a 3-bit match vector that indicates that the quantized G and B channels of pel 3 match the quantized G and 5 B channels of pel 2, but further indicates that the quantized R channel of pel 3 does not match the quantized R channel of pel 2. Accordingly, symbol 3 includes in its lossless error vector the 8-bit lossless R channel for pel 3, the 2-bit lossless G channel error for pel 3, and the 2-bit lossless B channel error for pel 3. As shown in Table 6, symbols 0-3 represent 96 bits of pel data with only 60 bits thus 0 providing a compressed representation of the pels 0, 1, 2, and 3. The codec may decode the 60 bits of symbols 0-3 to obtain the 96 bits of pels 0-3 without data loss.
- the lossy encoding includes a symbol for 5 each pel of Table 1.
- symbol 0 comprises a 3-bit match vector that indicates that none of the quantized channels of pel 0 match the quantized channels of the previous pel. Accordingly, symbol 0 includes in its lossy error vector each lossy 7-bit channel depicted in Table 3 for pel 0.
- Symbol 1 comprises a 3-bit match vector that indicates all quantized channels of pel 1 match the corresponding quantized channels of pel 0. Accordingly, symbol 1 includes in its lossy error vector each 1-bit lossy channel error depicted in Table 5 for pel 1.
- symbol 2 comprises a 3-bit match vector that indicates all quantized channels of pel 2 match the corresponding quantized channels of pel 1.
- symbol 2 therefore includes in its lossy error vector each 1-bit lossy channel error depicted in Table 5 for pel 2.
- Symbol 3 comprises a 3-bit match vector that indicates that the quantized G and B channels of pel 3 match the quantized G and B channels of pel 2, but the quantized R channel of pel 3 does not match the quantized R channel of pel 2.
- symbol 3 includes in its lossy error vector the 7-bit lossy R channel for pel 3, the 2-bit lossy G channel error for pel 3, and the 2-bit lossy B channel error for pel 3.
- symbols 0-3 represent 96 bits of pel data with only 48 bits thus providing a compressed representation of the pels 0, 1 , 2, and 3.
- the codec may latter reconstruct the channel by appending 1 replacement bit to the 7- bit lossy channel of the symbol.
- the coded may latter reconstruct the channel by appending 1 replacement bit to the 1-bit lossy channel error of the symbol to obtain a reconstructed channel error, and appending the reconstructed channel error to the 6-bit quantized channel of the previous pel.
- Table 8 shows one possible set of four 24-bit pels that may be obtained from the lossy symbols of Table 7.
- the four pels of Table 7 were obtained by setting the replacement bit for pel 0 equal to 0 and toggling the replacement bit for each pel thereafter.
- the LSB of each channel is sometimes correct and is sometimes incorrect but in general the reconstructed channels are very close if not equal to the original channels. In most cases, a user would be unable to discern a difference between an original digital image and a digital image reconstructed from lossy symbols.
Abstract
Description
Claims
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AU2003298645A AU2003298645A1 (en) | 2002-12-30 | 2003-11-13 | Match msb digital image compression |
DE60313664T DE60313664T2 (en) | 2002-12-30 | 2003-11-13 | DIGITAL IMAGE COMPRESSION BY USING MATCHING MSB |
EP03796397A EP1579390B1 (en) | 2002-12-30 | 2003-11-13 | Match msb digital image compression |
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US10/335,423 US7212676B2 (en) | 2002-12-30 | 2002-12-30 | Match MSB digital image compression |
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EP (1) | EP1579390B1 (en) |
KR (1) | KR100869191B1 (en) |
CN (1) | CN1224267C (en) |
AT (1) | ATE361509T1 (en) |
AU (1) | AU2003298645A1 (en) |
DE (1) | DE60313664T2 (en) |
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US20120254592A1 (en) * | 2011-04-01 | 2012-10-04 | Jesus Corbal San Adrian | Systems, apparatuses, and methods for expanding a memory source into a destination register and compressing a source register into a destination memory location |
US20120254588A1 (en) * | 2011-04-01 | 2012-10-04 | Jesus Corbal San Adrian | Systems, apparatuses, and methods for blending two source operands into a single destination using a writemask |
US8811756B2 (en) | 2011-07-11 | 2014-08-19 | International Business Machines Corporation | Image compression |
CN104011673B (en) * | 2011-12-30 | 2016-12-07 | 英特尔公司 | Vector frequency compression instruction |
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ATE361509T1 (en) | 2007-05-15 |
US7212676B2 (en) | 2007-05-01 |
EP1579390A1 (en) | 2005-09-28 |
DE60313664D1 (en) | 2007-06-14 |
KR20050085931A (en) | 2005-08-29 |
TW200424955A (en) | 2004-11-16 |
AU2003298645A1 (en) | 2004-07-29 |
US20040126032A1 (en) | 2004-07-01 |
KR100869191B1 (en) | 2008-11-18 |
US20070147692A1 (en) | 2007-06-28 |
US7526124B2 (en) | 2009-04-28 |
CN1512784A (en) | 2004-07-14 |
EP1579390B1 (en) | 2007-05-02 |
CN1224267C (en) | 2005-10-19 |
DE60313664T2 (en) | 2007-08-16 |
TWI254260B (en) | 2006-05-01 |
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