WO2004068724A2

WO2004068724A2 - Receiver having automatic burst mode i/q gain and phase balance

Info

Publication number: WO2004068724A2
Application number: PCT/US2004/001864
Authority: WO
Inventors: James E. C. Brown
Original assignee: Texas Instruments Sunnyvale Incorporated
Priority date: 2003-01-24
Filing date: 2004-01-23
Publication date: 2004-08-12
Also published as: US6940930B2; US6950480B2; US20040146120A1; WO2004068724A3; US20040146121A1

Abstract

A method and apparatus for balancing I/Q gain and I/Q phase in a signal receiver. The receiver includes an IQ coefficient calculator, an IQ balancer, and a latency time delay device. The latency time delay device delays I and Q signals by a latency time period. During the latency time the IQ coefficient calculator uses the I and Q signals during a section of the packets corresponding to the latency time period for computing correction coefficients. The IQ balancer receives the I and Q signals after the latency time period and applies the correction coefficients to the entire packet of I and Q signals.

Description

Receiver Having Automatic Burst Mode I/Q Gain and Phase Balance

BACKGROUND OF THE INVENTION

Field of the Invention

The invention relates generally to signal receivers having in-phase (I) and quadrature phase (Q) signal processing and more particularly to methods and apparatus for balancing I/Q gain and I/Q phase in a signal receiver.

Description of the Prior Art

Most modern radio signal receivers estimate the data that was transmitted by processing in-phase (I) and quadrature phase (Q) signal components. The I and Q signals should have a phase difference (I/Q phase) of 90° at the carrier frequency of the incoming signal and a gain ratio (I/Q gain) of unity. However imperfections in the analog circuitry used in the radio frequency (RF) quadrature downconverters in most modern signal receivers cause the I/Q gain and I/Q phase to be out of balance (I/Q gain not equal to one and I/Q phase not equal to 90°). These imbalances cause a degradation in bit error rate (BER) in estimating the transmitted data.

Existing signal receivers use several methods for correcting I/Q gain and I/Q phase imbalances within the receivers. In one method, an offline test signal is used during manufacture or installation to align the I/Q gain to unity and the I/Q phase to 90° in the signal receiver. However, the performance of the receivers using the test signal method is limited by drift in the analog circuitry after the alignment. This limitation is reduced by performing the alignment periodically during operation. However, the periodic alignment adds overhead that reduces the efficiency of a signal communication channel. A second method uses an adaptive algorithm that processes the I and Q signals for converging to adjustments to the I and Q signals while the receiver is on-line. However, the BER performance of the receivers using the adaptive algorithm method is degraded because the receiver is estimating the transmitted data during the same on-line time period that the adaptive algorithm is converging. Of course, the adaptive algorithm could be performed on a test signal but this would add overhead and reduce signal efficiency.

Existing receivers using the test signal method or the adaptive algorithm method sometimes use correction coefficients for balancing I/Q gain and I/Q phase of the I and Q signals. However, such receivers that are known determine the I/Q gain and the I/Q phase corrections at points in the signal path that are separated from the RF quadrature downconverter by subsequent downconversion and/or demodulation of the I and Q signals. The performance of such receivers is limited because the imbalances are converted to image signals by the downconversion and/or demodulation and the degradation effect of such image signals cannot be completely eliminated once they are formed.

There is a need for a method for correcting I/Q gain and I/Q phase imbalance in a signal receiver without adding overhead to the signal communication channel and witha-out degrading BER while converging on correction coefficients.

SUMMARY OF THE INVENTION

It is therefore an object of the present invention to provide a method and apparatus in a signal receiver for balancing I/Q gain and I/Q phase by computing correction coefficients for I and Q signals of an on-line operational incoming signal during a latency time period that is created within the receiver.

Briefly, in a preferred embodiment, the signal receiver of the present invention includes an IQ coefficient calculator, an IQ balancer, and a time delay device. The delay device delays I and Q signals by a latency time period. The latency time period corresponds to an IQ measurement section that is defined within the receiver for a paclcet of the I and Q signals. The IQ coefficient calculator uses the I and Q signals in the IQ measurement section for computing fixed correction coefficients for that packet. The EQ balancer receives the I and Q signals after the latency time period so that the correctiorx coefficients may be applied to the entire packet of I and Q signals.

Advantages of the present invention are that no test signal is required, no communication overhead is added, and the correction coefficients are determined with, out degrading BER during the determination time period.

These and other objects and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various figures. IN THE DRAWINGS

FIG. 1 is a block diagram of a signal receiver of the present invention;

FIGS 2A and 2B are first and second embodiments, respectively, of IQ balanc eceiver of FIG. 1 ; and

FIG. 3 is a time chart of a packet received by the receiver of FIG. 1.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 is a block diagram of a signal receiver 10 of the present invention. The receiver 10 includes an antenna 12, a low noise amplifier (LNA) 14, a quadrature downconverter 16 including a local oscillator system (LO) 18, and in-phase (I) and quadrature (Q) phase digital-to-analog converters (A D)s 201 and 20Q. The antenna 12 converts a wireless radio frequency (RF) signal into a conducted form and passes the conducted RF signal to the LNA 14. The LNA 14 amplifies the conducted signal and passes an amplified RF signal to the quadrature downconverter 16. The quadrature downconverter 16 splits the amplified RF signal into in-phase (I) and quadrature phase (Q) signals that are processed in analog I and Q channels, respectively. The analog I channel includes an I mixer 221, an I lowpass filter 241, the analog portion of the A/D 201, and associated hardware such as amplifiers, matching elements and additional filters. Similarly, the analog Q channel includes a Q mixer 22Q, a Q lowpass filter 24Q, the analog portion of the A/D 20Q, and associated hardware such as amplifiers, matching elements and additional filters.

The LO 18 generates an in-phase (I) LO signal, denoted as coswj, and a quadrature phase (Q) LO signal, denoted as sinw_ct, and passes the I and Q LO signals to the I and Q mixers 221 and 22Q, respectively. The I and Q mixers 221 and 22Q use the I and Q LO signals to frequency downconvert the amplified RF signal from the LNA 14. The I an- Q filters 241 and 24Q filter the I and Q downconverted signals to provide intermediate I and Q signals to the I and Q A/Ds 201 and 20Q, respectively. The carrier frequency of the intermediate I and Q signals may be baseband (zero frequency), near to but not exactly-* zero frequency, or some other frequency that is intermediate between the RF frequency and zero frequency depending upon other system considerations.

The quadrature downconverter 16 has an I Q gain imbalance (error) 32 represe-= nted by ΔA and an I/Q phase imbalance (error) 34 represented by

. It should be noted ttiat the I Q gain error ΔA 32 and the I/Q phase error L\φ 34 are not actual blocks in the blczjck diagram of the quadrature downconverter 16, but are instead representations of imperfections in the quadrature downconverter 16. It is this I/Q gain error ΔA 32 and this I/Q phase error Δφ 34 that the receiver 10 of the present invention corrects before the received signal is frequency converted again and/or demodulated in order to estimate the transmitted data.

The I/Q gain error ΔA 32 results in a gain ratio (I/Q gain) different than unity between an effective gain for the I signal and an effective gain for the Q signal. The effective gain for the I signal is the signal gain from the point at which the amplified signal from the LNA 14 is split into the I and Q signal components in the quadrature downconverter 16 until the point at which the intermediate I signal is converted to a digital form in the A/D 201. The effective gain of the Q signal is the signal gain from the poiat at which the amplified RF signal from the LNA 14 is split into the I and Q signal components in the quadrature downconverter 16 until the intermediate Q signal is converted to a digital form in the A D 20Q.

Similarly, it should be noted that the I/Q phase imbalance (error) _ φ 34 results in a relative phase (LQ phase) that is different than 90° between the effective phase of the I signal that is digitized by the A/D 201 and the effective phase of the Q signal that is digitized by the Q A/D 20Q. The relative phase (I/Q phase) includes the phase of the E signal LO cosw_ct relative of the phase of the Q LO signal sinw_ct and the effective signal phase shift from the point at which the amplified signal is split into I and Q signal components until the point at which the intermediate I signal is converted to a digital F-orm in the A/D 201 relative to the effective signal phase shift from the point at which the amplified signal is split into I and Q signal components until the point at which the intermediate Q signal is converted to a digital form in the A D 20Q.

The receiver 10 also includes I and Q latency time delay devices 421 and 42Q, optional I and Q average detectors 441 and 44Q, optional I and Q average coiτectors 4 61 and 46Q, an IQ coefficient calculator 50A or 50B, an IQ balancer 52A or 52B, and a digital IQ signal receiver 54. The I and Q delay devices 421 and 42Q, the I and Q average detector 441 and 44Q, and the IQ coefficient calculator 50A,B receive the digital I and Q signals from the I and Q A/Ds 201 and 20Q, respectively. After a certain number N of digital sample indexes n, equivalent to a latency time delay D where D equals N times the digital sample time for the indexes n, the I and Q delay devices 421 and 42Q reissue the digital I and Q signals to the I and Q average correctors 461 and 46Q.

Typically, the digital I and Q signals are received as packets (FIG. 3) and the index N(FIG. 3) is equal of some portion of the total number of indexes n that are used for sampling one packet. The index N may be varied from 100% to 5% or even less of the total number of indexes n depending upon system considerations. Increasing the index N increases latency and decreases noise in the corrections. Decreasing the index Ν decreases latency and increases noise in the corrections. Preferably, the index N is about 10% to 30% of the total number of indexes n. For example, for a packet having a total number 942 of sample indexes n, the index N may be 192.

The I and Q average detectors 441 and 44Q use the number N of indexes n to calculate the averages for the digital I and Q signals, respectively, and pass I and Q average corrections to the I and Q average correctors 461 and 46Q. The I and Q average correctors 461 and 46Q use the I and Q average corrections based upon the first N of the indexes n for removing DC offset from digital I and Q signals for the entire packet from beginning to end. The IQ balancer 52A,B receives the zero average digital I and Q signals, denoted -.„ and q„, respectively, from the I and Q average correctors 461 and 46 . In an alternative embodiment, the delayed I and Q signals are passed directly to the IQ balancer 52A,B and the averaging is performed further downstream in the digital IQ signal receiver 54.

The first N of the indexes n of the digital I and Q signals from the A/Ds 201 and 20Q are selected or defined as an IQ measurement section (FIG. 3) of the packet (FIG. 3). The IQ coefficient calculator 50A,B uses the first N of the n indexes to calculate first and second correction coefficients. The first and second correction coefficients correspond roughly to phase and gain correction coefficients. In a first embodiment, the IQ coefficient calculator 50A calculates a first correction coefficient Ci and a second correction coefficient C₂ as described in equations 1 and 2, below. In a second embodiment, the IQ coefficient calculator 50B calculates a first correction coefficient C'ι and a second correction coefficient C'₂ as described in equations 3 and 4, below.

The IQ balancer 52A,B uses the first and second correction coefficients C, and C₂ (or C'ι and C'₂) to balance and correct the digital I and Q signals /„ and q_n in order to provide corrected digital I and Q signals, denoted as _n and q^c _n. The corrected digital I and Q signals i^c _n and q^c _n are passed to the digital IQ signal receiver 54. The digital IQ signal receiver 54 includes synchronization, demodulation, equalization, and bit detection subsystems for estimated the data that was carried by the wireless RF signal.

FIGS. 2 A and 2B are functional block diagrams of first and second embodiments of the IQ corrector 52A and 52B, respectively. The first embodiment IQ corrector 52A includes a phase balancer 62A, a summer 64A, and a gain balancer 66A. The phase balancer 62A multiplies the Q signal q„ by the second coefficient C₂ to provide a phase correction signal C_*q_n to the summer 64A. The summer 64A adds the phase correction signal C_*q„ to the I signal /„ and passes the sum C_*q„+ i„ to the gain balancer 66A. The gain balancer 66A multiplies the sum C₂*<j_n+ i„ by the first coefficient Ci to provide the corrected I signal f_n = Cι*(C₂*#„+ /„). The Q signal q„ is passed straight through as the corrected Q signal q^c _n. Of course, the processing of the I and Q signals i„ and q_n could be exchanged.

Similarly, the second embodiment IQ corrector 52B includes a phase balancer 6-2B, a summer 64B, and a gain balancer 66B. The phase balancer 62B multiplies the Q signal q_n by the second coefficient C₂ and provides a phase correction signal C'_*q„ to the summer 64B. The gain balancer 66B multiplies the I signal i„ by the first coefficient C '_. and provides an amplitude correction signal C'ι*-„ to the summer 64B. The summer 64B adds the phase correction signal C'₂*g„ to the amplitude correction digital C *i_n and provides the corrected I signal i^c _n = C *i_n + C_*q_n as the sum. The Q signal q_n is passed straight through as the corrected Q signal q^c„. Of course, the processing of the I and Q signals i_n and q„ could be exchanged.

Simple algorithms for computing the correction coefficients in the IQ coefficient; calculator 50A,B are described with the aid of equations 5-12.

N

K = ∑i_Hq„ (5) n=\ K₂ = ∑q_nq_n (6)

-1=1

K

^K^ ^Γ (7)

K,

= c = K₄

(10)

cC₂₂ == --κK_, (11)

σ_ = -c ^3 (12)

The IQ coefficient calculator 50A,B computes the correction coefficients using the following algorithm: Given a vector of finite length N with indexes n for indexed I elements i„ and an equal length vector of indexed Q elements q„, let a first term Kj equal the dot product (cross correlation) of the -.„ elements and the q_n elements, let a second term K.₂ equal a dot product (autocorrelation) of the q„ elements and the q_n elements, let a third term K_ equal the quotient of the first term Kj divided by the second term K₂, let a fourth term K₄ equal the sum of the absolute values of the q„ elements, let Z be a vector of elements representing the i„ elements minus the product of the q_n elements times the third term K₃, and finally let a fifth term K₅ equal a sum of the absolute values of the Z elements.

For the first embodiment where the IQ balancer 52A corrects I and Q signals according to f„ = Cι*(C₂*g„+ /„) and q^c _n = q„, the IQ coefficient calculator 50A computes the first correction coefficient Ci equal to the fourth term K divided by the fifth term Kj and computes the second correction coefficient C₂ equal to the negative of the third term K₃. For the second embodiment where the IQ balancer 52B corrects the I and Q signals according to /^c„ = C'ι* + _*q„ and q^c _n = q„, the coefficient calculator 50B computes the first correction coefficient C'ι equal to the fourth term K₄ divided by the fifth term K$ and computes the second correction coefficient C'₂ equal to the negative of the product of the first coefficient C'ι times the third term K₃.

It should be understood that it is equivalent to exchange the processing of the i„ and q_n vectors for the equivalent result in the first embodiment and in the second embodiment.

Although the present invention has been described in terms of the presently preferred embodiments, it is to be understood that such disclosure is not to be interpreted as limiting. Various alterations and modifications will no doubt become apparent to those skilled in the art after having read the above disclosure. Accordingly, it is intended that the appended claims be inteφreted as covering all alterations and modifications as fall within the true spirit and scope of the invention.

What is claimed is:

Claims

IN THE CLAIMS

1. A method for balancing in-phase (I) and quadrature phase (Q) signals in a signal receiver, comprising: resolving an incoming signal into said I and Q signals; computing fixed correction coefficients from said I and Q signals for a certain time period of said incoming signal; delaying said I and Q signals by at least said certain time period; and correcting LQ gain and I/Q phase of said delayed I and Q signals with said correction coefficients for providing corrected said I and Q signals.

2. The method of claim 1, wherein: the step of resolving an incoming signal includes resolving packets of said incoming signal into corresponding packets of said I and Q signals; the step of computing fixed correction coefficients includes computing s ets of said correction coefficients for said packets of said I and Q signal, said sets corresponding to said packets, respectively, of said I and Q signals; and the step of correcting I/Q gain and I/Q phase includes correcting said 1 gain and said I/Q phase of said delayed I and Q signals with said sets of said correction coefficients for providing packets of said corrected said I and Q signals corresponding to said incoming signal packets, respectively.

3. The method of claim 1, wherein: the step of correcting I/Q gain and I/Q phase is performed only after the step of computing fixed correction coefficients.

4. The method of claim 1, wherein: the step of computing fixed correction coefficients includes computing first and second correction coefficients using a finite number of indexed I values for said I signal and said finite number of indexed Q values for said Q signal; where a first term includes a cross correlation of said I values and said Q values; a second term includes an autocorrelation of said Q values; a third term includes said first term divided by said second term; a fourth term includes a sum of absolute values of said Q values; a fifth term includes a sum of absolute values of a difference of said I values minus a product of said Q values times said third term; and said first correction coefficient includes said fourth term divided by said fifth term.

5. The method of claim 4, wherein: said second correction coefficient includes the negative of said third term.

6. The method of claim 4, wherein: said second correction coefficient includes a negative of a product of said first correction coefficient and said third teπn.

7. The method of claim 1, further comprising: detecting pre-delay averages for said I and Q signals for a time period not greater than said certain time period before the step of delaying said I and Q signals; and using said pre-delay averages for reducing DC offset from said delayed I and Q signals.

8. The method of claim 1, further comprising: demodulating said corrected I and Q signals for estimating data carried on said incoming signal.

5 9. A signal receiver having automatic balancing of in-phase (I) and quadrature phase (Q) signals, comprising: a quadrature converter for resolving an incoming signal into said I and Q signals; an IQ coefficient calculator for computing fixed correction coefficients 0 from said I and Q signals for a certain time period of said incoming signal;

I and Q delay devices for delaying said I and Q signals by at least said certain time period; and an IQ balancer for using said correction coefficients for correcting I/Q gain and I/Q phase of said delayed I and Q signals and providing corrected said I and Q signals. 5

1 . The receiver of claim 9, wherein: the quadrature converter resolves packets of said incoming signal into corresponding packets of said I and Q signals; the IQ coefficient calculator computes sets of said correction coefficients o for said packets of said I and Q signals, said sets corresponding to said packets, respectively, of said I and Q signals; and the IQ balancer corrects said I/Q gain and I/Q phase of said delayed I and Q signals with said sets of said correction coefficients for providing packets of said corrected said I and Q signals corresponding to said incoming signal packets, respectively. 5

11. The receiver of claim 9, wherein: the IQ balancer corrects said I/Q gain and I/Q phase only after the IQ coefficient calculator calculates said correction coefficients.

12. The receiver of claim 9, wherein: the IQ coefficient calculator computes first and second said correction coefficients using a finite number of indexed I values for said I signal and said finite number of indexed Q values for said Q signal; where a first term includes a cross correlation of said I values and said Q valuer; a second term includes an autocorrelation of said Q values; a third term includes said first term divided by said second term; a fourth term includes a sum of absolute values of said Q values; a fifth term includes a sum of absolute values of a difference of said I values minus a product of said Q values times said third term; and said first correction coefficient includes said fourth term divided by said fifth term.

13. The receiver of claim 12, wherein: said second correction coefficient includes the negative of said third term.

14. The receiver of claim 12, wherein: said second correction coefficient includes a negative of a product of said first correction coefficient and said third term.

15. The receiver of claim 9, further comprising: an average detector for detecting pre-delay averages for said I and Q signals for a time period not greater than said certain time period before the step of delaying said I and Q signals; and an average corrector for using said pre-delay averages for correcting averages of said delayed I and Q signals.

16. The receiver of claim 9, further comprising: a digital IQ signal receiver for demodulating said corrected I and Q signals for estimating data carried on said incoming signal.