WO2004084267A2 - System, method and apparatus for improved local dual-damascene planarization - Google Patents
System, method and apparatus for improved local dual-damascene planarization Download PDFInfo
- Publication number
- WO2004084267A2 WO2004084267A2 PCT/US2004/007530 US2004007530W WO2004084267A2 WO 2004084267 A2 WO2004084267 A2 WO 2004084267A2 US 2004007530 W US2004007530 W US 2004007530W WO 2004084267 A2 WO2004084267 A2 WO 2004084267A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- additional layer
- overburden portion
- planarizing
- overburden
- conductive interconnect
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2004800069641A CN1823405B (en) | 2003-03-14 | 2004-03-10 | System, method and apparatus for improved local dual-damascene planarization |
KR1020057017108A KR101094680B1 (en) | 2003-03-14 | 2004-03-10 | System, method and apparatus for improved local dual-damascene planarization |
JP2006507109A JP2006520541A (en) | 2003-03-14 | 2004-03-10 | System, method and apparatus for improved local dual damascene planarization |
EP04719319A EP1611599A4 (en) | 2003-03-14 | 2004-03-10 | System, method and apparatus for improved local dual-damascene planarization |
IL170851A IL170851A (en) | 2003-03-14 | 2005-09-13 | System, method and apparatus for improved local dual-damascene planarization |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/390,520 | 2003-03-14 | ||
US10/390,520 US6821899B2 (en) | 2003-03-14 | 2003-03-14 | System, method and apparatus for improved local dual-damascene planarization |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2004084267A2 true WO2004084267A2 (en) | 2004-09-30 |
WO2004084267A3 WO2004084267A3 (en) | 2006-02-23 |
Family
ID=32962361
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2004/007530 WO2004084267A2 (en) | 2003-03-14 | 2004-03-10 | System, method and apparatus for improved local dual-damascene planarization |
Country Status (8)
Country | Link |
---|---|
US (1) | US6821899B2 (en) |
EP (1) | EP1611599A4 (en) |
JP (1) | JP2006520541A (en) |
KR (1) | KR101094680B1 (en) |
CN (1) | CN1823405B (en) |
IL (1) | IL170851A (en) |
TW (1) | TWI247381B (en) |
WO (1) | WO2004084267A2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006324445A (en) * | 2005-05-18 | 2006-11-30 | Fujitsu Ltd | Method for manufacturing semiconductor device |
JP2007281485A (en) * | 2006-04-10 | 2007-10-25 | Interuniv Micro Electronica Centrum Vzw | Method for causing super secondary crystal grain growth to occur in narrow trench |
JP2008536296A (en) * | 2005-03-09 | 2008-09-04 | ラム リサーチ コーポレーション | Plasma oxidation and removal of oxidized materials |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7303462B2 (en) * | 2000-02-17 | 2007-12-04 | Applied Materials, Inc. | Edge bead removal by an electro polishing process |
US7232766B2 (en) * | 2003-03-14 | 2007-06-19 | Lam Research Corporation | System and method for surface reduction, passivation, corrosion prevention and activation of copper surface |
US8191237B1 (en) | 2009-05-21 | 2012-06-05 | Western Digital (Fremont), Llc | Method for providing a structure in a magnetic transducer |
US8262919B1 (en) | 2010-06-25 | 2012-09-11 | Western Digital (Fremont), Llc | Method and system for providing a perpendicular magnetic recording pole using multiple chemical mechanical planarizations |
BR112013024213B8 (en) * | 2011-03-22 | 2023-04-18 | Chang He Bio Medical Science Yangzhou Co Ltd | MEDICAL INSTRUMENT AND MEDICAL INSTRUMENT MANUFACTURING METHOD |
JP2017216443A (en) * | 2016-05-20 | 2017-12-07 | ラム リサーチ コーポレーションLam Research Corporation | System and method for achieving uniformity across redistribution layer |
US9842762B1 (en) * | 2016-11-11 | 2017-12-12 | Globalfoundries Inc. | Method of manufacturing a semiconductor wafer having an SOI configuration |
CN110349835B (en) * | 2018-04-04 | 2022-04-19 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of semiconductor device and semiconductor device |
CN110060928B (en) * | 2019-04-28 | 2021-09-24 | 上海华虹宏力半导体制造有限公司 | Method for improving metal extrusion defect in planarization process |
CN112071802B (en) * | 2020-08-31 | 2023-08-11 | 上海华力集成电路制造有限公司 | Method and device for preventing void defect in wafer bonding process |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
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DE3072040D1 (en) * | 1979-07-23 | 1987-11-05 | Fujitsu Ltd | Method of manufacturing a semiconductor device wherein first and second layers are formed |
US5256565A (en) * | 1989-05-08 | 1993-10-26 | The United States Of America As Represented By The United States Department Of Energy | Electrochemical planarization |
US5098516A (en) * | 1990-12-31 | 1992-03-24 | Air Products And Chemicals, Inc. | Processes for the chemical vapor deposition of copper and etching of copper |
US6355553B1 (en) * | 1992-07-21 | 2002-03-12 | Sony Corporation | Method of forming a metal plug in a contact hole |
US5387315A (en) * | 1992-10-27 | 1995-02-07 | Micron Technology, Inc. | Process for deposition and etching of copper in multi-layer structures |
JP2001516970A (en) * | 1997-09-18 | 2001-10-02 | シーブイシー プロダクツ、インコーポレイテッド | Method and apparatus for interconnect fabrication of high performance integrated circuits |
US6096230A (en) * | 1997-12-29 | 2000-08-01 | Intel Corporation | Method of planarizing by polishing a structure which is formed to promote planarization |
US5968847A (en) * | 1998-03-13 | 1999-10-19 | Applied Materials, Inc. | Process for copper etch back |
US6447668B1 (en) | 1998-07-09 | 2002-09-10 | Acm Research, Inc. | Methods and apparatus for end-point detection |
US6395152B1 (en) | 1998-07-09 | 2002-05-28 | Acm Research, Inc. | Methods and apparatus for electropolishing metal interconnections on semiconductor devices |
US6051496A (en) * | 1998-09-17 | 2000-04-18 | Taiwan Semiconductor Manufacturing Company | Use of stop layer for chemical mechanical polishing of CU damascene |
US6056864A (en) * | 1998-10-13 | 2000-05-02 | Advanced Micro Devices, Inc. | Electropolishing copper film to enhance CMP throughput |
US6234870B1 (en) * | 1999-08-24 | 2001-05-22 | International Business Machines Corporation | Serial intelligent electro-chemical-mechanical wafer processor |
US6350364B1 (en) * | 2000-02-18 | 2002-02-26 | Taiwan Semiconductor Manufacturing Company | Method for improvement of planarity of electroplated copper |
US6383935B1 (en) * | 2000-10-16 | 2002-05-07 | Taiwan Semiconductor Manufacturing Company | Method of reducing dishing and erosion using a sacrificial layer |
US6417093B1 (en) * | 2000-10-31 | 2002-07-09 | Lsi Logic Corporation | Process for planarization of metal-filled trenches of integrated circuit structures by forming a layer of planarizable material over the metal layer prior to planarizing |
US6696358B2 (en) * | 2001-01-23 | 2004-02-24 | Honeywell International Inc. | Viscous protective overlayers for planarization of integrated circuits |
JP2004523898A (en) * | 2001-01-23 | 2004-08-05 | ハネウエル・インターナシヨナル・インコーポレーテツド | Planarizing material for spin-etch planarization of electronic device and method of using the same |
EP1423868A2 (en) * | 2001-08-17 | 2004-06-02 | ACM Research, Inc. | Forming a semiconductor structure using a combination of planarizing methods and electropolishing |
US7217649B2 (en) * | 2003-03-14 | 2007-05-15 | Lam Research Corporation | System and method for stress free conductor removal |
US6939796B2 (en) * | 2003-03-14 | 2005-09-06 | Lam Research Corporation | System, method and apparatus for improved global dual-damascene planarization |
US7078344B2 (en) * | 2003-03-14 | 2006-07-18 | Lam Research Corporation | Stress free etch processing in combination with a dynamic liquid meniscus |
US6739953B1 (en) * | 2003-04-09 | 2004-05-25 | Lsi Logic Corporation | Mechanical stress free processing method |
-
2003
- 2003-03-14 US US10/390,520 patent/US6821899B2/en not_active Expired - Fee Related
-
2004
- 2004-03-10 JP JP2006507109A patent/JP2006520541A/en not_active Withdrawn
- 2004-03-10 KR KR1020057017108A patent/KR101094680B1/en not_active IP Right Cessation
- 2004-03-10 EP EP04719319A patent/EP1611599A4/en not_active Withdrawn
- 2004-03-10 WO PCT/US2004/007530 patent/WO2004084267A2/en active Application Filing
- 2004-03-10 CN CN2004800069641A patent/CN1823405B/en not_active Expired - Fee Related
- 2004-03-12 TW TW093106648A patent/TWI247381B/en not_active IP Right Cessation
-
2005
- 2005-09-13 IL IL170851A patent/IL170851A/en not_active IP Right Cessation
Non-Patent Citations (1)
Title |
---|
See references of EP1611599A4 * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008536296A (en) * | 2005-03-09 | 2008-09-04 | ラム リサーチ コーポレーション | Plasma oxidation and removal of oxidized materials |
JP2006324445A (en) * | 2005-05-18 | 2006-11-30 | Fujitsu Ltd | Method for manufacturing semiconductor device |
JP2007281485A (en) * | 2006-04-10 | 2007-10-25 | Interuniv Micro Electronica Centrum Vzw | Method for causing super secondary crystal grain growth to occur in narrow trench |
Also Published As
Publication number | Publication date |
---|---|
CN1823405B (en) | 2013-03-13 |
IL170851A (en) | 2010-05-31 |
JP2006520541A (en) | 2006-09-07 |
TWI247381B (en) | 2006-01-11 |
EP1611599A4 (en) | 2007-06-13 |
KR20050107797A (en) | 2005-11-15 |
KR101094680B1 (en) | 2011-12-20 |
US20040180545A1 (en) | 2004-09-16 |
EP1611599A2 (en) | 2006-01-04 |
US6821899B2 (en) | 2004-11-23 |
WO2004084267A3 (en) | 2006-02-23 |
CN1823405A (en) | 2006-08-23 |
TW200421548A (en) | 2004-10-16 |
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