WO2004084320A3 - Flip-chip light emitting diode with a thermally stable multiple layer reflective p-type contact - Google Patents

Flip-chip light emitting diode with a thermally stable multiple layer reflective p-type contact Download PDF

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Publication number
WO2004084320A3
WO2004084320A3 PCT/US2004/008514 US2004008514W WO2004084320A3 WO 2004084320 A3 WO2004084320 A3 WO 2004084320A3 US 2004008514 W US2004008514 W US 2004008514W WO 2004084320 A3 WO2004084320 A3 WO 2004084320A3
Authority
WO
WIPO (PCT)
Prior art keywords
layer
group iii
light emitting
emitting diode
flip
Prior art date
Application number
PCT/US2004/008514
Other languages
French (fr)
Other versions
WO2004084320A2 (en
Inventor
Hari S Venugopalan
Original Assignee
Gelcore Llc
Hari S Venugopalan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gelcore Llc, Hari S Venugopalan filed Critical Gelcore Llc
Publication of WO2004084320A2 publication Critical patent/WO2004084320A2/en
Publication of WO2004084320A3 publication Critical patent/WO2004084320A3/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Abstract

A p-type contact (30) is disclosed for flip chip bonding and electrically contacting a p-type group III-nitride layer (28) of a group III-nitride flip chip light emitting diode die (10) with a bonding pad (60). A first palladium layer (42) is disposed on the p-type group III-nitride layer (28). The first palladium layer (42) is diffused through a native oxide of the p-type group III-nitride layer (28) to make electrical contact with the p-type group III-nitride layer (28). A reflective silver layer (44) is disposed on the first palladium layer (42). A second palladium layer (46) is disposed on the silver layer (44). A bonding stack (48) including at least two layers (50, 52, 54) is disposed on the second palladium layer (46). The bonding stack (48) is adapted for flip chip bonding the p-type layer (28) to the bonding pad (60).
PCT/US2004/008514 2003-03-19 2004-03-19 Flip-chip light emitting diode with a thermally stable multiple layer reflective p-type contact WO2004084320A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/249,163 2003-03-19
US10/249,163 US7141828B2 (en) 2003-03-19 2003-03-19 Flip-chip light emitting diode with a thermally stable multiple layer reflective p-type contact

Publications (2)

Publication Number Publication Date
WO2004084320A2 WO2004084320A2 (en) 2004-09-30
WO2004084320A3 true WO2004084320A3 (en) 2005-04-14

Family

ID=32987014

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/008514 WO2004084320A2 (en) 2003-03-19 2004-03-19 Flip-chip light emitting diode with a thermally stable multiple layer reflective p-type contact

Country Status (2)

Country Link
US (2) US7141828B2 (en)
WO (1) WO2004084320A2 (en)

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Also Published As

Publication number Publication date
US7141828B2 (en) 2006-11-28
US20040182914A1 (en) 2004-09-23
WO2004084320A2 (en) 2004-09-30
US20060261363A1 (en) 2006-11-23
US7385229B2 (en) 2008-06-10

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