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Numéro de publicationWO2004114386 A3
Type de publicationDemande
Numéro de demandePCT/US2004/019349
Date de publication23 juin 2005
Date de dépôt16 juin 2004
Date de priorité16 juin 2003
Autre référence de publicationWO2004114386A2, WO2004114386B1
Numéro de publicationPCT/2004/19349, PCT/US/2004/019349, PCT/US/2004/19349, PCT/US/4/019349, PCT/US/4/19349, PCT/US2004/019349, PCT/US2004/19349, PCT/US2004019349, PCT/US200419349, PCT/US4/019349, PCT/US4/19349, PCT/US4019349, PCT/US419349, WO 2004/114386 A3, WO 2004114386 A3, WO 2004114386A3, WO-A3-2004114386, WO2004/114386A3, WO2004114386 A3, WO2004114386A3
InventeursIgor C Ivanov, Weiguo Zhang, Artur Kolics
DéposantBlue29 Corp, Igor C Ivanov, Weiguo Zhang, Artur Kolics
Exporter la citationBiBTeX, EndNote, RefMan
Liens externes:  Patentscope, Espacenet
Methods and system for processing a microelectronic topography
WO 2004114386 A3
Résumé
Methods and systems are provided which are adapted to process a microelectronic topography, particularly in association with an electroless deposition process. In general, methods are provide which include loading a topography into a chamber and supplying fluids to an enclosed area about the topography. In particular, a method is provided for forming a hydrated metal oxide layer. In addition, a method is provided for selectively depositing a dielectric layer and a metal layer upon a topography. A topography having a single layer with at least four elements lining a lower surface and sidewalls of a metal feature is also provided. A process chamber which includes a gate configured to either seal or provide an air passage to the chamber and a substrate holder comprising a clamping jaw with a lever are contemplated herein. A process chamber with a reservoir arranged above a substrate holder is also provided.
Citations de brevets
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US6531386 *8 févr. 200211 mars 2003Chartered Semiconductor Manufacturing Ltd.Method to fabricate dish-free copper interconnects
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US20020127829 *4 mars 200212 sept. 2002Yoshinori MarumoSolution processing apparatus and solution processing method
US20020139663 *11 mars 20023 oct. 2002Mitsubishi Denki Kabushiki KaishaChemical treatment system
US20020180043 *3 juin 20025 déc. 2002Seiko Epson CorporationSemiconductor device and method for manufacturing semiconductor devices
US20030034251 *14 août 200120 févr. 2003Chikarmane Vinay B.Apparatus and method of surface treatment for electrolytic and electroless plating of metals in integrated circuit manufacturing
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Classifications
Classification internationaleH01L21/288, H01L21/768
Classification coopérativeH01L21/768, H01L21/288
Événements juridiques
DateCodeÉvénementDescription
29 déc. 2004AKDesignated states
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29 déc. 2004ALDesignated countries for regional patents
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23 févr. 2005121Ep: the epo has been informed by wipo that ep was designated in this application
15 sept. 2005BLater publication of amended claims
Effective date: 20050707
19 juil. 2006122Ep: pct app. not ent. europ. phase